CN104935777A - Light beam excitation type precise reverse current source graph processing system based on gate drive - Google Patents
Light beam excitation type precise reverse current source graph processing system based on gate drive Download PDFInfo
- Publication number
- CN104935777A CN104935777A CN201510307091.8A CN201510307091A CN104935777A CN 104935777 A CN104935777 A CN 104935777A CN 201510307091 A CN201510307091 A CN 201510307091A CN 104935777 A CN104935777 A CN 104935777A
- Authority
- CN
- China
- Prior art keywords
- resistance
- triode
- circuit
- electric capacity
- pole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/024—Details of scanning heads ; Means for illuminating the original
- H04N1/028—Details of scanning heads ; Means for illuminating the original for picture information pick-up
- H04N1/02805—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a two-dimensional array
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/024—Details of scanning heads ; Means for illuminating the original
- H04N1/028—Details of scanning heads ; Means for illuminating the original for picture information pick-up
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/40—Picture signal circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
Abstract
The invention discloses a light beam excitation type precise reverse current source graph processing system based on gate drive. The system is composed of an image sensor, a driving circuit connected with the image sensor, a processing circuit connected with the driving circuit, an emitting electrode coupling type asymmetrical trigger circuit connected with the processing circuit, a precise reverse current source circuit in series connection between the driving circuit and the processing circuit, a light beam excitation type logic amplification circuit in serial connection between the emitting electrode coupling type asymmetrical trigger circuit and the driving circuit, and a gate drive circuit in serial connection between the drive circuit and the light beam excitation type logic amplification circuit. When emitting electrode coupling type asymmetrical trigger circuit is combined, the processing speed of the system is greatly improved compared with the traditional processing speed, a picture of 1028*1028 pixels is processed in 0.3 second, and the speed is more than 20 times of a traditional processing speed. At the same time, the gate drive circuit serves as an auxiliary drive circuit, so that the identification speed of the system is greatly improved, and the efficiency is also improved.
Description
Technical field
The invention belongs to technical field of image processing, specifically refer to the beam excitation formula accurate reverse current source graphic system based on gate-drive.
Background technology
At present, be that the image recognition product of representative emerges in an endless stream with scanner, it has enriched the life of people greatly.But, the recognition capability of these image recognition products has certain limitation at present, namely its image recognition rate and precision are still not high, in addition in identifying, there will be the situation that image or paper and scanning sensor imprecision are fitted, therefore can cause occurring distortion zone, actual effect can not be reflected really.
Summary of the invention
The object of the invention is to overcome the recognition speed existing for current image identification system, precision is not high, the defect of unstable properties, a kind of beam excitation formula based on gate-drive accurate reverse current source graphic system is provided.
Object of the present invention is achieved through the following technical solutions: based on the beam excitation formula accurate reverse current source graphic system of gate-drive, it is by imageing sensor, the drive circuit be connected with this imageing sensor, the treatment circuit be connected with drive circuit, the asymmetric circuits for triggering of emitter-base bandgap grading manifold type be connected with treatment circuit, be serially connected in the accurate reverse current source circuit between drive circuit and treatment circuit, be serially connected in the beam excitation formula logic amplifying circuit between the asymmetric circuits for triggering of emitter-base bandgap grading manifold type and drive circuit, and the gate drive circuit be serially connected between drive circuit and beam excitation formula logic amplifying circuit forms.
Further, this gate drive circuit is by triode Q5, triode Q6, field effect transistor MOS1, unidirectional thyristor D5, negative pole is connected with the base stage of triode Q6, the electric capacity C16 that positive pole is then connected with drive circuit, the resistance R25 be in parallel with electric capacity C16, one end is connected with the positive pole of electric capacity C16, the resistance R24 of ground connection while the other end is then connected with the emitter of triode Q6, one end is connected with the collector electrode of triode Q5, the resistance R23 that the other end is then connected with the positive pole of electric capacity C16, be serially connected in the resistance R26 between the collector electrode of triode Q5 and base stage, N pole is connected with the collector electrode of triode Q6, the diode D4 that P pole is then connected with the grid of field effect transistor MOS1 after resistance R27, positive pole is connected with the emitter of triode Q6, the electric capacity C17 that negative pole is then connected with the grid of field effect transistor MOS1 after resistance R28, positive pole is connected with the negative pole of electric capacity C17, the electric capacity C18 that negative pole is then connected with the P pole of unidirectional thyristor D5, and positive pole is connected with the control pole of unidirectional thyristor D5, the electric capacity C19 that negative pole is then connected with beam excitation formula logic amplifying circuit forms, the base stage of described triode Q5 is connected with the collector electrode of triode Q6, its emitter is then connected with the P pole of diode D4, grounded drain, its source electrode of described field effect transistor MOS1 are then connected with the N pole of unidirectional thyristor D5.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C13 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C13, the resistance R17 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R17, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R18 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R19 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC1, the resistance R20 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R21 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P1, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P1, the output of described NAND gate IC3 is then connected with the negative pole of electric capacity C19, and the positive pole of polar capacitor C13 is connected with the asymmetric circuits for triggering of emitter-base bandgap grading manifold type.
Described accurate reverse current source circuit is by LMC6062 type operational amplifier P, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R15 that the other end is connected with the electrode input end of LMC6062 type operational amplifier P after current source S, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R22 that the other end is connected with the output of LMC6062 type operational amplifier P after LM4431 reference circuits, and the resistance R16 be serially connected between the electrode input end of LMC6062 type operational amplifier P and output forms, wherein, resistance R22 is connected with the input for the treatment of circuit with the tie point of LM4431 reference circuits, and the output of LMC6062 type operational amplifier P is then connected with the input of drive circuit.
The asymmetric circuits for triggering of described emitter-base bandgap grading manifold type are by the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filter circuit be connected with its output forms, wherein, described emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, be serially connected in the first-level filtering wave circuit between the emitter of triode Q2 and the base stage of triode Q3, be serially connected in the resistance R7 between the collector electrode of triode Q3 and the collector electrode of diode Q2, be serially connected in the resistance R3 between the collector electrode of triode Q1 and the collector electrode of triode Q2, be serially connected in the secondary filter circuit between the emitter of triode Q1 and passive π type filter circuit, be serially connected in three grades of filters between the base stage of triode Q1 and passive π type filter circuit, and the resistance R2 be serially connected between the base stage of triode Q1 and passive π type filter circuit and the resistance R6 be serially connected between the base stage of triode Q3 and passive π type filter circuit forms, the base stage of described triode Q2 is connected with the collector electrode of triode Q1, and its collector electrode is connected with passive π type filter circuit, the emitter of described triode Q2 and the equal ground connection of emitter of triode Q3.
Described passive π type filtered electrical routing capacitance C1, electric capacity C2, and the resistance R8 be serially connected between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms; The collector electrode of described triode Q2 is then connected with the positive pole of electric capacity C2, and the positive pole of described polar capacitor C13 is connected with the positive pole of electric capacity C1.
Described drive circuit is by high-speed driving chip K, triode Q4, the resistance R12 that one end is connected with the FX pin of high-speed driving chip K, the other end is connected with the base stage of triode Q1, the resistance R13 that one end is connected with the F1 pin of high-speed driving chip K, the other end is connected with the FC pin of high-speed driving chip K after electric capacity C11, and the resistance R14 that one end is connected with the emitter of triode Q4, the other end is connected with the BE pin of high-speed driving chip K after polar capacitor C12 forms; The grounded collector of described triode Q4, and described imageing sensor is then directly connected with the F2 pin of high-speed driving chip K; Meanwhile, the BN end of this high-speed driving chip K is connected with the positive pole of electric capacity C16, and the output of described LMC6062 type operational amplifier P is then connected with the M1 pin of high-speed driving chip K.
Described treatment circuit is by driving chip U, P pole is connected with the SW pin of driving chip U, the diode D1 of N pole ground connection after polar capacitor C6, one end is connected with the N pole of diode D1, the resistance R9 of ground connection while the other end is connected with the GND pin of driving chip U after resistance R10, one end is connected with the COMP pin of driving chip U, the electric capacity C7 of other end ground connection, one end is connected with the COMP pin of driving chip U, the resistance R11 of other end ground connection after electric capacity C8, and one end is connected with the SS pin of driving chip U, the electric capacity C9 of other end ground connection forms, described resistance R9 is also connected with the FB pin of driving chip U with the tie point of resistance R10, the MIN pin of described driving chip U is connected with the tie point of LM4431 reference circuits with resistance R22.
For guaranteeing result of use of the present invention, described driving chip U is LT1942 type integrated chip, and described high-speed driving chip K is EMD2050 type integrated chip.
Compared with prior art, tool has the following advantages and beneficial effect in the present invention:
(1) overall structure of the present invention is very simple, and after in conjunction with the asymmetric circuits for triggering of emitter-base bandgap grading manifold type, more traditional being greatly improved of its processing speed, the picture of process 1028*1028 pixel only needs 0.3s, is more than 20 times of conventional process speed.
(2) the present invention is integrated with LT1941 type integrated chip, EMD2050 high speed integrated chip, therefore can improve the picture frame treatment effeciency in the unit interval and recognition efficiency greatly.
(3) be designed with passive π type filter circuit in the asymmetric circuits for triggering of emitter-base bandgap grading manifold type of the present invention, therefore the present invention effectively can remove outside electromagnetic interference, guarantees the stable performance of system.
(4) the present invention adopts accurate reverse current source circuit to provide internal operating current for drive circuit and treatment circuit, therefore can guarantee the stability of whole system.
(5) the present invention adopts gate drive circuit as associated drive circuitry, thus can increase substantially recognition speed of the present invention, improves efficiency.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is gate drive circuit structural representation of the present invention.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
As shown in Figure 1, the present invention is by imageing sensor, the drive circuit be connected with this imageing sensor, the treatment circuit be connected with drive circuit, the asymmetric circuits for triggering of emitter-base bandgap grading manifold type be connected with treatment circuit, be serially connected in the accurate reverse current source circuit between drive circuit and treatment circuit, be serially connected in the beam excitation formula logic amplifying circuit between the asymmetric circuits for triggering of emitter-base bandgap grading manifold type and drive circuit, and the gate drive circuit be serially connected between drive circuit and beam excitation formula logic amplifying circuit forms.
Wherein, accurate reverse current source circuit is by LMC6062 type operational amplifier P, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R15 that the other end is connected with the electrode input end of LMC6062 type operational amplifier P after current source S, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R22 that the other end is connected with the output of LMC6062 type operational amplifier P after LM4431 reference circuits, and the resistance R16 be serially connected between the electrode input end of LMC6062 type operational amplifier P and output forms.
Described resistance R22 is connected with the input for the treatment of circuit with the tie point of LM4431 reference circuits, and the output of LMC6062 type operational amplifier P is then connected with the input of drive circuit.The described asymmetric circuits for triggering of emitter-base bandgap grading manifold type are primarily of the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filter circuit be connected with its output forms.Wherein, emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8 and electric capacity C3, electric capacity C4 and electric capacity C5 form.
Passive π type filter circuit is by electric capacity C1, electric capacity C2, and is serially connected in the low-pass filter circuit that the resistance R8 between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms.According to the actual requirements, this passive π type filter circuit also can be high-pass filtering circuit.During connection, the negative pole of electric capacity C1 is connected with the negative pole of electric capacity C2, forms a loop to guarantee resistance R8, between electric capacity C1 and electric capacity C2.For guaranteeing result of use, electric capacity C1 and electric capacity C2 is patch capacitor.
Described resistance R5 and electric capacity C3 is in parallel, and forms first-level filtering wave circuit; Resistance R4 and electric capacity C4 is in parallel, and forms secondary filter circuit; Resistance R1 and electric capacity C5 is in parallel, and forms three grades of filter circuits.
During connection, first-level filtering wave circuit is serially connected between the emitter of triode Q2 and the base stage of triode Q3, resistance R7 is serially connected between the collector electrode of triode Q3 and the collector electrode of diode Q2, resistance R3 is serially connected between the collector electrode of triode Q1 and the collector electrode of triode Q2, secondary filter circuit is then serially connected between the emitter of triode Q1 and the negative pole of electric capacity C2, and three grades of filters are then serially connected between the base stage of triode Q1 and the negative pole of electric capacity C2.
Described resistance R2 is serially connected between the base stage of triode Q1 and the negative pole of electric capacity C2, and resistance R6 is then serially connected between the base stage of triode Q3 and the negative pole of electric capacity C2.For guaranteeing result of use, the base stage of this triode Q2 is connected with the collector electrode of triode Q1, and its collector electrode is connected with the positive pole of electric capacity C2, the emitter of triode Q2 and the equal ground connection of emitter of triode Q3.
Drive circuit of the present invention is made up of high-speed driving chip K, triode Q4, resistance R12, resistance R13, resistance R14, electric capacity C11 and polar capacitor C12.Wherein, one end of resistance R12 is connected with the FX pin of high-speed driving chip K, the other end is connected with the base stage of triode Q1, one end of resistance R13 is connected with the F1 pin of high-speed driving chip K, the other end is connected with the FC pin of high-speed driving chip K after electric capacity C11, and one end of resistance R14 is connected with the emitter of triode Q4, the other end is connected with the BE pin of high-speed driving chip K after polar capacitor C12.Meanwhile, the grounded collector of triode Q4, and described imageing sensor is then directly connected with the F2 pin of high-speed driving chip K, the BN pin of high-speed driving chip K is then connected with gate drive circuit.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C13 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C13, the resistance R17 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R17, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R18 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R19 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC1, the resistance R20 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R21 that the other end is connected with the negative input of NAND gate IC2 forms.
The electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P1, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P1; The output of described NAND gate IC3 is then connected with gate drive circuit, and the positive pole of polar capacitor C13 is then connected with the positive pole of electric capacity C1.
For guaranteeing that the asymmetric circuits for triggering of emitter-base bandgap grading manifold type correct can act on high-speed driving chip K, therefore the BN end of this high-speed driving chip K needs to be connected with the positive pole of electric capacity C1.The output of LMC6062 type operational amplifier P is then connected with the M1 pin of high-speed driving chip K.
Described treatment circuit is by driving chip U, and diode D1, resistance R9, resistance R10, resistance R11, electric capacity C6, electric capacity C7, electric capacity C8 and electric capacity C9 form.During connection, the P pole of diode D1 is connected with the SW pin of driving chip U, its N pole ground connection after polar capacitor C6, ground connection while one end of resistance R9 is connected with the N pole of diode D1, the other end is connected with the GND pin of driving chip U after resistance R10, one end of electric capacity C7 is connected with the COMP pin of driving chip U, other end ground connection, one end of resistance R11 is connected with the COMP pin of driving chip U, other end ground connection after electric capacity C8, and one end of electric capacity C9 is connected with the SS pin of driving chip U, other end ground connection.
Simultaneously, resistance R9 is also connected with the FB pin of driving chip U with the tie point of resistance R10, the MIN pin of driving chip U is connected with the tie point of LM4431 reference circuits with resistance R22, and the S1 pin of driving chip U needs to be connected with the negative pole of electric capacity C1.For guaranteeing result of use, described driving chip U preferentially adopts LT1942 type integrated chip to realize, and high-speed driving chip K then preferentially adopts EMD2050 type integrated chip to realize.
This gate drive circuit is then inventive point place of the present invention, and as shown in Figure 2, it is by triode Q5, triode Q6, field effect transistor MOS1, unidirectional thyristor D5, resistance R23, resistance R24, resistance R25, resistance R26, resistance R27, resistance R28, electric capacity C16, electric capacity C17, electric capacity C18, electric capacity C19 and diode D4 form.
During connection, the negative pole of this electric capacity C16 is connected with the base stage of triode Q6, its positive pole is then connected with drive circuit, resistance R25 is then in parallel with electric capacity C16, resistance R25 and electric capacity C16 then forms a reshaper thus, this reshaper can be used for carrying out Shape correction to signal, avoids signal frequency to occur fluctuation.
Simultaneously, ground connection while one end of resistance R24 is connected with the positive pole of electric capacity C16, its other end is then connected with the emitter of triode Q6, one end of resistance R23 is connected with the collector electrode of triode Q5, its other end is then connected with the positive pole of electric capacity C16, between the collector electrode that resistance R26 is then serially connected in triode Q5 and base stage, the N pole of diode D4 is connected with the collector electrode of triode Q6, its P pole is then connected with the grid of field effect transistor MOS1 after resistance R27.At this moment this diode D4, triode Q5 and triode Q6 then form an amplifier, and it can carry out amplification process to signal.
The positive pole of this electric capacity C17 is connected with the emitter of triode Q6, its negative pole is then connected with the grid of field effect transistor MOS1 after resistance R28, the positive pole of electric capacity C18 is connected with the negative pole of electric capacity C17, its negative pole is then connected with the P pole of unidirectional thyristor D5, and the positive pole of electric capacity C19 is connected with the control pole of unidirectional thyristor D5, its negative pole is then connected with beam excitation formula logic amplifying circuit.The base stage of described triode Q5 is connected with the collector electrode of triode Q6, its emitter is then connected with the P pole of diode D4.Grounded drain, its source electrode of described field effect transistor MOS1 are then connected with the N pole of unidirectional thyristor D5.
This triode Q6 preferentially adopts NPN type triode, and triode Q7 then preferentially adopts PNP type triode, so then can provide enough gate currents, drives better to trigger field effect transistor MOS1.Meanwhile, in order to eliminate the oscillatory occurences that may occur, the electric capacity C17 in this gate drive circuit, electric capacity C18 and resistance R28 then form a damping filter, and it is for oscillation-damped phenomenon.
As mentioned above, just the present invention can be realized preferably.
Claims (8)
1. based on the beam excitation formula accurate reverse current source graphic system of gate-drive, it is by imageing sensor, the drive circuit be connected with this imageing sensor, the treatment circuit be connected with drive circuit, the asymmetric circuits for triggering of emitter-base bandgap grading manifold type be connected with treatment circuit, be serially connected in the accurate reverse current source circuit between drive circuit and treatment circuit, and the beam excitation formula logic amplifying circuit be serially connected between the asymmetric circuits for triggering of emitter-base bandgap grading manifold type and drive circuit forms, it is characterized in that: between drive circuit and beam excitation formula logic amplifying circuit, be also serially connected with gate drive circuit, this gate drive circuit is by triode Q5, triode Q6, field effect transistor MOS1, unidirectional thyristor D5, negative pole is connected with the base stage of triode Q6, the electric capacity C16 that positive pole is then connected with drive circuit, the resistance R25 be in parallel with electric capacity C16, one end is connected with the positive pole of electric capacity C16, the resistance R24 of ground connection while the other end is then connected with the emitter of triode Q6, one end is connected with the collector electrode of triode Q5, the resistance R23 that the other end is then connected with the positive pole of electric capacity C16, be serially connected in the resistance R26 between the collector electrode of triode Q5 and base stage, N pole is connected with the collector electrode of triode Q6, the diode D4 that P pole is then connected with the grid of field effect transistor MOS1 after resistance R27, positive pole is connected with the emitter of triode Q6, the electric capacity C17 that negative pole is then connected with the grid of field effect transistor MOS1 after resistance R28, positive pole is connected with the negative pole of electric capacity C17, the electric capacity C18 that negative pole is then connected with the P pole of unidirectional thyristor D5, and positive pole is connected with the control pole of unidirectional thyristor D5, the electric capacity C19 that negative pole is then connected with beam excitation formula logic amplifying circuit forms, the base stage of described triode Q5 is connected with the collector electrode of triode Q6, its emitter is then connected with the P pole of diode D4, grounded drain, its source electrode of described field effect transistor MOS1 are then connected with the N pole of unidirectional thyristor D5.
2. described in the graphic system of the beam excitation formula based on gate-drive according to claim 1 accurate reverse current source, it is characterized in that, described beam excitation formula logic amplifying circuit is primarily of power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C13 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C13, the resistance R17 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R17, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R18 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R19 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC1, the resistance R20 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R21 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P1, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P1, the output of described NAND gate IC3 is then connected with the negative pole of electric capacity C19, and the positive pole of polar capacitor C13 is connected with the asymmetric circuits for triggering of emitter-base bandgap grading manifold type,
Described accurate reverse current source circuit is by LMC6062 type operational amplifier P, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R15 that the other end is connected with the electrode input end of LMC6062 type operational amplifier P after current source S, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R22 that the other end is connected with the output of LMC6062 type operational amplifier P after LM4431 reference circuits, and the resistance R16 be serially connected between the electrode input end of LMC6062 type operational amplifier P and output forms, wherein, resistance R22 is connected with the input for the treatment of circuit with the tie point of LM4431 reference circuits, and the output of LMC6062 type operational amplifier P is then connected with the input of drive circuit.
3. described in the graphic system of the beam excitation formula based on gate-drive according to claim 2 accurate reverse current source, it is characterized in that, the asymmetric circuits for triggering of described emitter-base bandgap grading manifold type are by the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filter circuit be connected with its output forms, wherein, described emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, be serially connected in the first-level filtering wave circuit between the emitter of triode Q2 and the base stage of triode Q3, be serially connected in the resistance R7 between the collector electrode of triode Q3 and the collector electrode of diode Q2, be serially connected in the resistance R3 between the collector electrode of triode Q1 and the collector electrode of triode Q2, be serially connected in the secondary filter circuit between the emitter of triode Q1 and passive π type filter circuit, be serially connected in three grades of filters between the base stage of triode Q1 and passive π type filter circuit, and the resistance R2 be serially connected between the base stage of triode Q1 and passive π type filter circuit and the resistance R6 be serially connected between the base stage of triode Q3 and passive π type filter circuit forms, the base stage of described triode Q2 is connected with the collector electrode of triode Q1, and its collector electrode is connected with passive π type filter circuit, the emitter of described triode Q2 and the equal ground connection of emitter of triode Q3.
4. the beam excitation formula based on gate-drive according to claim 3 accurate reverse current source graphic system, it is characterized in that, described passive π type filtered electrical routing capacitance C1, electric capacity C2, and the resistance R8 be serially connected between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms; The collector electrode of described triode Q2 is then connected with the positive pole of electric capacity C2, and the positive pole of described polar capacitor C13 is connected with the positive pole of electric capacity C1.
5. the beam excitation formula based on gate-drive according to claim 4 accurate reverse current source graphic system, it is characterized in that, described drive circuit is by high-speed driving chip K, triode Q4, one end is connected with the FX pin of high-speed driving chip K, the resistance R12 that the other end is connected with the base stage of triode Q1, one end is connected with the F1 pin of high-speed driving chip K, the resistance R13 that the other end is connected with the FC pin of high-speed driving chip K after electric capacity C11, and one end is connected with the emitter of triode Q4, the resistance R14 that the other end is connected with the BE pin of high-speed driving chip K after polar capacitor C12 forms, the grounded collector of described triode Q4, and described imageing sensor is then directly connected with the F2 pin of high-speed driving chip K, meanwhile, the BN end of this high-speed driving chip K is connected with the positive pole of electric capacity C16, and the output of described LMC6062 type operational amplifier P is then connected with the M1 pin of high-speed driving chip K.
6. the beam excitation formula based on gate-drive according to claim 5 accurate reverse current source graphic system, it is characterized in that, described treatment circuit is by driving chip U, P pole is connected with the SW pin of driving chip U, the diode D1 of N pole ground connection after polar capacitor C6, one end is connected with the N pole of diode D1, the resistance R9 of ground connection while the other end is connected with the GND pin of driving chip U after resistance R10, one end is connected with the COMP pin of driving chip U, the electric capacity C7 of other end ground connection, one end is connected with the COMP pin of driving chip U, the resistance R11 of other end ground connection after electric capacity C8, and one end is connected with the SS pin of driving chip U, the electric capacity C9 of other end ground connection forms, described resistance R9 is also connected with the FB pin of driving chip U with the tie point of resistance R10, the MIN pin of described driving chip U is connected with the tie point of LM4431 reference circuits with resistance R22.
7. the beam excitation formula based on gate-drive according to claim 6 accurate reverse current source graphic system, it is characterized in that, described driving chip U is LT1942 type integrated chip.
8. the beam excitation formula based on gate-drive according to claim 6 accurate reverse current source graphic system, it is characterized in that, described high-speed driving chip K is EMD2050 type integrated chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510307091.8A CN104935777A (en) | 2014-11-25 | 2015-06-06 | Light beam excitation type precise reverse current source graph processing system based on gate drive |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2014106873529 | 2014-11-25 | ||
| CN201410687352.9A CN104394293A (en) | 2014-11-25 | 2014-11-25 | Light beam excitation type precision inverse current graphic processing system |
| CN201510307091.8A CN104935777A (en) | 2014-11-25 | 2015-06-06 | Light beam excitation type precise reverse current source graph processing system based on gate drive |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104935777A true CN104935777A (en) | 2015-09-23 |
Family
ID=52612126
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410687352.9A Pending CN104394293A (en) | 2014-11-25 | 2014-11-25 | Light beam excitation type precision inverse current graphic processing system |
| CN201510307091.8A Withdrawn CN104935777A (en) | 2014-11-25 | 2015-06-06 | Light beam excitation type precise reverse current source graph processing system based on gate drive |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410687352.9A Pending CN104394293A (en) | 2014-11-25 | 2014-11-25 | Light beam excitation type precision inverse current graphic processing system |
Country Status (1)
| Country | Link |
|---|---|
| CN (2) | CN104394293A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110707520A (en) * | 2019-09-20 | 2020-01-17 | 武汉光迅科技股份有限公司 | Drive circuit of directly-modulated laser and directly-modulated transmitter |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104394293A (en) * | 2014-11-25 | 2015-03-04 | 成都创图科技有限公司 | Light beam excitation type precision inverse current graphic processing system |
| CN104820105A (en) * | 2015-05-06 | 2015-08-05 | 成都诚邦动力测试仪器有限公司 | High-accuracy motor test system based on triode trigger circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100002163A1 (en) * | 2008-07-03 | 2010-01-07 | Nec Lcd Technologies, Ltd. | Liquid crystal display device and driving method of the same |
| CN103514840A (en) * | 2012-06-14 | 2014-01-15 | 瀚宇彩晶股份有限公司 | Integrated gate driving circuit and liquid crystal panel |
| CN104394293A (en) * | 2014-11-25 | 2015-03-04 | 成都创图科技有限公司 | Light beam excitation type precision inverse current graphic processing system |
-
2014
- 2014-11-25 CN CN201410687352.9A patent/CN104394293A/en active Pending
-
2015
- 2015-06-06 CN CN201510307091.8A patent/CN104935777A/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100002163A1 (en) * | 2008-07-03 | 2010-01-07 | Nec Lcd Technologies, Ltd. | Liquid crystal display device and driving method of the same |
| CN103514840A (en) * | 2012-06-14 | 2014-01-15 | 瀚宇彩晶股份有限公司 | Integrated gate driving circuit and liquid crystal panel |
| CN104394293A (en) * | 2014-11-25 | 2015-03-04 | 成都创图科技有限公司 | Light beam excitation type precision inverse current graphic processing system |
Non-Patent Citations (1)
| Title |
|---|
| 高玉奎: "《电工常用电子技术入门》", 31 December 2006 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110707520A (en) * | 2019-09-20 | 2020-01-17 | 武汉光迅科技股份有限公司 | Drive circuit of directly-modulated laser and directly-modulated transmitter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104394293A (en) | 2015-03-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104935777A (en) | Light beam excitation type precise reverse current source graph processing system based on gate drive | |
| CN104899570A (en) | Logic protecting emitter coupled fingerprint identification system based on constant current protection | |
| CN104469066A (en) | Novel light beam excitation type image processing system based on logic protection emitter-coupled type | |
| CN104967947A (en) | Low-pass filtering amplification audio processing system based on step-down constant current circuit | |
| CN204190848U (en) | A kind of graphic system based on accurate reverse current source | |
| CN104469065A (en) | Logic protection emitter coupling reverse current source graphic processing system | |
| CN204350112U (en) | A kind of beam excitation formula accurate reverse current source graphic system | |
| CN204316597U (en) | A kind of virtual protection emitter-base bandgap grading manifold type reverse current source graphic system | |
| CN204190826U (en) | A kind of trigger-type graphic system | |
| CN204316600U (en) | A kind of beam excitation formula graphic system | |
| CN204316598U (en) | The novel beam excitation formula graphic system of logic-based protection emitter-base bandgap grading manifold type | |
| CN104868848A (en) | Self-gain audio processing system based on capacitive feedback three-point oscillating circuit | |
| CN104469075A (en) | Light beam excitation type graphic processing system | |
| CN105847716A (en) | Signal amplification type high-definition image signal processing system based on current-constant source circuit | |
| CN104853505A (en) | Energy-saving power amplification type grid driving system based on gate driving | |
| CN104954946A (en) | Adjustable filtering frequency audio processing system based on buck-mode constant current | |
| CN104869723A (en) | Hybrid energy-saving grid drive system based on gate drive | |
| CN104932376A (en) | Common source amplification circuit-based phase-shift type high-frequency conversion oscillation system | |
| CN104936095A (en) | Audio processing system based on triode common-emitter symmetric amplification circuit | |
| CN204335051U (en) | A kind of raster data model system based on beam excitation and virtual protection formula | |
| CN204316470U (en) | A kind of emitter-base bandgap grading is coupled asymmetric virtual protection triggering system | |
| CN204347861U (en) | A kind of beam excitation formula fingerprint recognition system | |
| CN104461462A (en) | Novel logic protection emitter coupling type row address register system | |
| CN105872412A (en) | Constant-current high-definition image signal processing system based on electromagnetic noise reducing circuit | |
| CN204347863U (en) | A kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20150923 |
|
| WW01 | Invention patent application withdrawn after publication |