CN104469065A - Logic protection emitter coupling reverse current source graphic processing system - Google Patents
Logic protection emitter coupling reverse current source graphic processing system Download PDFInfo
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- CN104469065A CN104469065A CN201410712793.XA CN201410712793A CN104469065A CN 104469065 A CN104469065 A CN 104469065A CN 201410712793 A CN201410712793 A CN 201410712793A CN 104469065 A CN104469065 A CN 104469065A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/024—Details of scanning heads ; Means for illuminating the original
- H04N1/028—Details of scanning heads ; Means for illuminating the original for picture information pick-up
- H04N1/02805—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a two-dimensional array
Abstract
The invention discloses a logic protection emitter coupling reverse current source graphic processing system which is mainly composed of an image sensor, a drive circuit connected with the image sensor, a processing circuit connected with the drive circuit, an emitter coupling asymmetric trigger circuit connected with the processing circuit and a precise reverse current source circuit connected between the drive circuit and the processing circuit in series. The system is characterized in that a light beam excitation type logic amplifying circuit is connected between the emitter coupling asymmetric trigger circuit and the drive circuit in series and a logic protection emitter coupling amplifying circuit is further connected between the light beam excitation type logic amplifying circuit and the drive circuit in series. The logic protection emitter coupling reverse current source graphic processing system is quite simple in overall structure, and combined with the emitter coupling asymmetric trigger circuit, the system has the advantages that the processing speed is greatly increased compared with the traditional speed, an image with 1028 pixel *1028 pixel is processed only within 0.3 s, and the processing speed is more than 20 times of the traditional processing speed.
Description
Technical field
The invention belongs to technical field of image processing, specifically refer to a kind of virtual protection emitter-base bandgap grading manifold type reverse current source graphic system.
Background technology
At present, be that the image recognition product of representative emerges in an endless stream with scanner, it has enriched the life of people greatly.But, the recognition capability of these image recognition products has certain limitation at present, namely its image recognition rate and precision are still not high, in addition in identifying, there will be the situation that image or paper and scanning sensor imprecision are fitted, therefore can cause occurring distortion zone, actual effect can not be reflected really.Meanwhile, the drive circuit due to these image recognition products is also easily subject to the electromagnetic interference of external environment, and can not effectively remove current impulse, therefore its serviceability is also easily affected.
Summary of the invention
The object of the invention is to overcome the recognition speed existing for current image identification system, precision is not high, the defect of unstable properties, provides a kind of virtual protection emitter-base bandgap grading manifold type reverse current source graphic system.
Object of the present invention is achieved through the following technical solutions: a kind of virtual protection emitter-base bandgap grading manifold type reverse current source graphic system; primarily of imageing sensor; the drive circuit be connected with this imageing sensor; the treatment circuit be connected with drive circuit; the asymmetric circuits for triggering of emitter-base bandgap grading manifold type be connected with treatment circuit, and be serially connected in the accurate reverse current source circuit composition between drive circuit and treatment circuit.Meanwhile, between the asymmetric circuits for triggering of emitter-base bandgap grading manifold type and drive circuit, be serially connected with beam excitation formula logic amplifying circuit, between beam excitation formula logic amplifying circuit and drive circuit, be then also serially connected with virtual protection emitter-base bandgap grading manifold type amplifying circuit, described beam excitation formula logic amplifying circuit is primarily of power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C13 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C13, the resistance R17 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R17, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R18 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R19 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC1, the resistance R20 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R21 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P1, its output is connected with the electrode input end of NAND gate IC2, the electrode input end of NAND gate IC3 is connected with the output of power amplifier P1, and the positive pole of polar capacitor C13 is connected with the asymmetric circuits for triggering of emitter-base bandgap grading manifold type.
Described virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q5, triode Q6, power amplifier P2, power amplifier P3, be serially connected in the resistance R23 between the negative input of power amplifier P2 and output, be serially connected in the polar capacitor C18 between the electrode input end of power amplifier P3 and output, be serially connected in the resistance R22 between the electrode input end of power amplifier P2 and the collector electrode of triode Q5, be serially connected in the resistance R24 between the collector electrode of triode Q5 and the base stage of triode Q6, the electric capacity C17 be in parallel with resistance R24, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C16 that positive pole is connected with the emitter of triode Q5 after resistance R25, be serially connected in the resistance R26 between the base stage of triode Q6 and the positive pole of polar capacitor C16, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C19 that voltage stabilizing didoe D4 is connected with the output of power amplifier P2 after resistance R27, P pole is connected with the output of power amplifier P3, the diode D5 that N pole is connected with the tie point of resistance R27 with voltage stabilizing didoe D4 through resistance R29 after resistance R28 and P pole are connected with the negative pole of electric capacity C19, the voltage stabilizing didoe D6 that N pole is connected with the tie point of resistance R29 with diode D5 forms, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C16, and its emitter is connected with the emitter of triode Q6, and its collector electrode is connected with the negative input of power amplifier P2, the collector electrode of triode Q5 is connected with the negative input of power amplifier P3, and the electrode input end of power amplifier P3 is connected with the output of power amplifier P2, the positive pole of described polar capacitor C16 is then connected with drive circuit, and resistance R29 is connected with the output of NAND gate IC3 with the tie point of resistance R28.
Described accurate reverse current source circuit is by LMC6062 type operational amplifier P, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R15 that the other end is connected with the electrode input end of LMC6062 type operational amplifier P after current source S, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R14 that the other end is connected with the output of LMC6062 type operational amplifier P after LM4431 reference circuits, and the resistance R16 be serially connected between the electrode input end of LMC6062 type operational amplifier P and output forms, wherein, resistance R14 is connected with the input for the treatment of circuit with the tie point of LM4431 reference circuits, and the output of LMC6062 type operational amplifier P is then connected with the input of drive circuit.
The asymmetric circuits for triggering of described emitter-base bandgap grading manifold type are primarily of the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filter circuit be connected with its output forms, wherein, described emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, be serially connected in the first-level filtering wave circuit between the emitter of triode Q2 and the base stage of triode Q3, be serially connected in the resistance R7 between the collector electrode of triode Q3 and the collector electrode of diode Q2, be serially connected in the resistance R3 between the collector electrode of triode Q1 and the collector electrode of triode Q2, be serially connected in the secondary filter circuit between the emitter of triode Q1 and passive π type filter circuit, be serially connected in three grades of filters between the base stage of triode Q1 and passive π type filter circuit, and the resistance R2 be serially connected between the base stage of triode Q1 and passive π type filter circuit and the resistance R6 be serially connected between the base stage of triode Q3 and passive π type filter circuit forms, the base stage of described triode Q2 is connected with the collector electrode of triode Q1, and its collector electrode is connected with passive π type filter circuit, the emitter of described triode Q2 and the equal ground connection of emitter of triode Q3.
Described passive π type filtered electrical routing capacitance C1, electric capacity C2, and the resistance R8 be serially connected between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms; The collector electrode of described triode Q2 is then connected with the positive pole of electric capacity C2, and the positive pole of described polar capacitor C13 is connected with the positive pole of electric capacity C1.
Described drive circuit is by high-speed driving chip K, triode Q4, the resistance R12 that one end is connected with the FX pin of high-speed driving chip K, the other end is connected with the base stage of triode Q1, the resistance R13 that one end is connected with the F1 pin of high-speed driving chip K, the other end is connected with the FC pin of high-speed driving chip K after electric capacity C11, and the resistance R14 that one end is connected with the emitter of triode Q4, the other end is connected with the BE pin of high-speed driving chip K after polar capacitor C12 forms; The grounded collector of described triode Q4, and described imageing sensor is then directly connected with the F2 pin of high-speed driving chip K; Meanwhile, the BN end of this high-speed driving chip K is connected with the positive pole of polar capacitor C16, and the output of described LMC6062 type operational amplifier P is then connected with the M1 pin of high-speed driving chip K.
Described treatment circuit is by driving chip U, P pole is connected with the SW pin of driving chip U, the diode D1 of N pole ground connection after polar capacitor C6, one end is connected with the N pole of diode D1, the resistance R9 of other end ground connection after resistance R10, one end is connected with the COMP pin of driving chip U, the electric capacity C7 of other end ground connection, one end is connected with the COMP pin of driving chip U, the resistance R11 of other end ground connection after electric capacity C8, and one end is connected with the SS pin of driving chip U, the electric capacity C9 of other end ground connection forms; Described resistance R9 is also connected with the FB pin of driving chip U with the tie point of resistance R10; The MIN pin of described driving chip U is connected with the tie point of LM4431 reference circuits with resistance R14.
For guaranteeing result of use, described driving chip U is LT1942 type integrated chip, and described high-speed driving chip K is EMD2050 type integrated chip.
Compared with prior art, tool has the following advantages and beneficial effect in the present invention:
(1) overall structure of the present invention is very simple, and after in conjunction with the asymmetric circuits for triggering of emitter-base bandgap grading manifold type, more traditional being greatly improved of its processing speed, the picture of process 1028*1028 pixel only needs 0.3s, is more than 20 times of conventional process speed.
(2) the present invention is integrated with LT1941 type integrated chip, EMD2050 high speed integrated chip, therefore can improve the picture frame treatment effeciency in the unit interval and recognition efficiency greatly.
(3) be designed with passive π type filter circuit in the asymmetric circuits for triggering of emitter-base bandgap grading manifold type of the present invention, therefore the present invention effectively can remove outside electromagnetic interference, guarantees the stable performance of system.
(4) the present invention adopts accurate reverse current source circuit to provide internal operating current for drive circuit and treatment circuit, therefore can guarantee the stability of whole system.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is the structural representation of virtual protection emitter-base bandgap grading manifold type amplifying circuit of the present invention.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
As shown in Figure 1; the present invention is primarily of imageing sensor; the drive circuit be connected with this imageing sensor; the treatment circuit be connected with drive circuit; the asymmetric circuits for triggering of emitter-base bandgap grading manifold type be connected with treatment circuit; be serially connected in the accurate reverse current source circuit between drive circuit and treatment circuit; be serially connected in the beam excitation formula logic amplifying circuit between the asymmetric circuits for triggering of emitter-base bandgap grading manifold type and drive circuit, and the virtual protection emitter-base bandgap grading manifold type amplifying circuit be serially connected between beam excitation formula logic amplifying circuit and drive circuit forms.
Wherein, accurate reverse current source circuit is by LMC6062 type operational amplifier P, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R15 that the other end is connected with the electrode input end of LMC6062 type operational amplifier P after current source S, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R14 that the other end is connected with the output of LMC6062 type operational amplifier P after LM4431 reference circuits, and the resistance R16 be serially connected between the electrode input end of LMC6062 type operational amplifier P and output forms.
Described resistance R14 is connected with the input for the treatment of circuit with the tie point of LM4431 reference circuits, and the output of LMC6062 type operational amplifier P is then connected with the input of drive circuit.The described asymmetric circuits for triggering of emitter-base bandgap grading manifold type are primarily of the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filter circuit be connected with its output forms.Wherein, emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8 and electric capacity C3, electric capacity C4 and electric capacity C5 form.
Passive π type filter circuit is by electric capacity C1, electric capacity C2, and is serially connected in the low-pass filter circuit that the resistance R8 between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms.According to the actual requirements, this passive π type filter circuit also can be high-pass filtering circuit.During connection, the negative pole of electric capacity C1 is connected with the negative pole of electric capacity C2, forms a loop to guarantee resistance R8, between electric capacity C1 and electric capacity C2.For guaranteeing result of use, electric capacity C1 and electric capacity C2 is patch capacitor.
Described resistance R5 and electric capacity C3 is in parallel, and forms first-level filtering wave circuit; Resistance R4 and electric capacity C4 is in parallel, and forms secondary filter circuit; Resistance R1 and electric capacity C5 is in parallel, and forms three grades of filter circuits.
During connection, first-level filtering wave circuit is serially connected between the emitter of triode Q2 and the base stage of triode Q3, resistance R7 is serially connected between the collector electrode of triode Q3 and the collector electrode of diode Q2, resistance R3 is serially connected between the collector electrode of triode Q1 and the collector electrode of triode Q2, secondary filter circuit is then serially connected between the emitter of triode Q1 and the negative pole of electric capacity C2, and three grades of filters are then serially connected between the base stage of triode Q1 and the negative pole of electric capacity C2.
Described resistance R2 is serially connected between the base stage of triode Q1 and the negative pole of electric capacity C2, and resistance R6 is then serially connected between the base stage of triode Q3 and the negative pole of electric capacity C2.For guaranteeing result of use, the base stage of this triode Q2 is connected with the collector electrode of triode Q1, and its collector electrode is connected with the positive pole of electric capacity C2, the emitter of triode Q2 and the equal ground connection of emitter of triode Q3.
Drive circuit of the present invention is made up of high-speed driving chip K, triode Q4, resistance R12, resistance R13, resistance R14, electric capacity C11 and polar capacitor C12.Wherein, one end of resistance R12 is connected with the FX pin of high-speed driving chip K, the other end is connected with the base stage of triode Q1, one end of resistance R13 is connected with the F1 pin of high-speed driving chip K, the other end is connected with the FC pin of high-speed driving chip K after electric capacity C11, and one end of resistance R14 is connected with the emitter of triode Q4, the other end is connected with the BE pin of high-speed driving chip K after polar capacitor C12.Meanwhile, the grounded collector of triode Q4, and described imageing sensor is then directly connected with the F2 pin of high-speed driving chip K.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C13 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C13, the resistance R17 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R17, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R18 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R19 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC1, the resistance R20 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R21 that the other end is connected with the negative input of NAND gate IC2 forms.
The electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P1, its output is connected with the electrode input end of NAND gate IC2, the electrode input end of NAND gate IC3 is connected with the output of power amplifier P1, and the positive pole of polar capacitor C13 is then connected with the positive pole of electric capacity C1.
For guaranteeing that the asymmetric circuits for triggering of emitter-base bandgap grading manifold type correct can act on high-speed driving chip K, therefore the BN end of this high-speed driving chip K needs to be connected with the positive pole of electric capacity C1.The output of LMC6062 type operational amplifier P is then connected with the M1 pin of high-speed driving chip K.
Described treatment circuit is by driving chip U, and diode D1, resistance R9, resistance R10, resistance R11, electric capacity C6, electric capacity C7, electric capacity C8 and electric capacity C9 form.During connection, the P pole of diode D1 is connected with the SW pin of driving chip U, its N pole ground connection after polar capacitor C6, one end of resistance R9 is connected with the N pole of diode D1, other end ground connection after resistance R10, one end of electric capacity C7 is connected with the COMP pin of driving chip U, other end ground connection, one end of resistance R11 is connected with the COMP pin of driving chip U, other end ground connection after electric capacity C8, and one end of electric capacity C9 is connected with the SS pin of driving chip U, other end ground connection.
Simultaneously, resistance R9 is also connected with the FB pin of driving chip U with the tie point of resistance R10, the MIN pin of driving chip U is connected with the tie point of LM4431 reference circuits with resistance R14, and the S1 pin of driving chip U needs to be connected with the negative pole of electric capacity C1.For guaranteeing result of use, described driving chip U preferentially adopts LT1942 type integrated chip to realize, and high-speed driving chip K then preferentially adopts EMD2050 type integrated chip to realize.
The structure of virtual protection emitter-base bandgap grading manifold type amplifying circuit as shown in Figure 2, it is primarily of triode Q5, triode Q6, power amplifier P2, power amplifier P3, be serially connected in the resistance R23 between the negative input of power amplifier P2 and output, be serially connected in the polar capacitor C18 between the electrode input end of power amplifier P3 and output, be serially connected in the resistance R22 between the electrode input end of power amplifier P2 and the collector electrode of triode Q5, be serially connected in the resistance R24 between the collector electrode of triode Q5 and the base stage of triode Q6, the electric capacity C17 be in parallel with resistance R24, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C16 that positive pole is connected with the emitter of triode Q5 after resistance R25, be serially connected in the resistance R26 between the base stage of triode Q6 and the positive pole of polar capacitor C16, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C19 that voltage stabilizing didoe D4 is connected with the output of power amplifier P2 after resistance R27, P pole is connected with the output of power amplifier P3, the diode D5 that N pole is connected with the tie point of resistance R27 with voltage stabilizing didoe D4 through resistance R29 after resistance R28 and P pole are connected with the negative pole of electric capacity C19, the voltage stabilizing didoe D6 that N pole is connected with the tie point of resistance R29 with diode D5 forms.
Meanwhile, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C16, and its emitter is connected with the emitter of triode Q6, and its collector electrode is connected with the negative input of power amplifier P2; The collector electrode of triode Q5 is connected with the negative input of power amplifier P3, and the electrode input end of power amplifier P3 is connected with the output of power amplifier P2.
During connection, the positive pole of described polar capacitor C16 will be connected with the BN pin of high-speed driving chip K, and resistance R29 is connected with the output of NAND gate IC3 with the tie point of resistance R28.
As mentioned above, just the present invention can be realized preferably.
Claims (8)
1. a virtual protection emitter-base bandgap grading manifold type reverse current source graphic system, primarily of imageing sensor, the drive circuit be connected with this imageing sensor, the treatment circuit be connected with drive circuit, the asymmetric circuits for triggering of emitter-base bandgap grading manifold type be connected with treatment circuit, and the accurate reverse current source circuit composition be serially connected between drive circuit and treatment circuit, it is characterized in that, beam excitation formula logic amplifying circuit is serially connected with between the asymmetric circuits for triggering of emitter-base bandgap grading manifold type and drive circuit, virtual protection emitter-base bandgap grading manifold type amplifying circuit is then also serially connected with between beam excitation formula logic amplifying circuit and drive circuit, described beam excitation formula logic amplifying circuit is primarily of power amplifier P1, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P1, the polar capacitor C13 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C13, the resistance R17 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R17, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R18 that the other end is connected with the electrode input end of power amplifier P1, be serially connected in the resistance R19 between the negative input of power amplifier P1 and output, one end is connected with the output of NAND gate IC1, the resistance R20 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R21 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P1, its output is connected with the electrode input end of NAND gate IC2, the electrode input end of NAND gate IC3 is connected with the output of power amplifier P1, and the positive pole of polar capacitor C13 is connected with the asymmetric circuits for triggering of emitter-base bandgap grading manifold type, described virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q5, triode Q6, power amplifier P2, power amplifier P3, be serially connected in the resistance R23 between the negative input of power amplifier P2 and output, be serially connected in the polar capacitor C18 between the electrode input end of power amplifier P3 and output, be serially connected in the resistance R22 between the electrode input end of power amplifier P2 and the collector electrode of triode Q5, be serially connected in the resistance R24 between the collector electrode of triode Q5 and the base stage of triode Q6, the electric capacity C17 be in parallel with resistance R24, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C16 that positive pole is connected with the emitter of triode Q5 after resistance R25, be serially connected in the resistance R26 between the base stage of triode Q6 and the positive pole of polar capacitor C16, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C19 that voltage stabilizing didoe D4 is connected with the output of power amplifier P2 after resistance R27, P pole is connected with the output of power amplifier P3, the diode D5 that N pole is connected with the tie point of resistance R27 with voltage stabilizing didoe D4 through resistance R29 after resistance R28 and P pole are connected with the negative pole of electric capacity C19, the voltage stabilizing didoe D6 that N pole is connected with the tie point of resistance R29 with diode D5 forms, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C16, and its emitter is connected with the emitter of triode Q6, and its collector electrode is connected with the negative input of power amplifier P2, the collector electrode of triode Q5 is connected with the negative input of power amplifier P3, and the electrode input end of power amplifier P3 is connected with the output of power amplifier P2, the positive pole of described polar capacitor C16 is then connected with drive circuit, and resistance R29 is connected with the output of NAND gate IC3 with the tie point of resistance R28.
2. a kind of virtual protection emitter-base bandgap grading manifold type reverse current source according to claim 1 graphic system, it is characterized in that, described accurate reverse current source circuit is by LMC6062 type operational amplifier P, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R15 that the other end is connected with the electrode input end of LMC6062 type operational amplifier P after current source S, one end is connected with the negative input of LMC6062 type operational amplifier P, the resistance R14 that the other end is connected with the output of LMC6062 type operational amplifier P after LM4431 reference circuits, and the resistance R16 be serially connected between the electrode input end of LMC6062 type operational amplifier P and output forms, wherein, resistance R14 is connected with the input for the treatment of circuit with the tie point of LM4431 reference circuits, and the output of LMC6062 type operational amplifier P is then connected with the input of drive circuit.
3. described in the graphic system of a kind of virtual protection emitter-base bandgap grading manifold type reverse current source according to claim 2, it is characterized in that, the asymmetric circuits for triggering of described emitter-base bandgap grading manifold type are primarily of the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filter circuit be connected with its output forms, wherein, described emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, be serially connected in the first-level filtering wave circuit between the emitter of triode Q2 and the base stage of triode Q3, be serially connected in the resistance R7 between the collector electrode of triode Q3 and the collector electrode of diode Q2, be serially connected in the resistance R3 between the collector electrode of triode Q1 and the collector electrode of triode Q2, be serially connected in the secondary filter circuit between the emitter of triode Q1 and passive π type filter circuit, be serially connected in three grades of filters between the base stage of triode Q1 and passive π type filter circuit, and the resistance R2 be serially connected between the base stage of triode Q1 and passive π type filter circuit and the resistance R6 be serially connected between the base stage of triode Q3 and passive π type filter circuit forms, the base stage of described triode Q2 is connected with the collector electrode of triode Q1, and its collector electrode is connected with passive π type filter circuit, the emitter of described triode Q2 and the equal ground connection of emitter of triode Q3.
4. a kind of virtual protection emitter-base bandgap grading manifold type reverse current source according to claim 3 graphic system, it is characterized in that, described passive π type filtered electrical routing capacitance C1, electric capacity C2, and the resistance R8 be serially connected between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms; The collector electrode of described triode Q2 is then connected with the positive pole of electric capacity C2, and the positive pole of described polar capacitor C13 is connected with the positive pole of electric capacity C1.
5. a kind of virtual protection emitter-base bandgap grading manifold type reverse current source according to claim 4 graphic system, it is characterized in that, described drive circuit is by high-speed driving chip K, triode Q4, one end is connected with the FX pin of high-speed driving chip K, the resistance R12 that the other end is connected with the base stage of triode Q1, one end is connected with the F1 pin of high-speed driving chip K, the resistance R13 that the other end is connected with the FC pin of high-speed driving chip K after electric capacity C11, and one end is connected with the emitter of triode Q4, the resistance R14 that the other end is connected with the BE pin of high-speed driving chip K after polar capacitor C12 forms, the grounded collector of described triode Q4, and described imageing sensor is then directly connected with the F2 pin of high-speed driving chip K, meanwhile, the BN end of this high-speed driving chip K is connected with the positive pole of polar capacitor C16, and the output of described LMC6062 type operational amplifier P is then connected with the M1 pin of high-speed driving chip K.
6. a kind of virtual protection emitter-base bandgap grading manifold type reverse current source according to claim 5 graphic system, it is characterized in that, described treatment circuit is by driving chip U, P pole is connected with the SW pin of driving chip U, the diode D1 of N pole ground connection after polar capacitor C6, one end is connected with the N pole of diode D1, the resistance R9 of other end ground connection after resistance R10, one end is connected with the COMP pin of driving chip U, the electric capacity C7 of other end ground connection, one end is connected with the COMP pin of driving chip U, the resistance R11 of other end ground connection after electric capacity C8, and one end is connected with the SS pin of driving chip U, the electric capacity C9 of other end ground connection forms, described resistance R9 is also connected with the FB pin of driving chip U with the tie point of resistance R10, the MIN pin of described driving chip U is connected with the tie point of LM4431 reference circuits with resistance R14.
7. a kind of virtual protection emitter-base bandgap grading manifold type reverse current source according to claim 6 graphic system, it is characterized in that, described driving chip U is LT1942 type integrated chip.
8. a kind of virtual protection emitter-base bandgap grading manifold type reverse current source according to claim 7 graphic system, it is characterized in that, described high-speed driving chip K is EMD2050 type integrated chip.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410712793.XA CN104469065A (en) | 2014-11-28 | 2014-11-28 | Logic protection emitter coupling reverse current source graphic processing system |
| CN201510315879.3A CN104935778A (en) | 2014-11-28 | 2015-06-10 | Coupled reverse current source graph processing system based on constant-current protection |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410712793.XA CN104469065A (en) | 2014-11-28 | 2014-11-28 | Logic protection emitter coupling reverse current source graphic processing system |
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| CN104469065A true CN104469065A (en) | 2015-03-25 |
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| CN201410712793.XA Pending CN104469065A (en) | 2014-11-28 | 2014-11-28 | Logic protection emitter coupling reverse current source graphic processing system |
| CN201510315879.3A Withdrawn CN104935778A (en) | 2014-11-28 | 2015-06-10 | Coupled reverse current source graph processing system based on constant-current protection |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104935778A (en) * | 2014-11-28 | 2015-09-23 | 成都冠深科技有限公司 | Coupled reverse current source graph processing system based on constant-current protection |
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| JP5131540B2 (en) * | 2008-05-20 | 2013-01-30 | 株式会社村田製作所 | RF power amplifier and RF power amplifier |
| CN201956897U (en) * | 2010-09-19 | 2011-08-31 | 石家庄国耀电子科技有限公司 | Logical link control (LLC) topology circuit output overcurrent constant current protection circuit for switching power supply |
| CN104469065A (en) * | 2014-11-28 | 2015-03-25 | 成都创图科技有限公司 | Logic protection emitter coupling reverse current source graphic processing system |
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| CN104935778A (en) * | 2014-11-28 | 2015-09-23 | 成都冠深科技有限公司 | Coupled reverse current source graph processing system based on constant-current protection |
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Application publication date: 20150325 |