CN104810330B - 电子器件和用于制作电子器件的方法 - Google Patents

电子器件和用于制作电子器件的方法 Download PDF

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Publication number
CN104810330B
CN104810330B CN201510042301.5A CN201510042301A CN104810330B CN 104810330 B CN104810330 B CN 104810330B CN 201510042301 A CN201510042301 A CN 201510042301A CN 104810330 B CN104810330 B CN 104810330B
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electrode
contact element
semiconductor chip
electronics via
via devices
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CN104810330A (zh
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J.赫格劳尔
李徳森
R.奥特伦巴
K.希斯
X.施勒格尔
J.施雷德尔
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本文涉及电子器件和用于制作电子器件的方法。一种电子器件包括包含电极的半导体芯片、衬底元件和接触元件，该接触元件将电极连接到衬底元件。该电子器件进一步包含密封剂，该密封剂被配置成使接触元件至少部分暴露，使得热沉可以被连接到接触元件。

Description

电子器件和用于制作电子器件的方法
技术领域
本发明涉及电子器件和用于制作电子器件的方法。
背景技术
包括半导体芯片的电子器件可以展现寄生的源极或发射极电感和寄生的漏极或集电极电感。源极/发射极电感可以是比漏极/集电极电感更重要得多。减小寄生电感可以改进电子器件的效率。
出于这些和其它原因，存在对本发明的需要。
附图说明
图1A－1F以横截面视图示出电子器件的实施例。
图2以横截面视图示出电子器件的进一步实施例。
图3A－3D示出电子器件的进一步实施例。图3A－3C示出顶视图并且图3D示出横截面视图。
图4以横截面视图示出电子器件的实施例。
图5以横截面视图示出电子器件的实施例。
图6示出用于制作电子器件的方法的实施例的流程图。
具体实施方式
现在参考附图来描述方面和实施例。在下面的描述中，出于解释的目的，阐明许多特定的细节以便提供对实施例的一个或多个方面的透彻理解。要理解的是，在不脱离本发明的范围的情况下，可以利用其它实施例并且可以做出结构或逻辑的改变。应该进一步注意的是，附图并不是成比例或不是必要成比例。
在下面的详细描述中参考附图，附图形成本文的部分并且在附图中通过图示的方式示出了在其中可以实践本发明的特定实施例。然而，对于本领域的技术人员可以显而易见的是，可以用这些特定细节的更低程度来实践实施例的一个或多个方面。在其它实例中，以示意性形式来示出已知的结构和元件，以便促进描述实施例的一个或多个方面。在这点上，参考正被描述的（一个或多个）附图的定向来使用方向术语诸如“顶”、“底”、“左”、“右”、“上”、“下”等。因为可以以多种不同的定向将实施例的部件定位，所以方向术语是为了图示的目的使用的而绝非加以限制。要理解的是，在不脱离本发明的范围的情况下，可以利用其它实施例并且可以进行结构的或逻辑的改变。因此，下面的详细描述不要以限制的意义理解，并且本发明的范围由所附权利要求来限定。
此外，虽然可以仅关于若干实施方式中的一个来公开实施例中的具体的特征或方面，但是这样的特征或方面可以与其他实施方式中的一个或多个其它特征或方面相结合，如对于任何给定或具体的应用而可能是所期望和有利的，除非特别地另外注释或除非技术约束。而且，就在具体描述或权利要求中使用术语“包含”、“含有”、“具有”或它们的其它变型来说，这些术语旨在与术语“包括”类似的方式是包含性的。术语“耦合”和“连接”与它们的派生词一起，可以被使用。应当理解的是，这些术语可以用来指示两个元件互相协作或相互作用而不管它们处于直接的物理接触或电接触，还是它们不处于直接的相互接触；在“接合”、“附接”、或“连接”的元件之间可以提供介入元件或层。而且，术语“示例性”仅仅意味着作为示例而不是最佳或最优的。因此，下面的详细描述不要以限制的意义理解，并且本发明的范围由所附权利要求来限定。
下面进一步描述的（一个或多个）半导体芯片可以具有不同类型，可以通过不同的技术来制造并且可以例如包含集成的电、电光或电机械电路和/或无源、逻辑集成的电路、控制电路、微处理器、存储器器件等。
电子器件和用于制作电子器件的方法的实施例可以使用各种类型的半导体芯片或被合并在半导体芯片中的电路，其中有AC/DC或DC/DC转换器电路、功率MOS晶体管、功率肖特基二极管、JFET（结型栅极场效应晶体管）、功率双极型晶体管、逻辑集成电路、模拟集成电路、混合信号集成电路、传感器电路、MEMS（微机电系统）、功率集成电路、具有集成无源器件的芯片等。实施例也可以使用半导体芯片，该半导体芯片包括MOS晶体管结构或垂直晶体管结构，像例如IGBT（绝缘栅双极型晶体管）结构或大体上在其中至少一个电接触焊盘被布置在半导体芯片的第一主表面上并且至少一个其它电接触焊盘被布置在与半导体芯片的第一主表面相对的半导体芯片的第二主表面上的晶体管结构。而且，绝缘材料的实施例可以例如被用于提供各种类型的外壳中的绝缘层以及用于电路和部件的绝缘，和/或用于提供各种类型的半导体芯片或被合并在半导体芯片中的电路（包括上面提到的半导体芯片和电路）中的绝缘层。
（一个或多个）半导体芯片能够从特定的半导体材料（例如Si、SiC、SiGe、GaAs、GaN）中或从任何其它半导体材料中来制造，并且此外可以含有不是半导体的无机和有机材料（诸如例如绝缘体、塑料或金属）中的一个或多个。
本文所考虑的（一个或多个）半导体芯片可以是薄的。为了允许对半导体芯片的处置或操纵（例如，对于封装、eWLP（嵌入晶圆级封装）或半导体器件组装所要求的处置/操纵），半导体芯片可以形成复合芯片的部分。复合芯片可以包括半导体芯片和被固定到半导体芯片的加强的芯片。加强的芯片给复合芯片增加稳定性和/或强度以使它可管理。
下面描述的器件可以包含一个或多个半导体芯片。通过示例的方式，可以包含一个或多个半导体功率芯片。进一步，一个或多个逻辑集成电路可以被包含在器件中。逻辑集成电路可以被配置成控制其它半导体芯片的集成电路（例如功率半导体芯片的集成电路）。逻辑集成电路可以被实施在逻辑芯片中。
（一个或多个）半导体芯片可以具有允许与在（一个或多个）半导体芯片中所包含的集成电路达成电接触的接触焊盘（或电极）。该电极可以全部被布置在（一个或多个）半导体芯片的仅一个主面或被布置在（一个或多个）半导体芯片的两个主面。它们可以包含施加到（一个或多个）半导体芯片的半导体材料的一个或多个电极金属层。可以按任何期望的几何形状和任何期望的材料成分来制造电极金属层。例如，它们可以包括以下组中所选择的材料或用以下组中所选择的材料制成：Cu、Ni、NiSn、Au、Ag、Pt、Pd、这些金属中的一个或多个的合金、导电有机材料或导电半导体材料。
可以将（一个或多个）半导体芯片接合到载体。载体可以是被用于封装的（永久）器件载体。载体可以包括或由任何种类的材料（如例如，陶瓷或金属材料、铜或铜合金或铁/镍合金）组成。载体能够与（一个或多个）半导体芯片的一个接触元件机械连接和电连接。（一个或多个）半导体芯片能够通过回流焊接、真空焊接、扩散焊接或借助于导电粘合剂的粘合中的一个或多个被连接到载体。如果扩散焊接被用作（一个或多个）半导体芯片与载体之间的连接技术，则焊料材料能够被使用，其由于在焊接工艺之后的界面扩散过程导致半导体与载体之间的界面处的金属间相。在铜或铁/镍载体的情况下，使用包括AuSn、AgSn、CuSn、AgIn、AuIn或CuIn或由AuSn、AgSn、CuSn、AgIn、AuIn或CuIn组成的焊料材料是因此所期望的。可替代地，如果（一个或多个）半导体芯片要被粘合到载体，则能够使用导电粘合剂。例如，该粘合剂能够是基于能够富含有金、银、镍或铜的粒子以增强它们的导电率的环氧树脂。
（一个或多个）半导体芯片的接触元件可以包括扩散阻挡层。该扩散阻挡层防止在扩散焊接的情况下焊料材料从载体扩散到（一个或多个）半导体芯片中。例如，接触元件上的薄的钛层可以实现这样的扩散阻挡层。
例如，可以通过焊接、胶合、或烧结来完成将（一个或多个）半导体芯片接合到载体。在通过焊接将（一个或多个）半导体芯片附着的情况下，软焊料材料或特别是能够形成扩散焊料接合的焊料材料可以被使用，例如，包括选自以下组中的一个或多个金属材料的焊料材料：Sn、SnAg、SnAu、SnCu、In、InAg、InCu和InAu。
（一个或多个）半导体芯片可以用密封材料被覆盖以便被嵌入在密封剂（人工晶圆）中用于eWLP处理或在被接合到器件载体（衬底）之后被嵌入在密封剂中。密封材料可以是电绝缘的。密封材料可以包括或由任何适当的塑料或聚合物材料（诸如例如硬质塑料材料、热塑料材料或热固材料或层压材料（预浸渍材料））制成，并且例如可以含有填充剂材料。可以采用各种技术来用密封材料将（一个或多个）半导体芯片密封，例如压缩成型、注入成型、粉末成型、液体成型或者层压。热和/或压力可以用来施加密封材料。
在若干实施例中，层或层堆叠被相互施加或材料被施加或沉积到层上。应当意识到的是，任何这样的术语如“施加”或“沉积”意图在字面上覆盖将层施加在彼此上的所有种类和技术。特别地，它们意图覆盖层同时作为一个整体被施加所用的技术（像例如层压技术）以及层以顺序的方式被沉积所用的技术（像例如溅射、镀敷、成型、CVD等）。
在下面的描述和权利要求中，按具体顺序的工艺或措施特别地以流程图来描述用于制作电子器件的方法的不同实施例。要注意的是，实施例不应当被限制到所描述的具体顺序。不同工艺或措施的具体一些或所有也能够同时或以任何其它有用和适当的顺序被实行。
下面描述的电子器件可以是通孔电子器件，其可以被配置用于在印刷电路板（PCB）上安装。特别地，下面描述的电子器件可以被认为（count）在晶体管轮廓（像例如TO-220或TO-247）当中。
电子器件的实施例可以包括半导体芯片，该半导体芯片包括第一电极和第二电极，该第一电极可以是在第一表面上的源极电极，该第二电极可以是在与半导体芯片的第一表面相对的第二表面上的漏极电极。半导体芯片可以被放置在衬底元件（也可以被称为载体）上，使得第二电极被电连接到载体。载体在一些实施例中可以是引线框架。包括载体的电子器件的侧可以被称为背侧并且与背侧相对的侧可以被称为电子器件的前侧。
在一些实施例中，第一电极可以是发射极电极并且第二电极可以是集电极电极。
电子器件的实施例可以进一步包括热沉，其中该热沉可以被配置成发出在半导体芯片的正常操作期间所产生的热，特别是在其中半导体芯片是功率半导体芯片的实施例中。热沉可以被连接到半导体芯片的第一电极（源极或发射极电极）。将热沉连接到第一电极而不是连接到第二电极（漏极或集电极电极）和载体可以改进电子器件的效率。
热沉可以经由接触元件被连接到第一电极，该接触元件被配置成将第一电极电连接到电子器件的外部接触。热沉可以被热连接和电连接到接触元件，或电绝缘可以被使用以便将热沉仅热连接而不是电连接到接触元件。
电子器件的实施例可以包括被配置来密封半导体芯片的密封材料或密封剂。为了将热沉连接到接触元件，密封剂可以被配置使得接触元件至少部分被暴露。在本文中“暴露”部分是没被包围并且因此从外部是可接近的部分。根据一些实施例，这通过以下被实现：首先施加密封剂使得接触元件被完全密封并且然后将结构化步骤施加到密封剂。例如，结构化步骤可以包括研磨步骤。研磨可以使用本领域众所周知的技术来完成。例如，研磨可以包括机械移除密封剂的部分。根据其它实施例，在密封步骤期间密封剂被施加使得至少接触元件的部分不被密封剂所覆盖并且保持暴露。
将热沉连接到接触元件可以使用任何适当的手段来实现。例如，它可以包括施加焊料或粘合剂或拧紧或夹紧或这些中的任何适当结合。
电子器件的实施例可以包括进一步元件，像例如连接到载体的第二热沉。
关于图1A－1F，电子器件100的实施例的横截面视图被示出。图1A示出半导体芯片10，该半导体芯片10包括第一表面上的第一电极10A和与第一表面相对的第二表面上的第二电极10B。根据实施例，半导体芯片10可以进一步包括第一表面上的第三电极10C。根据实施例，第一电极10A可以是源极电极，第二电极10B可以是漏极电极并且第三电极10C可以是栅极电极。根据另一个实施例，第一电极10A可以是发射极电极，第二电极10B可以是集电极电极并且第三电极10C可以是基极电极。
关于图1B，第一衬底20和第二衬底30被示出。半导体芯片10被放置在第二衬底30上并且被机械固定在第二衬底30上，使得半导体芯片的第二表面面向第二衬底30。第二电极10B可以被电连接到第二衬底。如已经所提到的，第二衬底可以被称为载体并且特别可以包括引线框架。第一衬底20可以包括第一外部接触，该第一外部接触被配置成从外部电接触第一电极10A，如下面所描述的。相反地，第二衬底30可以包括第二外部接触，该第二外部接触被配置成从外部电接触第二电极10B。此外，电子器件100可以包括第三外部接触，该第三外部接触被配置成电接触第三电极10C。第一外部接触、第二外部接触和第三外部接触可以包括被配置用于PCB的通孔接触中的输入的引线。注意的是，第一和第二衬底元件不必处于与在图1B－1F中所描述的相同的平面中。相反，在一些实施例中，第一和衬底元件可以处于在第二衬底元件（像例如在图3B－3D中的实施例中所示出）之上或之下的平面中。
关于图1C，接触元件40被示出。接触元件40被配置成将第一电极10A电连接到第一衬底20。根据一些实施例，接触元件40可以包括接触夹子。接触元件40可以包括与第一和第二衬底20、30相同的材料并且可以特别地包括铜。根据一些实施例，接触元件40由一个单个部件组成，并且根据其它实施例，接触元件40可以包括若干电连接的部件。注意的是，接触元件40的形状可以脱离这里示出的简单的示例性形状。形状可以取决于具体实施例的要求。然而，在一些实施例中，对于接触元件可能有利的是具有平坦表面40A。
关于图1D，密封半导体芯片10、接触元件40以及第一和第二衬底元件20、30的部分的密封剂50被示出。根据用于制作电子器件的方法的实施例，密封剂50被结构化使得接触元件40变得至少部分暴露。特别地，密封剂50可以从表面50A被至少部分移除下至平面P，使得接触元件40的表面40A的至少部分变得暴露。根据实施例，暴露表面40A包括从表面50A对密封剂50研磨下至平面P。
关于图1E，具有密封剂表面50B的包括暴露的接触夹子表面40A的电子器件100的实施例被示出。根据实施例，这里示出的电子器件100可以是关于图1D所描述的部分密封剂移除的产物。根据另一个实施例，密封剂移除步骤不是必要的，因为密封剂被施加使得接触元件表面40A从来不被密封。例如，可以使用掩模来防止接触元件表面40A被密封。
根据又一个实施例，半导体芯片10以及第一和第二衬底元件20、30被提供。然后，密封剂50被施加到半导体芯片和衬底元件。之后，密封剂50使用本领域已知的适当的微结构化技术来结构化，以在密封剂50中以接触元件40的形状来制作腔体。然后，该腔体使用本领域已知的技术（像镀敷技术）填充有导电材料，以制作接触元件40。根据这个实施例，密封剂50可以包括层压材料。
注意的是，接触元件表面40A不必与密封剂表面50B共面。根据实施例，接触元件40伸出密封剂表面50B，使得连接表面40A与相对的表面40B的接触元件40的侧表面至少部分暴露。根据另一个实施例，表面40A处在表面50B以下的平面中，像在关于图2所示出的电子器件的实施例200中。
关于图1F，包括热沉60的电子器件100的实施例被示出。根据实施例，夹具70被用来机械固定接触元件40上的热沉60。夹具70可以包括被配置成固定接触元件上的热沉的螺钉。夹具可以位于半导体芯片10的第一表面之上，如在图1F中所示出。可替代地，夹具可以位于接触夹子的区域，该区域不处于半导体芯片10的第一表面之上。根据实施例，电绝缘层被施加在接触元件与热沉之间，使得两者是热连接的而不是电连接的。
根据实施例，夹子被用来固定接触元件上的热沉。该夹子可以代替螺钉被使用或与螺钉一起被使用。此外，粘合剂和焊料中的一个或多个可以被用来固定接触元件40上的热沉60。根据实施例，使用粘合剂和焊料中的一个或多个但没有螺钉或没有夹子或没有螺钉且也没有夹子。
热沉60可以包括散热片，像在图1F中示例性示出的散热片60A。热沉可以包括金属（像例如铜）或金属合金，特别地它可以包括与接触元件相同的材料。热沉可以具有任何适当的尺寸和任何适当的形状。半导体芯片10与接触元件40之间以及接触元件40与热沉60之间的接触被配置，使得热可以高效地从半导体芯片和接触元件传递到热沉。
根据一些实施例，热沉被密封剂50部分覆盖。在一个实施例中，热沉被覆盖使得仅散热片60A是从密封剂暴露的。
关于图2，电子器件200的实施例被示出。电子器件200在密封剂50的配置中不同于电子器件100，使得仅接触元件40的表面40A的部分是暴露的。热沉仍然可以被附着，使得它接触接触元件的暴露的部分。密封剂可以包括暴露接触元件的不同部分的多于一个的开口。
关于图3A－3D，电子器件300的实施例的制作的示例性阶段被示出。电子器件300可以包括与电子器件100同样的部分，其可以用相同的参考被注明。图3A示出包括第一表面上的第一电极10A和第三电极10C的半导体芯片10。半导体芯片可以进一步包括与第一表面相对的第二表面上的第二电极。半导体芯片10被布置在第二衬底元件30上使得第二电极被电连接到它。第二衬底元件可以包括第二引线30A和装配（montage）孔30B。电子器件300进一步包括第一衬底元件20和第三衬底元件21，所述第一衬底元件20包括第一引线20A，所述第三衬底元件21包括第三引线21A。
关于图3B，第一接触元件40和第二接触元件41被示出。第一接触元件40被配置成将第一电极10A电连接到第一衬底元件20。第一接触元件40可以包括接触夹子。第二接触元件41被配置成将第三电极10C电连接到第三衬底元件21。第二接触元件21可以包括接合线。
关于图3C，密封剂50被示出。密封剂50可以被配置成密封半导体芯片10和第二接触元件41以及第一、第二和第三衬底元件20、30、21和第一接触元件40中的至少部分。如能够看出，第一接触元件上表面40A的至少部分是从密封剂50暴露的。
关于图3D，沿着图3C中的线A－A′的电子器件300的横截面视图被示出。引线20A、30A和21A不需要在与将半导体芯片10安装在其上的第二衬底元件30的那部分相同的平面中。
关于图4，半导体器件400的实施例被示出。半导体器件400包括接触夹子，所述接触夹子包括多个部件42－45。根据实施例，一个或多于一个或所有部件42－45通过镀覆来制作。根据实施例，部件42－45在用密封剂50密封和密封剂50的随后微结构化之后被制作。根据另一个实施例，部件42－45在密封之前被制作。部件42－45可以包括相同的材料或材料成分。部件42－45也可以包括不同的材料或不同的材料成分。
根据实施例，所有的部件42－45是导电和导热的。根据另一个实施例，部件42－45中的至少一个是导热的而不是导电的。然而，部件42－45仍然被配置使得在第一电极10A与第一衬底元件20之间存在导电连接。
关于图5，电子器件500的实施例被示出。电子器件50的前侧不是平坦的而包括阶梯S，其中根据实施例，阶梯高度可以小于2mm、特别地小于1mm、或小于500μm或小于200μm。小的阶梯高度当在电子器件500的前侧上布置热沉60时可能是有利的。根据实施例，电子器件500可以进一步包括装配孔30B。
注意的是，在图5描绘的实施例中，密封剂被配置使得仅上接触元件表面40A和引线20A、30A和21A是暴露的。特别地，第二衬底元件30在密封剂背侧50C处不是暴露的。根据另一个实施例，第二衬底元件30是至少部分暴露的。
关于图6，用于制作电子器件的方法600的流程图被示出。方法600包括步骤601－603。步骤601包括提供包括第一电极的半导体芯片以及提供第一衬底元件。步骤602包括使用接触元件将第一电极电连接到第一衬底元件。步骤603包括提供密封半导体芯片的密封剂，其中密封剂被配置成至少部分暴露接触元件。方法600可以包括额外的步骤，其中额外的步骤包括将热沉连接到至少部分暴露的接触夹子。
尽管已详细地描述了本发明及其优点，但应当理解的是，在不脱离如由所附的权利要求限定的本发明的精神和范围的情况下，在本文中能够进行各种变化、替代和更改。
此外，本申请的范围不旨在限制于说明书中描述的工艺、机器、制造、物质的成分、装置、方法和步骤的具体实施例。如本领域的一个普通技术人员将容易地从本发明的公开中理解到，根据本发明可以利用与在本文中描述的对应的实施例执行基本上相同功能或实现基本上相同结果的现存的或后来要发展的工艺、装置、方法或步骤。因此，所附的权利要求旨在在其范围内包含这样的工艺、装置、方法或步骤。
虽然已关于一个或多个实施方式图示并描述了本发明，但在不脱离所附权利要求的精神和范围的情况下，可以对图示的示例进行更改和/或修改。尤其针对由上面描述的部件或结构（组件、器件、电路、系统等）执行的各种功能，除非另外指示，用来描述这样的部件的术语（包括对“装置”的参考）旨在对应于执行所描述部件的指定功能的任何部件或结构（例如其在功能上等效），即使在结构上与执行在这里图示的本发明示例性实施方式中的功能的所公开结构不等效。

Claims (20)

1.一种电子通孔器件，包括：
半导体芯片，包括所述半导体芯片的第一表面上的第一电极；
密封剂，将半导体芯片密封；
第一衬底元件，包括第一外部接触，所述第一外部接触被配置用于PCB的通孔接触中的输入；以及
接触元件，被配置成将第一电极连接到所述第一衬底元件；
其中所述密封剂被配置成至少部分暴露所述接触元件。
2.权利要求1的所述电子通孔器件，进一步包括热连接到所述接触元件的热沉。
3.权利要求2的所述电子通孔器件，其中所述热沉经由螺钉和夹子中的一个或多个被机械固定在所述接触元件上。
4.权利要求1的所述电子通孔器件，其中所述密封剂包括在包括所述至少部分暴露的接触元件的所述密封剂的前侧上的阶梯。
5.权利要求1的所述电子通孔器件，其中所述接触元件包括接触夹子。
6.权利要求5的所述电子通孔器件，其中所述接触夹子是一个接连的部件。
7.权利要求5的所述电子通孔器件，其中所述接触夹子包括多于一个的部件。
8.权利要求1的所述电子通孔器件，其中所述第一电极是源极电极或发射极电极。
9.权利要求1的所述电子通孔器件，其中所述第一衬底元件包括电子通孔器件的第一引线。
10.权利要求1的所述电子通孔器件，其中所述半导体芯片的第一表面包括四个边缘并且所述接触元件横切所述四个边缘中的至少两个。
11.权利要求9的所述电子通孔器件，进一步包括：
所述半导体芯片的第二表面上的第二电极；以及
连接到所述第二电极的第二衬底元件。
12.权利要求11的所述电子通孔器件，其中所述第二电极是漏极电极或集电极电极。
13.权利要求12的所述电子通孔器件，进一步包括：
所述半导体芯片的第一表面上的第三电极，其中所述第三电极是栅极电极或基极电极。
14.权利要求13的所述电子通孔器件，进一步包括：
第二引线元件，电连接到漏极电极；以及
第三引线元件，电连接到栅极电极，
其中第一引线元件、第二引线元件和第三引线元件被配置用于印刷电路板的通孔中的插入。
15.权利要求1的所述电子通孔器件，其中所述密封剂的表面与所述接触元件的至少部分暴露的表面共面。
16.一种电子通孔器件，包括：
半导体芯片，包括所述半导体芯片的第一表面上的第一电极；
第一外部连接器元件，被配置用于PCB的通孔接触中的输入；
接触元件，被配置成将第一电极连接到第一外部连接器元件；以及
热沉，连接到接触元件。
17.一种用于制作电子通孔器件的方法，所述方法包括：
提供半导体芯片，所述半导体芯片包括半导体芯片的第一表面上的第一电极；
提供第一衬底元件，所述第一衬底元件包括第一外部接触，所述第一外部接触被配置用于PCB的通孔接触中的输入；
使用接触元件将所述第一电极电连接到所述第一衬底元件；以及
提供将所述半导体芯片密封的密封剂，所述密封剂被配置成至少部分暴露所述接触元件。
18.权利要求17的所述方法，进一步包括将所述密封剂研磨以至少部分暴露所述接触元件。
19.权利要求17的所述方法，其中在密封期间密封剂被施加使得所述接触元件保持至少部分暴露。
20.权利要求17的所述方法，进一步包括：
将热沉连接到部分暴露的接触元件。
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