CN104766790A - Phosphorus and boron liquid source one-shot perfect diffusion process - Google Patents
Phosphorus and boron liquid source one-shot perfect diffusion process Download PDFInfo
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- CN104766790A CN104766790A CN201510105059.1A CN201510105059A CN104766790A CN 104766790 A CN104766790 A CN 104766790A CN 201510105059 A CN201510105059 A CN 201510105059A CN 104766790 A CN104766790 A CN 104766790A
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- silicon chip
- phosphorus
- boron
- diffusion
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- 238000009792 diffusion process Methods 0.000 title claims abstract description 44
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 title claims abstract description 35
- 229910052796 boron Inorganic materials 0.000 title claims abstract description 35
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 title claims abstract description 31
- 229910052698 phosphorus Inorganic materials 0.000 title claims abstract description 31
- 239000011574 phosphorus Substances 0.000 title claims abstract description 31
- 239000007788 liquid Substances 0.000 title claims abstract description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 58
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 58
- 239000010703 silicon Substances 0.000 claims abstract description 58
- 238000000034 method Methods 0.000 claims abstract description 14
- 238000003475 lamination Methods 0.000 claims abstract description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 claims description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000002253 acid Substances 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 6
- 239000008367 deionised water Substances 0.000 claims description 6
- 229910021641 deionized water Inorganic materials 0.000 claims description 6
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 6
- 239000004484 Briquette Substances 0.000 claims description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
- 229960000583 acetic acid Drugs 0.000 claims description 3
- 239000003513 alkali Substances 0.000 claims description 3
- 230000007797 corrosion Effects 0.000 claims description 3
- 238000005260 corrosion Methods 0.000 claims description 3
- 235000013312 flour Nutrition 0.000 claims description 3
- 239000012362 glacial acetic acid Substances 0.000 claims description 3
- 229910017604 nitric acid Inorganic materials 0.000 claims description 3
- 238000010422 painting Methods 0.000 claims description 3
- 238000012958 reprocessing Methods 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 230000007547 defect Effects 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 238000012545 processing Methods 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 abstract 3
- 230000015556 catabolic process Effects 0.000 abstract 1
- 238000007599 discharging Methods 0.000 abstract 1
- 238000012795 verification Methods 0.000 description 2
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003638 chemical reducing agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012634 fragment Substances 0.000 description 1
- 238000006722 reduction reaction Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/228—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Removal Of Specific Substances (AREA)
- Detergent Compositions (AREA)
Abstract
The invention discloses a phosphorus and boron liquid source one-shot perfect diffusion process. The process is mainly implemented through the following steps that one surface of each silicon wafer with two thinned sides is rotated to be coated with a liquid boron source, baked and then rotated again to be coated with a liquid phosphorus source, lamination is conducted after baking, the silicon wafers are stacked on a silicon boat pairwise to be subjected to one-shot perfect diffusion in the mode that each phosphorus source surface is opposite to the corresponding phosphorus source surface and each boron source surface is opposite to the corresponding boron source surface. Diffused junction depth is even, and reverse breakdown voltage of a product can be stable and good in uniformity; the diffusion concentration gradient is reduced, PN junction field intensity can be effectively improved, discharging-resistant capacity of the product is improved, and the reverse surge capacity of the product can be effectively improved; meanwhile, the source return quantity of the edge of the silicon wafer is small, the number of intra defects is small, and product reliability is high. Processing cost is low, the process is simple, and production is easy.
Description
Technical field
The present invention relates to the manufacturing process of semiconductor device, particularly a kind of phosphorus, boron liquid source perfect diffusion technique.
Background technology
In semicon industry, the making of some devices mostly can be used diffusion technology and be formed PN junction, diffusion technology conventional in the industry at present generally adopts phosphorus paper source, the perfect diffusion in boron paper source or adopts phosphorus, boron twice diffusion, these diffusion ways also exist inevitable defect: 1) the diffusion junction depth of paper source diffusion is uneven, the anti-source of silicon chip edge is many, and device Surge handling capability is poor; 2) the mode technique of twice diffusion makes loaded down with trivial details, and after a phosphorus diffusion, another side needs sandblasting or chemical reduction to remove anti-source amount, then carries out boron diffusion, and cost is high, and easily causes fragment.
Summary of the invention
Technical problem to be solved by this invention is: diffusion junction depth is smooth, device Surge handling capability is comparatively strong to provide one to make, and silicon chip edge returns that source is little, defect is few, processing cost is low in wafer bulk a kind of phosphorus, boron liquid source perfect diffusion technique.
For solving the problem, the technical solution used in the present invention is: a kind of phosphorus, boron liquid source perfect diffusion technique, comprise the steps:
1), silicon chip is two-sided thinning: use nitric acid, hydrofluoric acid, glacial acetic acid, the ratio according to 3: 1: 1 carries out two-sided corrosion to original silicon chip, removes surface damage layer;
2), cleaning before diffusion: by acid, alkali, deionized water ultrasonic cleaning operation, chemical treatment is carried out to silicon chip surface;
3), boron source is coated with: the surface uniform of silicon chip after cleaning coats roc source, and the concentration in described roc source is 1% ~ 15%, and purity is 99.9%;
4), first time baking: toasted by the silicon chip after being coated with boron source, temperature is 60 ~ 80 DEG C, and the time is 10 minutes;
5), boderizing source: phosphorus source is evenly coated at the back side of silicon chip after baking, and the concentration in described phosphorus source is 1% ~ 20%, and purity is 99.9%.
6), second time baking: toasted by the silicon chip after being coated with two-sided source, temperature is 60 ~ 80 DEG C, and the time is 20 ~ 40 minutes;
7), lamination, dress boat: spread a little silica flour in painting face, boron source, then that silicon chip is relative between two, i.e. face, phosphorus source Mian Yulin source, face, Mian Yupeng source, boron source stacks relatively, erects pendulum on silicon boat, and uses silico briquette jam-packed;
8), diffusion: the silicon chip of dress boat is spread at 1270 ~ 1275 DEG C, forms diffusion junctions;
9), diffusion reprocessing: with acid soak, deionized water ultrasonic cleaning, silicon chip is separated, and removes surface oxide layer.
Preferably, described step 3) in, be placed on by silicon chip on circulator, boron source dropped in the centre of surface of silicon chip, start circulator and make silicon slice rotating, the rotating speed of circulator is 3000 ~ 4000 revs/min.
Preferably, described step 5) in, be placed on conversely on circulator by silicon chip, phosphorus source dropped in the center, the back side of silicon chip, start circulator and make silicon slice rotating, the rotating speed of circulator is 3000 ~ 4000 revs/min.
The invention has the beneficial effects as follows: 1. phosphorus of the present invention, boron liquid source perfect diffusion technique, the phosphorus that employing concentration is substantially suitable, boron liquid source spread, and the anti-source amount of silicon chip edge is little, and effective area utilance is high.
2. adopt the highly purified liquid source of low concentration to carry out a perfect diffusion, such diffusion junction depth flat even, can improve homogeneity and the stability of product puncture voltage.
3. the perfect diffusion of this liquid source makes silicon chip surface concentration reduce, and concentration gradient reduces, and can effectively improve PN junction field intensity, and the resistance to discharge capability of raising product and anti-reflective are to surge capacity.
Accompanying drawing explanation
Fig. 1 is flow chart of the present invention;
Embodiment
Below by specific embodiment, a kind of phosphorus of the present invention, boron liquid source perfect diffusion technique are described in further detail.
As shown in Figure 1, a kind of phosphorus, boron liquid source perfect diffusion technique, comprise the steps:
1), silicon chip is two-sided thinning: use nitric acid, hydrofluoric acid, glacial acetic acid, the ratio according to 3: 1: 1 carries out two-sided corrosion to original silicon chip, removes surface damage layer;
2), cleaning before diffusion: by acid, alkali, deionized water ultrasonic cleaning operation, chemical treatment is carried out to silicon chip surface;
3), boron source is coated with: silicon chip is after cleaning placed on circulator, boron source is dropped in the centre of surface of silicon chip, start circulator and make silicon slice rotating, the rotating speed of circulator is 3000 ~ 4000 revs/min, the concentration in described roc source is 1% ~ 15%, and purity is 99.9%;
4), first time baking: toasted by the silicon chip after being coated with boron source, temperature is 60 ~ 80 DEG C, and the time is 10 minutes;
5), boderizing source: silicon chip is after baking placed on circulator, phosphorus source is dropped in the center, the back side of silicon chip, start circulator and make silicon slice rotating, the rotating speed of circulator is 3000 ~ 4000 revs/min, the concentration in described phosphorus source is 1% ~ 20%, and purity is 99.9%.
6), second time baking: toasted by the silicon chip after being coated with two-sided source, temperature is 60 ~ 80 DEG C, and the time is 20 ~ 40 minutes;
7), lamination, dress boat: spread a little silica flour in painting face, boron source, then that silicon chip is relative between two, i.e. face, phosphorus source Mian Yulin source, face, Mian Yupeng source, boron source stacks relatively, erects pendulum on silicon boat, and uses silico briquette jam-packed;
8), diffusion: the silicon chip of dress boat is spread at 1270 ~ 1275 DEG C, forms diffusion junctions;
9), diffusion reprocessing: with acid soak, deionized water ultrasonic cleaning, silicon chip is separated, and removes surface oxide layer.
The diffusion junction depth result of a perfect diffusion:
Make the resistance to electric discharge result of sample:
Sample | Voltage (kv) | Resistance to electric discharge | Judge |
1 | 14 | 40kv × 600 time | OK |
2 | 14 | 40kv × 600 time | OK |
3 | 14 | 40kv × 600 time | OK |
4 | 14 | 40kv × 600 time | OK |
5 | 14 | 40kv × 600 time | OK |
6 | 14 | 40kv × 600 time | OK |
7 | 14 | 40kv × 600 time | OK |
8 | 14 | 40kv × 600 time | OK |
9 | 14 | 40kv × 600 time | OK |
10 | 14 | 40kv × 601 time | OK |
Through verification experimental verification: adopt liquid phosphorus source, one time, boron source perfect diffusion technique, diffusion junction depth is even, and flatness is good, and silicon chip edge anti-source amount is less than 1mm.The resistance to discharge capability of product made is strong, and reliability is high.
The above embodiments are the principle of illustrative the invention and effect thereof only, and the embodiment that part is used, but not for limiting the present invention; It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise of the invention, can also make some distortion and improvement, these all belong to protection scope of the present invention.
Claims (3)
1. phosphorus, boron liquid source perfect diffusion technique, is characterized in that: comprise the steps:
1), silicon chip is two-sided thinning: use nitric acid, hydrofluoric acid, glacial acetic acid, carry out two-sided corrosion according to the ratio of 3:1:1 to original silicon chip, remove surface damage layer;
2), cleaning before diffusion: by acid, alkali, deionized water ultrasonic cleaning operation, chemical treatment is carried out to silicon chip surface;
3), boron source is coated with: the surface uniform of silicon chip after cleaning coats roc source, and the concentration in described roc source is 1% ~ 15%, and purity is 99.9%;
4), first time baking: toasted by the silicon chip after being coated with boron source, temperature is 60 ~ 80 DEG C, and the time is 10 minutes;
5), boderizing source: phosphorus source is evenly coated at the back side of silicon chip after baking, and the concentration in described phosphorus source is 1% ~ 20%, and purity is 99.9%.
6), second time baking: toasted by the silicon chip after being coated with two-sided source, temperature is 60 ~ 80 DEG C, and the time is 20 ~ 40 minutes;
7), lamination, dress boat: spread a little silica flour in painting face, boron source, then that silicon chip is relative between two, i.e. face, phosphorus source Mian Yulin source, face, Mian Yupeng source, boron source stacks relatively, erects pendulum on silicon boat, and uses silico briquette jam-packed;
8), diffusion: the silicon chip of dress boat is spread at 1270 ~ 1275 DEG C, forms diffusion junctions;
9), diffusion reprocessing: with acid soak, deionized water ultrasonic cleaning, silicon chip is separated, and removes surface oxide layer.
2. a kind of phosphorus according to claim 1, boron liquid source perfect diffusion technique, it is characterized in that: described step 3) in, silicon chip is placed on circulator, boron source is dropped in the centre of surface of silicon chip, start circulator and make silicon slice rotating, the rotating speed of circulator is 3000 ~ 4000 revs/min.
3. a kind of phosphorus according to claim 1 and 2, boron liquid source perfect diffusion technique, it is characterized in that: described step 5) in, silicon chip is placed on circulator conversely, phosphorus source is dropped in the center, the back side of silicon chip, start circulator and make silicon slice rotating, the rotating speed of circulator is 3000 ~ 4000 revs/min.
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Cited By (11)
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CN109309001A (en) * | 2017-07-26 | 2019-02-05 | 天津环鑫科技发展有限公司 | A method of GPP chip is made using printing technology |
CN109308994A (en) * | 2017-07-26 | 2019-02-05 | 天津环鑫科技发展有限公司 | It is a kind of that silicon wafer painting source technique is carried out using screen printing technique |
CN109309142A (en) * | 2017-07-26 | 2019-02-05 | 天津环鑫科技发展有限公司 | A kind of blunt preceding liquid source diffusion technique of silicon wafer glass |
CN109659224A (en) * | 2018-12-14 | 2019-04-19 | 济南卓微电子有限公司 | Monocrystalline silicon piece boron phosphorus is the same as the technique expanded |
CN109675858A (en) * | 2018-12-20 | 2019-04-26 | 天津中环领先材料技术有限公司 | A kind of cleaning process after wafer thinning |
CN109712876A (en) * | 2018-12-30 | 2019-05-03 | 重庆市妙格半导体研究院有限公司 | A kind of PN junction method of diffusion |
CN109755118A (en) * | 2017-11-01 | 2019-05-14 | 天津环鑫科技发展有限公司 | A kind of blunt preceding MULTIPLE DIFFUSION technique of FRGPP chip glass |
CN109755117A (en) * | 2017-11-01 | 2019-05-14 | 天津环鑫科技发展有限公司 | A method of FRGPP chip is made using printing technology |
CN111710597A (en) * | 2020-06-30 | 2020-09-25 | 山东宝乘电子有限公司 | Method for manufacturing silicon rectifying chip substrate by utilizing boron-phosphorus one-step diffusion |
CN113161230A (en) * | 2020-12-14 | 2021-07-23 | 安徽安芯电子科技股份有限公司 | Diffusion process of phosphorus-boron synchronous one-time diffusion graded junction chip |
CN113178385A (en) * | 2021-03-31 | 2021-07-27 | 青岛惠科微电子有限公司 | Chip manufacturing method and device and chip |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102087976A (en) * | 2010-12-10 | 2011-06-08 | 天津中环半导体股份有限公司 | Fast recovery diode (FRD) chip and production process thereof |
CN102709389A (en) * | 2012-05-27 | 2012-10-03 | 苏州阿特斯阳光电力科技有限公司 | Method for preparing double-faced back contact solar cell |
CN103151427A (en) * | 2013-03-25 | 2013-06-12 | 泰通(泰州)工业有限公司 | Process for preparing two-sided battery |
US20130153019A1 (en) * | 2011-12-20 | 2013-06-20 | Innovalight | Methods of forming a high efficiency solar cell with a localized back surface field |
CN203659906U (en) * | 2013-12-27 | 2014-06-18 | 洛阳单晶硅有限责任公司 | Mixed acid supply device used in silicon wafer surface lattice structure damage treatment |
-
2015
- 2015-03-11 CN CN201510105059.1A patent/CN104766790B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102087976A (en) * | 2010-12-10 | 2011-06-08 | 天津中环半导体股份有限公司 | Fast recovery diode (FRD) chip and production process thereof |
US20130153019A1 (en) * | 2011-12-20 | 2013-06-20 | Innovalight | Methods of forming a high efficiency solar cell with a localized back surface field |
CN102709389A (en) * | 2012-05-27 | 2012-10-03 | 苏州阿特斯阳光电力科技有限公司 | Method for preparing double-faced back contact solar cell |
CN103151427A (en) * | 2013-03-25 | 2013-06-12 | 泰通(泰州)工业有限公司 | Process for preparing two-sided battery |
CN203659906U (en) * | 2013-12-27 | 2014-06-18 | 洛阳单晶硅有限责任公司 | Mixed acid supply device used in silicon wafer surface lattice structure damage treatment |
Cited By (15)
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CN109308994A (en) * | 2017-07-26 | 2019-02-05 | 天津环鑫科技发展有限公司 | It is a kind of that silicon wafer painting source technique is carried out using screen printing technique |
CN109309142A (en) * | 2017-07-26 | 2019-02-05 | 天津环鑫科技发展有限公司 | A kind of blunt preceding liquid source diffusion technique of silicon wafer glass |
CN109309001A (en) * | 2017-07-26 | 2019-02-05 | 天津环鑫科技发展有限公司 | A method of GPP chip is made using printing technology |
CN109309001B (en) * | 2017-07-26 | 2022-05-03 | 天津环鑫科技发展有限公司 | Method for manufacturing GPP chip by adopting printing process |
CN109309142B (en) * | 2017-07-26 | 2021-09-07 | 天津环鑫科技发展有限公司 | Liquid source diffusion process before silicon wafer glass passivation |
CN109755117A (en) * | 2017-11-01 | 2019-05-14 | 天津环鑫科技发展有限公司 | A method of FRGPP chip is made using printing technology |
CN109755118A (en) * | 2017-11-01 | 2019-05-14 | 天津环鑫科技发展有限公司 | A kind of blunt preceding MULTIPLE DIFFUSION technique of FRGPP chip glass |
CN109659224A (en) * | 2018-12-14 | 2019-04-19 | 济南卓微电子有限公司 | Monocrystalline silicon piece boron phosphorus is the same as the technique expanded |
CN109659224B (en) * | 2018-12-14 | 2023-03-31 | 济南卓微电子有限公司 | Boron-phosphorus co-expansion process for monocrystalline silicon wafer |
CN109675858A (en) * | 2018-12-20 | 2019-04-26 | 天津中环领先材料技术有限公司 | A kind of cleaning process after wafer thinning |
CN109712876A (en) * | 2018-12-30 | 2019-05-03 | 重庆市妙格半导体研究院有限公司 | A kind of PN junction method of diffusion |
CN111710597A (en) * | 2020-06-30 | 2020-09-25 | 山东宝乘电子有限公司 | Method for manufacturing silicon rectifying chip substrate by utilizing boron-phosphorus one-step diffusion |
CN113161230A (en) * | 2020-12-14 | 2021-07-23 | 安徽安芯电子科技股份有限公司 | Diffusion process of phosphorus-boron synchronous one-time diffusion graded junction chip |
CN113161230B (en) * | 2020-12-14 | 2022-05-17 | 安徽安芯电子科技股份有限公司 | Diffusion process of phosphorus-boron synchronous one-time diffusion graded junction chip |
CN113178385A (en) * | 2021-03-31 | 2021-07-27 | 青岛惠科微电子有限公司 | Chip manufacturing method and device and chip |
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