CN113161230B - Diffusion process of phosphorus-boron synchronous one-time diffusion graded junction chip - Google Patents
Diffusion process of phosphorus-boron synchronous one-time diffusion graded junction chip Download PDFInfo
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- CN113161230B CN113161230B CN202011471400.2A CN202011471400A CN113161230B CN 113161230 B CN113161230 B CN 113161230B CN 202011471400 A CN202011471400 A CN 202011471400A CN 113161230 B CN113161230 B CN 113161230B
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- 238000009792 diffusion process Methods 0.000 title claims abstract description 118
- 230000001360 synchronised effect Effects 0.000 title claims abstract description 17
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 59
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 55
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 55
- 239000010703 silicon Substances 0.000 claims abstract description 55
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 27
- 238000004140 cleaning Methods 0.000 claims abstract description 27
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 26
- 239000011574 phosphorus Substances 0.000 claims abstract description 26
- 238000005488 sandblasting Methods 0.000 claims abstract description 17
- 239000003795 chemical substances by application Substances 0.000 claims abstract description 10
- FGUJWQZQKHUJMW-UHFFFAOYSA-N [AlH3].[B] Chemical compound [AlH3].[B] FGUJWQZQKHUJMW-UHFFFAOYSA-N 0.000 claims abstract description 9
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 20
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 10
- 238000001035 drying Methods 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 10
- 229910052760 oxygen Inorganic materials 0.000 claims description 10
- 239000001301 oxygen Substances 0.000 claims description 10
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 6
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 238000002791 soaking Methods 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 abstract description 7
- 239000000758 substrate Substances 0.000 abstract description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 15
- 229910052796 boron Inorganic materials 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 10
- 239000012634 fragment Substances 0.000 description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 4
- 238000004064 recycling Methods 0.000 description 3
- 238000001179 sorption measurement Methods 0.000 description 3
- 238000001816 cooling Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- -1 then Chemical compound 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66136—PN junction diodes
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a diffusion process of a phosphorus-boron synchronous one-time diffusion graded junction chip, and relates to the technical field of semiconductor device processing. The method mainly comprises a boat loading process, a diffusion process, a cleaning process after diffusion and a P/N double-side sand blasting process, and a proper diffusion condition is selected, so that the formed substrate after diffusion can meet the requirements of all electrical characteristics of the rectifier chip. In addition, silicon carbide powder is used as a separating agent for the boron-aluminum paper source, so that the phosphorus is not adsorbed, the high temperature resistance (HTRB capacity) is relatively high, the reliability is high, and the silicon wafer is not easy to corrode in the process of the slow change junction diffusion process.
Description
Technical Field
The invention belongs to the technical field of semiconductor device processing, and particularly relates to a diffusion process of a phosphorus-boron synchronous one-time diffusion graded junction chip.
Background
The diode is the most common basic electronic component, and in the process of manufacturing a diode chip, two sides of a substrate are respectively manufactured into a P-type semiconductor and an N-type semiconductor by a diffusion method on the same semiconductor substrate, and a space charge region called PN junction is formed at the interface of the P-type semiconductor and the N-type semiconductor and is divided into a slow change junction and a sudden change junction according to the diffusion concentration distribution. The common manufacturing mode is that phosphorus diffusion is firstly carried out, then, through sand blasting, phosphorus removal treatment is carried out on one side which does not need phosphorus, then, boron diffusion is carried out again after cleaning, the production period is long in the two-time diffusion industry, and the production cost is also improved; moreover, the temperature is generally kept above 1200 ℃ in the diffusion process, and the high temperature resistance of the chip is reduced by two times of high-temperature treatment, so that the cycle capacity (namely TC capacity) of the chip is low, and the fragment rate is high; in order to reduce the breakage rate, the current method adopts a thicker silicon chip, but the problems of high chip impedance and high power consumption can occur.
In order to obtain the required electrical performance in the traditional diffusion process, phosphorus and boron are generally processed by adopting a phosphorus and boron step-by-step two-time diffusion process in China, and the method has the advantages of low process treatment difficulty and high electrical characteristic yield; but the defects of long production flow and high fragment rate exist, and in order to reduce the fragment rate, the thickness of the adopted silicon wafer is thicker, so that the chip impedance is high and the power consumption is large; the method has the advantages of short production period, low fragment rate and long service life of devices in the recycling process; the defects are that the process treatment difficulty is high, and an inversion layer is easily formed at the edge of a silicon wafer, so that the electrical characteristic yield is low. Meanwhile, as the aluminum oxide is used as a separating agent, the aluminum oxide has an adsorption effect on phosphorus, so that the reverse leakage current is large, the high temperature resistance (HTRB capacity) is relatively low, and the reliability is low; the silicon chip is easy to corrode in the process of the graded junction diffusion process.
Disclosure of Invention
The invention aims to provide a diffusion process of a phosphorus-boron synchronous primary diffusion graded junction chip, which combines a phosphorus and boron secondary diffusion process of the traditional process into a phosphorus-boron synchronous primary diffusion process, so that the process flow is simple, the production period is short, the yield is high, the reverse leakage current is small, the service life of a device in the high-low temperature recycling process is long, the cost is reduced, and three to four days can be saved compared with the traditional process; the silicon chip is not easy to corrode in the process of the graded junction diffusion technology.
In order to solve the technical problems, the invention is realized by the following technical scheme:
the invention relates to a diffusion process of a phosphorus-boron synchronous one-time diffusion graded junction chip, which comprises the following steps:
s1: in the process of loading, a phosphorus paper source with silicon carbide as a separating agent and a boron-aluminum paper source as a diffusion source are adopted, and one surface of the cleaned silicon wafer is attached with phosphorus paper and the other surface of the silicon wafer is attached with boron paper;
s2: the diffusion process comprises the steps of putting the silicon wafer attached with the phosphorus paper and the boron paper into a diffusion furnace with the temperature of T1 ℃, burning the silicon wafer when the proportion of oxygen or nitrogen is 10-15% and the temperature is raised to T2 ℃, depositing a diffusion source on the surface of the silicon wafer, diffusing the silicon wafer when the temperature is raised to T3 ℃, closing oxygen within 2 hours after the beginning of diffusion, and performing high-temperature diffusion in a nitrogen atmosphere; closing the nitrogen, reducing the temperature to below T4 ℃, and taking out the material from the diffusion furnace, wherein T1 is 200-300 ℃, T2 is 500-700 ℃, T3 is 1250-1270 ℃, and T4 is 600 ℃;
s3: a cleaning process after diffusion, which comprises a wafer soaking process, wherein the diffused silicon wafer is placed in hydrofluoric acid and soaked for more than 8 hours until the silicon wafer is separated;
s4: and in the P/N double-side sand blasting process, the separated silicon wafer is placed in a sand blasting machine, double-side sand blasting is carried out on the silicon wafer, and the silicon wafer subjected to sand blasting is placed on a cleaning machine to be cleaned and dried.
Further, the S1 boat loading process includes a cleaning process before boat loading: and (3) placing the silicon wafer on a cleaning machine for cleaning, and drying after cleaning.
Further, the post-diffusion cleaning process of S2 further includes an ultrasonic cleaning process and a drying process.
Further, the method also comprises a wafer annealing process: and (3) sand blasting the two sides of the P/N silicon wafer, and putting the silicon wafer after cleaning and drying into a diffusion furnace for high-temperature oxidation annealing.
Further, in the diffusion process, the temperature rise rate of the diffusion furnace from T1 ℃ to T2 ℃ is 2 ℃/min, the temperature rise rate of the diffusion furnace from T2 ℃ to T3 ℃ is 2 ℃/min, and the temperature drop rate of the diffusion furnace from T3 ℃ to T4 ℃ is 2 ℃/min.
The invention has the following beneficial effects:
1. according to the invention, the traditional process of phosphorus and boron secondary diffusion is combined into the phosphorus and boron synchronous primary diffusion process, so that the process flow is simple, the production period is short, the yield is high, the reverse leakage current is small, the service life of the device in the high-low temperature recycling process is long, the cost is reduced, and compared with the traditional process, three to four days can be saved.
2. According to the invention, silicon carbide powder is used as a separating agent for the boron-aluminum paper source, and compared with the traditional method of using aluminum oxide as the separating agent, the method has the advantages of no phosphorus adsorption operation, small reverse leakage current, relatively high temperature resistance (HTRB capacity) and high reliability; the silicon chip is not easy to corrode in the process of the graded junction diffusion technology.
Of course, it is not necessary for any product in which the invention is practiced to achieve all of the above-described advantages at the same time.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
The invention relates to a diffusion process of a phosphorus-boron synchronous one-time diffusion graded junction chip, which comprises the following steps:
s1: in the process of loading, a phosphorus paper source with silicon carbide as a separating agent and a boron-aluminum paper source as a diffusion source are adopted, and one surface of the cleaned silicon wafer is attached with phosphorus paper and the other surface of the silicon wafer is attached with boron paper; in addition, the N65KBC phosphorus paper source which is specially manufactured by coring source microelectronics and adopts silicon carbide as a separating agent and the B40HC boron-aluminum paper source as a diffusion source, wherein compared with the traditional method of adopting aluminum oxide as the separating agent, the separating agent which adopts silicon carbide powder as the boron-aluminum paper source does not produce adsorption operation on phosphorus, the reverse leakage current is small, the high temperature resistance (HTRB capacity) is relatively high, and the reliability is high; the silicon chip is not easy to corrode in the process of the graded junction diffusion process;
s2: the diffusion process comprises the steps of putting the silicon wafer attached with the phosphor paper and the boron paper into a diffusion furnace at the temperature of T1 ℃, wherein the diffusion boat does not need to be preheated and is simultaneously put into the diffusion furnace, and a push-pull rod is used for directly pushing the diffusion boat into a constant-temperature area of the diffusion furnace at a constant speed; the proportion of oxygen or nitrogen is 10%, the source burning is carried out when the temperature rises to T2 ℃, a diffusion source is deposited on the surface of the silicon wafer, the silicon wafer diffusion is carried out when the temperature rises to T3 ℃, the oxygen is closed within 2h after the start of the diffusion, and the high-temperature diffusion is carried out in the nitrogen atmosphere; according to the diffusion depth and concentration required by the characteristics of the produced product, after determining that the diffusion time meets the requirement, closing nitrogen, reducing the temperature to below T4 ℃, taking down a furnace cap, directly pulling a diffusion boat to a furnace opening by using a push-pull rod after the temperatures of three ends are all reduced to below 300 ℃, staying for 10-15 minutes, taking out, and putting into a cooling bracket for cooling; wherein T1 is 200 ℃, T2 is 500 ℃, T3 is 1250 ℃, and T4 is 600 ℃;
s3: a cleaning process after diffusion, which comprises a wafer soaking process, wherein the diffused silicon wafer is placed in hydrofluoric acid and soaked for more than 8 hours until the silicon wafer is separated;
s4: and in the P/N double-side sand blasting process, the separated silicon wafer is placed in a sand blasting machine, double-side sand blasting is carried out on the silicon wafer, and the silicon wafer subjected to sand blasting is placed on a cleaning machine to be cleaned and dried.
Preferably, the S1 binning process includes a pre-binning cleaning process: and (3) placing the silicon wafer on a cleaning machine for cleaning, and drying after cleaning.
Preferably, the cleaning process after the diffusion of S2 further includes an ultrasonic cleaning process and a drying process, wherein the ultrasonic cleaning process includes placing the wafer into an ultrasonic cleaning machine containing a haemo-sol solution for ultrasonic cleaning for 10min, cleaning for at least 2 times, rinsing with water, and drying.
Preferably, the method further comprises the wafer annealing process: and (3) sand blasting the two sides of the P/N silicon wafer, and putting the silicon wafer after cleaning and drying into a diffusion furnace for high-temperature oxidation annealing.
Preferably, during the diffusion process, the temperature rise rate of the diffusion furnace from T1 ℃ to T2 ℃ is 2 ℃/min, the temperature rise rate of the diffusion furnace from T2 ℃ to T3 ℃ is 2 ℃/min, and the temperature drop rate of the diffusion furnace from T3 ℃ to T4 ℃ is 2 ℃/min.
Example two
The difference from the first embodiment is that: s2: the diffusion process comprises the steps of putting the silicon wafer attached with the phosphorus paper and the boron paper into a diffusion furnace with the temperature of T1 ℃, burning the silicon wafer when the proportion of oxygen or nitrogen is 10-15% and the temperature is raised to T2 ℃, depositing a diffusion source on the surface of the silicon wafer, diffusing the silicon wafer when the temperature is raised to T3 ℃, closing oxygen within 2 hours after the beginning of diffusion, and performing high-temperature diffusion in a nitrogen atmosphere; and (3) determining the diffusion time to meet the requirements according to the diffusion depth and concentration required by the characteristics of the produced product, then closing the nitrogen, reducing the temperature to be below T4 ℃, and taking the material out of the diffusion furnace, wherein T1 is 250 ℃, T2 is 600 ℃, T3 is 1260 ℃, and T4 is 600 ℃.
EXAMPLE III
The difference from the first embodiment and the second embodiment is that: s2: the diffusion process comprises the steps of putting the silicon wafer attached with the phosphorus paper and the boron paper into a diffusion furnace with the temperature of T1 ℃, burning the silicon wafer when the proportion of oxygen or nitrogen is 10-15% and the temperature is raised to T2 ℃, depositing a diffusion source on the surface of the silicon wafer, diffusing the silicon wafer when the temperature is raised to T3 ℃, closing oxygen within 2 hours after the beginning of diffusion, and performing high-temperature diffusion in a nitrogen atmosphere; and (3) determining the diffusion time to meet the requirements according to the diffusion depth and concentration required by the characteristics of the produced product, then closing the nitrogen, reducing the temperature to below T4 ℃, and taking the material out of the diffusion furnace, wherein T1 is 300 ℃, T2 is 700 ℃, T3 is 1270 ℃, and T4 is 600 ℃.
Experiments show that compared with the traditional phosphorus and boron step-by-step and twice-diffusion process, the HTRB temperature of the product produced by the phosphorus and boron synchronous once-diffusion process can reach 175 ℃, and the maximum HTRB temperature of the traditional phosphorus and boron step-by-step and twice-diffusion process is 150 ℃, so that the process treatment difficulty is high, and the yield is low; the diffusion period of the phosphorus-boron synchronous one-time diffusion process is 61 hours, and the production period is shortened by 72-96 hours compared with the traditional phosphorus-boron stepwise two-time diffusion process.
Therefore, the phosphorus-boron synchronous one-time diffusion process has the advantages of simple steps, short production period and low cost, and can save 30-40%.
In the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The preferred embodiments of the invention disclosed above are intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention. The invention is limited only by the claims and their full scope and equivalents.
Claims (5)
1. The diffusion process of the phosphorus-boron synchronous one-time diffusion graded junction chip is characterized by comprising the following steps of: the method comprises the following steps:
s1: in the process of loading, a phosphorus paper source with silicon carbide as a separating agent and a boron aluminum paper source are used as diffusion sources, and one surface of a cleaned silicon wafer is attached with the phosphorus paper source and the other surface is attached with the boron aluminum paper source;
s2: the diffusion process comprises the steps of putting the silicon wafer attached with the phosphorus paper source and the boron-aluminum paper source into a diffusion furnace with the temperature of T1 ℃, enabling the proportion of oxygen and nitrogen to be 10-15%, burning the source when the temperature rises to T2 ℃, depositing the diffusion source on the surface of the silicon wafer, diffusing the silicon wafer when the temperature rises to T3 ℃, closing oxygen within 2 hours after the beginning of diffusion, and performing high-temperature diffusion in the nitrogen atmosphere; closing the nitrogen, reducing the temperature to below T4 ℃, and taking out the material from the diffusion furnace, wherein T1 is 200-300 ℃, T2 is 500-700 ℃, T3 is 1250-1270 ℃, and T4 is 600 ℃;
s3: a cleaning process after diffusion, which comprises a wafer soaking process, wherein the diffused silicon wafer is placed in hydrofluoric acid and soaked for more than 8 hours until the silicon wafer is separated;
s4: and in the P/N double-side sand blasting process, the separated silicon wafer is placed in a sand blasting machine, double-side sand blasting is carried out on the silicon wafer, and the silicon wafer subjected to sand blasting is placed on a cleaning machine to be cleaned and dried.
2. The P-B synchronous one-time diffusion graded junction chip diffusion process of claim 1, wherein the S1 boat loading process comprises a cleaning process before boat loading: and (3) placing the silicon wafer on a cleaning machine for cleaning, and drying after cleaning.
3. The diffusion process of a phosphorus boron synchronous one-time diffusion graded junction chip as claimed in claim 2, wherein the cleaning process after S3 diffusion further comprises an ultrasonic cleaning process and a drying process.
4. The diffusion process of the phosphorus boron synchronous one-time diffusion graded junction chip as claimed in any one of claims 1 to 3, further comprising a wafer annealing process: and (3) sand blasting the two sides of the P/N silicon wafer, and putting the silicon wafer after cleaning and drying into a diffusion furnace for high-temperature oxidation annealing.
5. The diffusion process of a P-B synchronous one-time diffusion graded junction chip as claimed in claim 1, wherein in the diffusion process, the temperature rise rate of the temperature in the diffusion furnace from T1 ℃ to T2 ℃ is 2 ℃/min, the temperature rise rate of the temperature in the diffusion furnace from T2 ℃ to T3 ℃ is 2 ℃/min, and the temperature drop rate of the temperature in the diffusion furnace from T3 ℃ to T4 ℃ is 2 ℃/min.
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| CN114899091B (en) * | 2022-03-28 | 2023-10-03 | 江苏晟驰微电子有限公司 | Diffusion process and diffusion equipment for manufacturing voltage stabilizing tube |
| CN114823987B (en) * | 2022-06-30 | 2022-11-01 | 山东芯源微电子有限公司 | Method for manufacturing solar power generation substrate by using film-shaped diffusion source |
| CN115083892A (en) * | 2022-07-28 | 2022-09-20 | 山东芯源微电子有限公司 | Method for diffusing wider pressure-resistant area of high-voltage and ultrahigh-voltage chips |
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Denomination of invention: The diffusion process of phosphorus boron synchronous primary diffusion slow change junction chip Granted publication date: 20220517 Pledgee: China Co. truction Bank Corp Chizhou branch Pledgor: ANHUI ANXIN ELECTRONIC TECHNOLOGY CO.,LTD. Registration number: Y2024980003211 |