CN112289895B - N-type efficient solar cell and preparation method thereof - Google Patents
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- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 110
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 110
- 239000010703 silicon Substances 0.000 claims abstract description 110
- 238000005247 gettering Methods 0.000 claims abstract description 62
- 239000012535 impurity Substances 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 21
- 238000000137 annealing Methods 0.000 claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 17
- 239000002184 metal Substances 0.000 claims abstract description 17
- 238000000151 deposition Methods 0.000 claims abstract description 15
- 238000010521 absorption reaction Methods 0.000 claims abstract description 14
- 238000004140 cleaning Methods 0.000 claims abstract description 10
- 238000010438 heat treatment Methods 0.000 claims abstract description 10
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 15
- 239000007788 liquid Substances 0.000 claims description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 9
- 238000009792 diffusion process Methods 0.000 claims description 8
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical group BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 238000002156 mixing Methods 0.000 claims description 4
- 238000001035 drying Methods 0.000 claims description 3
- 238000007650 screen-printing Methods 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
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- 238000006243 chemical reaction Methods 0.000 abstract description 5
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- 235000012431 wafers Nutrition 0.000 description 84
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 7
- 229910052698 phosphorus Inorganic materials 0.000 description 7
- 239000011574 phosphorus Substances 0.000 description 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 6
- 229910052796 boron Inorganic materials 0.000 description 6
- 239000003513 alkali Substances 0.000 description 5
- 239000002002 slurry Substances 0.000 description 5
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical group ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
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- 230000003247 decreasing effect Effects 0.000 description 3
- 238000005265 energy consumption Methods 0.000 description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000013072 incoming material Substances 0.000 description 1
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- 238000002161 passivation Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000003685 thermal hair damage Effects 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- 150000003624 transition metals Chemical class 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H01L31/0264—Inorganic materials
- H01L31/028—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
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- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
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Abstract
The invention discloses an N-type high-efficiency heterojunction solar cell and a preparation method thereof, wherein the N-type high-efficiency solar cell is an N-type high-efficiency heterojunction solar cell made of an N-type silicon wafer; the preparation method comprises the steps of carrying out gettering treatment on an N-type silicon wafer, and then completing conventional manufacture of the heterojunction solar cell; the gettering process includes the steps of: (1) cleaning a silicon wafer; (2) coating or depositing a layer of impurity absorption source on the front surface and the back surface of the silicon wafer; (3) carrying out heat treatment on the silicon wafer coated or deposited with the gettering source through a chain type annealing furnace to complete gettering, and forming a gettering layer on the surface of the silicon wafer; (4) and corroding and removing the gettering layer on the surface of the silicon wafer. The invention reduces the content of metal impurities in the silicon wafer body, improves the minority carrier lifetime of the silicon wafer, and finally improves the conversion efficiency of the battery; the battery efficiency distribution is more concentrated, and the product consistency is improved; the battery edge leakage rate is reduced, and the battery yield is improved.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to an N-type efficient solar cell and a preparation method thereof.
Background
At present, most of crystalline silicon solar cells all adopt the standard manufacturing process of the traditional P-type cell, but with the gradual development of the preparation technology of the high-efficiency crystalline silicon cell, the P-type cell faces the decreasing effect of the marginal benefit rate of capital and technical investment after the conversion efficiency reaches more than 22%, and the conversion efficiency is difficult to further promote. Therefore, a great number of solar cell manufacturers begin to focus on commercialization of N-type solar cells, such as Heterojunction (HJT) cells and Interdigitated Back Contact (IBC) cells, and the minority carrier lifetime of N-type silicon wafers is longer than that of P-type silicon wafers, which is beneficial to further improvement of cell efficiency.
Because metal impurities in the solar-grade Czochralski silicon single crystal rod mainly comprise transition metal impurities, deep-grade composite centers or metal precipitates can be formed, but the metal impurities are migrated and segregated without a high-temperature process in the technological process of the heterojunction solar cell, so that the metal impurity content of a silicon wafer has great influence on the efficiency and yield of the heterojunction solar cell.
Disclosure of Invention
The purpose of the invention is as follows: the invention provides a preparation method of an N-type high-efficiency solar cell, which can reduce the content of metal impurities in an N-type silicon wafer and further improve the minority carrier lifetime of the N-type silicon wafer, thereby improving the cell efficiency.
The invention also provides the N-type high-efficiency solar cell prepared by the method.
The technical scheme is as follows: the technical scheme adopted by the invention is a preparation method of an N-type high-efficiency solar cell, wherein the N-type high-efficiency solar cell is an N-type high-efficiency heterojunction solar cell made of an N-type silicon wafer; the preparation method comprises the steps of carrying out gettering treatment on an N-type silicon wafer, and then completing conventional manufacture of the heterojunction solar cell; the gettering process includes the steps of:
(1) cleaning a silicon wafer;
(2) coating or depositing a layer of impurity absorption source on the front surface and the back surface of the silicon wafer;
(3) carrying out heat treatment on the silicon wafer coated or deposited with the gettering source through a chain type annealing furnace to complete gettering, and forming a gettering layer on the surface of the silicon wafer;
(4) and corroding and removing the gettering layer on the surface of the silicon wafer.
In the step (1), the silicon wafer is cleaned by mixing alkali liquor and acid liquor, so as to remove organic matters, damaged layers, metal impurities and oxide layers on the surface of the silicon wafer.
And (3) coating a layer of impurity absorption source on the front surface or the back surface of the silicon wafer in a printing, roll coating, spray coating or spin coating liquid source mode in the step (2).
Further, the liquid source is a phosphorus-containing slurry or a boron-containing slurry. Still further, the phosphorus-containing slurry includes a phosphoric acid solution.
And (3) depositing a layer of impurity absorption source on the front surface or the back surface of the silicon wafer in a mode of introducing a liquid source into the tubular diffusion furnace in the step (2).
Further, the liquid source is phosphorus oxychloride or boron tribromide.
Wherein in the step (3), the temperature of the chain type annealing furnace is 500-800 ℃ and the time is 2-20 min.
Further, the chain annealing furnace is provided with 4-6 temperature zones, and the temperature of each temperature zone can be the same or different.
And (4) removing the gettering layer on the surface of the silicon wafer by adopting alkali liquor corrosion.
Further, the concentration of the alkali liquor is 1-5% by mass.
Furthermore, the temperature of the alkali liquor corrosion is 60-65 ℃, and the time is 100-300 s.
The invention also provides the N-type high-efficiency solar cell prepared by the method.
Further, the N-type high-efficiency solar cell is an N-type high-efficiency heterojunction solar cell.
The process temperature in the manufacturing process of the heterojunction solar cell needs to be controlled to be completed at a low temperature, generally less than 300 ℃, and the whole process has no high-temperature process, so that the cell with the structure has high requirements on the metal impurity content of a silicon wafer and has increasingly strict requirements on the quality of the silicon wafer.
The invention provides a preparation method of an N-type high-efficiency heterojunction solar cell, which can reduce the content of metal impurities of an N-type silicon wafer and improve the utilization rate of the N-type silicon wafer on the heterojunction solar cell. In the process of gettering, the propulsion of phosphorus element forms N on the surface of the silicon chip+Doping layer, or boron element pushing to form P doping layer on silicon wafer surface, wherein impurity atom in silicon wafer is also towards surface N+The doped layer or P-doped layer is migrated and diffused and fixed at N+And in the doping layer or the P doping layer, a gettering layer is formed on the surface of the silicon wafer, and finally the gettering layer is removed in an alkali liquor corrosion mode, so that the aim of reducing the content of metal impurities in the silicon wafer is fulfilled.
Has the advantages that: compared with the prior art, the invention has the following remarkable advantages:
(1) the invention adopts an external gettering mode, greatly reduces the metal impurity content of the silicon chip, improves the minority carrier lifetime of the silicon chip, and finally improves the conversion efficiency of the battery;
(2) the invention makes the efficiency distribution of the battery more centralized, and greatly improves the consistency of the product;
(3) the invention reduces the metal impurity content of the silicon chip, further reduces the battery edge leakage rate and improves the battery yield;
(4) the invention improves the utilization rate of the silicon chip, relieves the pressure of upstream silicon chip manufacturers and reduces the production cost;
(5) the invention has high production efficiency and low cost, can be completed by utilizing the existing production line equipment, and is beneficial to industrialized popularization and application.
Detailed Description
The technical solution of the present invention will be further described with reference to the following examples.
The N-type high-efficiency solar cell is an N-type high-efficiency heterojunction solar cell made of an N-type silicon wafer.
In the invention, the N-type silicon wafer after the inspection of the incoming material is taken, cleaned and subjected to surface passivation, and then the minority carrier lifetime is tested by adopting a microwave photoconduction method to represent the size of the bulk lifetime.
According to the preparation method of the N-type high-efficiency heterojunction solar cell, the gettering treatment is firstly carried out on the N-type silicon wafer, and then the conventional manufacturing of the solar cell is completed, wherein the gettering treatment comprises the following steps:
(1) cleaning a silicon wafer;
(2) coating or depositing a layer of impurity absorption source on the front surface and the back surface of the silicon wafer;
(3) carrying out heat treatment on the silicon wafer coated or deposited with the gettering source through a chain type annealing furnace to complete gettering, and forming a gettering layer on the surface of the silicon wafer;
(4) and corroding and removing the gettering layer on the surface of the silicon wafer.
As another preferred embodiment of the present invention, in the step (4), the gettering layers on the front and back surfaces of the silicon wafer can also be removed in the subsequent texturing process for conventional cell fabrication, which further simplifies the process flow, and thus the step can be omitted.
In the invention, the N-type silicon wafer with the front surface and the back surface coated or deposited with the gettering source is subjected to chain type high-temperature gettering treatment, so that the metal impurity content of the silicon wafer is reduced, and the service life of a silicon wafer body is prolonged; and the chain type annealing furnace is innovatively introduced, so that the energy consumption (the temperature is 500-800 ℃) and the time (the gettering time is 2-20 min) in the whole process are low, and the defects of high energy consumption (the temperature is 850-900 ℃) and low yield (the gettering time is 1-2 h) of the traditional tubular gettering treatment are overcome.
In the invention, the number of temperature zones of the chain type annealing furnace is not limited, and lamp tube heating and quartz track transmission are adopted. The invention is provided with 4-6 temperature zones, the temperature of each temperature zone can be adjusted within 500-800 ℃, and the belt speed is adjusted according to the actual gettering time.
Example 1
(101) Taking an N-type silicon wafer with the same or similar minority carrier lifetime, firstly cleaning with NaOH, then cleaning with HF and HCL in a mixing manner, and drying;
(102) respectively coating a layer of impurity absorption source on the surface of the silicon wafer by adopting a printing, roll coating, spraying or spin coating liquid source mode on the front surface and the back surface of the silicon wafer, wherein the liquid source can be phosphorus-containing slurry or boron-containing slurry, and the impurity absorption source is formed on the surface of the silicon wafer by roll coating phosphoric acid solution on the front surface and the back surface of the silicon wafer;
(103) feeding the silicon wafer coated with the gettering source into a chain annealing furnace for heat treatment, wherein the chain annealing furnace is provided with 5 temperature zones, the temperature of each temperature zone is respectively set to 530 ℃, 670 ℃, 770 ℃, 740 ℃ and 500 ℃, and the temperature is divided into four groups, and the four groups are respectively subjected to heat treatment in the chain annealing furnace for 2.5min, 5min, 20min and 22min to finish the propulsion of phosphorus element, so that N is formed on the surface of the silicon wafer+Doping layer, and simultaneously, impurity atoms in the silicon wafer body face to surface N+The doped layer is migrated and diffused and fixed on the surface N+In the doped layer, completing gettering, at this time, N on the surface of the silicon wafer+The doped layer is a gettering layer;
(104) cleaning the gettered silicon wafer for 150s at 65 ℃ by adopting a KOH solution with the mass percentage concentration of 1% to remove the gettering layer on the surface of the silicon wafer;
(105) texturing a silicon wafer;
(106) depositing intrinsic amorphous silicon layers on the front and back of the silicon wafer;
(107) depositing doped amorphous silicon on the front and back surfaces of the intrinsic amorphous silicon layer;
(108) depositing transparent conductive films on the front and back of the silicon wafer;
(109) and screen printing a metal electrode to obtain the N-type high-efficiency heterojunction solar cell.
The steps (105) to (109) are conventional fabrication steps of the heterojunction solar cell.
The minority carrier lifetime of the silicon wafer before and after gettering is measured by adopting a WT-2000 minority carrier lifetime instrument, and the specific results are shown in Table 1 by taking an average value from a plurality of points.
Table 1 example 1 minority carrier lifetime of pre-and post-gettering silicon wafers
As can be seen from Table 1, the average minority carrier lifetime of the silicon wafer is improved from 3684us to 3798us after the silicon wafer is subjected to gettering for 2.5 min; the average minority carrier lifetime of the silicon wafer is improved from 3684us to 3856us after the silicon wafer is subjected to gettering for 5 min; when the gettering time was 20min, the average minority carrier lifetime of the silicon wafer reached the peak value 4020us, which indicates that the average minority carrier lifetime of the silicon wafer was improved with the increase in the gettering time. However, when the gettering time is 22min, the average minority carrier lifetime of the silicon wafer is rather decreased.
Example 2
(201) Taking an N-type silicon wafer with the same or similar minority carrier lifetime, firstly cleaning with NaOH, then cleaning with HF and HCL in a mixing manner, and drying;
(202) sending the silicon wafer into a tubular diffusion furnace, introducing nitrogen and oxygen carrying liquid sources into the tubular diffusion furnace, and depositing a layer of impurity absorption source on the front surface and the back surface of the silicon wafer in a high-temperature diffusion mode, wherein the liquid source can be phosphorus oxychloride or boron tribromide;
(203) conveying the silicon wafer with the gettering source deposited on the surface into a chain annealing furnace for gettering treatment, wherein the chain annealing furnace is provided with 5 temperature zones, the temperature of each temperature zone is respectively set to be 530 ℃, 670 ℃, 770 ℃, 740 ℃ and 500 ℃, and the four temperature zones are divided into four groups, the four groups are respectively subjected to heat treatment by the chain annealing furnace for 2.5min, 5min, 20min and 22min to finish the propulsion of boron element, a P doping layer is formed on the surface of the silicon wafer, meanwhile, impurity atoms in the silicon wafer also migrate and diffuse towards the surface P doping layer and are fixed in the surface P doping layer to finish the gettering, and the P doping layer on the surface of the silicon wafer is a gettering layer;
(204) carrying out conventional texturing on the silicon wafer subjected to impurity absorption by adopting a NaOH solution with the mass percentage concentration of 5%, and removing an impurity absorption layer during the texturing process;
(205) depositing intrinsic amorphous silicon layers on the front and back of the silicon wafer;
(206) depositing doped amorphous silicon on the front and back surfaces of the intrinsic amorphous silicon layer;
(207) depositing transparent conductive films on the front and back of the silicon wafer;
(208) and screen printing a metal electrode to obtain the N-type high-efficiency heterojunction solar cell.
The steps 204 to 208 are conventional fabrication steps of the heterojunction solar cell. Specifically, the step (204) not only removes the gettering layers on the front and back sides of the silicon wafer, but also completes the texturing of the silicon wafer, simplifies the process flow and enables the gettering process to be well connected with the texturing process.
The minority carrier lifetime of the silicon wafer before and after gettering is measured by adopting a WT-2000 minority carrier lifetime instrument, and the specific results are shown in Table 2 after a plurality of points are measured and averaged.
Table 2 example 2 minority carrier lifetime of pre-and post-gettering silicon wafers
As can be seen from Table 2, the average minority carrier lifetime of the silicon wafer is improved from 2197us to 2222us after the silicon wafer is subjected to gettering for 2.5 min; after 5min of impurity absorption, the average minority carrier lifetime is increased from 2197us to 2275 us; when the gettering time is 20min, the average minority carrier lifetime of the silicon wafer reaches a peak value of 2390us, and it can be seen that the average minority carrier lifetime of the silicon wafer is improved along with the increase of the gettering time. Similarly, when the gettering time is 22min, the average minority carrier lifetime of the silicon wafer is rather decreased.
As can be seen from tables 1 and 2, the longer the heat treatment time at the higher temperature, the other negative effects are exerted on the silicon wafer, such as the formation of defects by thermal damage and the like, which leads to the decrease of minority carrier lifetime. Due to the irradiation of light in the chain annealing furnace, the diffusion coefficient of phosphorus or boron in the gettering process is accelerated, so that the gettering treatment time is short, and the time plays an important role in improving the performance of the silicon wafer.
In conclusion, the invention firstly coats or deposits a layer of gettering source on the front surface and the back surface of the N-type silicon wafer, the gettering source can be a phosphorus-containing liquid source or a boron-containing liquid source, and the gettering is completed by heat treatment through the chain type annealing furnace, so that the metal impurity content of the silicon wafer is greatly reduced, the minority carrier lifetime of the silicon wafer is improved, the conversion efficiency of the cell is finally improved, and the N-type high-efficiency heterojunction solar cell is prepared. The invention ensures that the distribution of the battery efficiency is more concentrated, the energy consumption of the whole process is low, the time is short, the utilization rate of the silicon rod is improved to a certain extent, and the aim of reducing the production cost is fulfilled.
Claims (1)
1. The preparation method of the N-type high-efficiency solar cell is characterized in that the N-type high-efficiency solar cell is an N-type high-efficiency heterojunction solar cell made of an N-type silicon wafer; the preparation method comprises the following steps:
(201) taking an N-type silicon wafer with the same or similar minority carrier lifetime, firstly cleaning with NaOH, then cleaning with HF and HCL in a mixing manner, and drying;
(202) sending the silicon wafer into a tubular diffusion furnace, introducing nitrogen and oxygen carrying a liquid source into the tubular diffusion furnace, wherein the liquid source is boron tribromide, and depositing a layer of impurity absorption source on the front side and the back side of the silicon wafer in a high-temperature diffusion mode;
(203) conveying the silicon wafer deposited with the gettering source into a chain type annealing furnace for gettering treatment, wherein the chain type annealing furnace is provided with 5 temperature zones, the temperature of each temperature zone is respectively set to be 530 ℃, 670 ℃, 770 ℃, 740 ℃ and 500 ℃, and the heat treatment is carried out for 20min through the chain type annealing furnace, so that the gettering is completed, and a gettering layer is formed on the surface of the silicon wafer;
(204) carrying out conventional texturing on the silicon wafer subjected to impurity absorption by adopting a NaOH solution with the mass percentage concentration of 5%, and removing an impurity absorption layer in the texturing process;
(205) depositing intrinsic amorphous silicon layers on the front and back of the silicon wafer;
(206) depositing doped amorphous silicon on the front and back surfaces of the intrinsic amorphous silicon layer;
(207) depositing transparent conductive films on the front and back of the silicon wafer;
(208) and screen printing a metal electrode to obtain the N-type high-efficiency heterojunction solar cell.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011573231.3A CN112289895B (en) | 2020-12-28 | 2020-12-28 | N-type efficient solar cell and preparation method thereof |
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| CN112289894A (en) * | 2020-12-28 | 2021-01-29 | 常州时创能源股份有限公司 | High-efficiency heterojunction solar cell and preparation method thereof |
| CN112289895B (en) * | 2020-12-28 | 2021-07-27 | 常州时创能源股份有限公司 | N-type efficient solar cell and preparation method thereof |
| CN112909130A (en) * | 2021-03-17 | 2021-06-04 | 苏州联诺太阳能科技有限公司 | Preparation method of solar cell |
| CN113206169A (en) * | 2021-04-18 | 2021-08-03 | 安徽华晟新能源科技有限公司 | Aluminum gettering method and aluminum gettering equipment |
| CN113257953A (en) * | 2021-04-18 | 2021-08-13 | 安徽华晟新能源科技有限公司 | Gettering method and phosphorus gettering device for N-type silicon wafer |
| CN113471311B (en) * | 2021-07-06 | 2023-05-23 | 安徽华晟新能源科技有限公司 | Heterojunction battery and preparation method thereof |
| CN113793800B (en) * | 2021-08-18 | 2024-04-09 | 万华化学集团电子材料有限公司 | Impurity removing process and manufacturing process of semiconductor monocrystalline silicon wafer |
| CN114446834A (en) * | 2022-01-28 | 2022-05-06 | 常州时创能源股份有限公司 | Novel N-type silicon wafer and preparation method thereof |
| CN114496733B (en) * | 2022-04-15 | 2022-07-29 | 济南晶正电子科技有限公司 | High-resistivity composite substrate, preparation method and electronic component |
| CN115148848A (en) * | 2022-06-27 | 2022-10-04 | 常州时创能源股份有限公司 | Chain type phosphorus source for impurity absorption and preparation method and application thereof |
| CN117702269A (en) * | 2023-02-23 | 2024-03-15 | 隆基绿能科技股份有限公司 | High-service-life silicon wafer and silicon wafer gettering method |
| CN117457791B (en) * | 2023-10-20 | 2024-07-26 | 安徽华晟新能源科技有限公司 | Heterojunction battery silicon wafer processing method |
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| CN112289895B (en) * | 2020-12-28 | 2021-07-27 | 常州时创能源股份有限公司 | N-type efficient solar cell and preparation method thereof |
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| CN101857972A (en) * | 2010-03-26 | 2010-10-13 | 浙江大学 | Silicon chip phosphorous diffusion impurity removal process for manufacturing solar cell |
| CN101944554A (en) * | 2010-09-16 | 2011-01-12 | 浙江大学 | Boron-aluminum common gettering method for silicon slice |
| CN203503678U (en) * | 2012-07-23 | 2014-03-26 | 东莞市长安东阳光铝业研发有限公司 | HIT solar cell |
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