CN104733285A - Method for preparing zinc-doped ultra-shallow junction on surface of semiconductor substrate - Google Patents
Method for preparing zinc-doped ultra-shallow junction on surface of semiconductor substrate Download PDFInfo
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- CN104733285A CN104733285A CN201310721825.8A CN201310721825A CN104733285A CN 104733285 A CN104733285 A CN 104733285A CN 201310721825 A CN201310721825 A CN 201310721825A CN 104733285 A CN104733285 A CN 104733285A
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- 239000000758 substrate Substances 0.000 title claims abstract description 88
- 239000004065 semiconductor Substances 0.000 title claims abstract description 76
- 238000000034 method Methods 0.000 title claims abstract description 48
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims abstract description 82
- 239000011701 zinc Substances 0.000 claims abstract description 77
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims abstract description 71
- 229910052725 zinc Inorganic materials 0.000 claims abstract description 70
- 239000011787 zinc oxide Substances 0.000 claims abstract description 41
- 238000000231 atomic layer deposition Methods 0.000 claims abstract description 24
- 238000000137 annealing Methods 0.000 claims abstract description 20
- 238000000151 deposition Methods 0.000 claims abstract description 11
- 238000004140 cleaning Methods 0.000 claims abstract description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 28
- 239000002243 precursor Substances 0.000 claims description 26
- 238000006243 chemical reaction Methods 0.000 claims description 25
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 16
- 239000001301 oxygen Substances 0.000 claims description 16
- 229910052760 oxygen Inorganic materials 0.000 claims description 16
- 229910052757 nitrogen Inorganic materials 0.000 claims description 14
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 8
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 8
- 239000006227 byproduct Substances 0.000 claims description 8
- 238000005260 corrosion Methods 0.000 claims description 7
- 230000007797 corrosion Effects 0.000 claims description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 6
- HQWPLXHWEZZGKY-UHFFFAOYSA-N diethylzinc Chemical compound CC[Zn]CC HQWPLXHWEZZGKY-UHFFFAOYSA-N 0.000 claims description 6
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 235000012239 silicon dioxide Nutrition 0.000 claims description 5
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 238000011109 contamination Methods 0.000 claims description 4
- 239000004519 grease Substances 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 4
- BMYNFMYTOJXKLE-UHFFFAOYSA-N 3-azaniumyl-2-hydroxypropanoate Chemical compound NCC(O)C(O)=O BMYNFMYTOJXKLE-UHFFFAOYSA-N 0.000 claims description 3
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 3
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 3
- ZOIORXHNWRGPMV-UHFFFAOYSA-N acetic acid;zinc Chemical compound [Zn].CC(O)=O.CC(O)=O ZOIORXHNWRGPMV-UHFFFAOYSA-N 0.000 claims description 3
- 235000011114 ammonium hydroxide Nutrition 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- LGRLWUINFJPLSH-UHFFFAOYSA-N methanide Chemical compound [CH3-] LGRLWUINFJPLSH-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 238000003892 spreading Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 3
- 239000004246 zinc acetate Substances 0.000 claims description 3
- 238000002360 preparation method Methods 0.000 abstract description 3
- 230000010354 integration Effects 0.000 abstract description 2
- 239000013078 crystal Substances 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 8
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 7
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 230000002000 scavenging effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
The invention discloses a method for preparing a zinc-doped ultra-shallow junction on the surface of a semiconductor substrate, which belongs to the technical field of semiconductor integration, and the method is used for preparing the zinc-doped ultra-shallow junction on the surface of the semiconductor substrate in a mode of diffusing zinc in zinc oxide obtained by atomic layer deposition, and comprises the following steps: cleaning the surface of the semiconductor substrate; depositing a zinc oxide layer on the semiconductor substrate by utilizing an atomic layer deposition method in an atomic layer deposition system; depositing a cap layer on the zinc oxide layer; high-temperature annealing is carried out to diffuse zinc atoms in the zinc oxide layer to the surface of the semiconductor substrate; and removing the cap layer and the residual zinc oxide layer. The method can be applied to the preparation of the ultra-shallow junction of a planar semiconductor device and a non-planar semiconductor device, and has the advantages of controllable junction depth and small damage to the crystal lattice of a semiconductor substrate in the doping aspect of a small-size semiconductor device.
Description
Technical field
The present invention relates to the preparation method of Semiconductor substrate for ultra-shallow junctions, particularly relate to a kind of method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface, belong to field of semiconductor integration technology.
Background technology
Semiconductor technology, as the core of information industry and basis, is the important symbol of measurement national science technological progress and overall national strength.In in the past more than 40 year, CMOS integrated technology is followed Moore's Law and is improved operating rate, the increase integrated level of device by the characteristic size of reduction of device and reduce costs.But when the grid length of MOS device narrows down to below 90 nanometers, particularly enter into 65 nanometers and with lower node, require that source/drain region and source/drain extension area correspondingly shoal, for ultra-shallow junctions better can improve the short-channel effect of device, but along with the further raising of device size and performance, junction leakage phenomenon is the problem that for ultra-shallow junctions technology more and more needs to solve.
Plasma immersion doping, projection-type gas are immersed the technology such as laser doping, vapour phase doping fast, ion shower doping and the doping of individual layer atoms permeating and are in succession suggested to prepare for ultra-shallow junctions, wherein monatomic diffusing, doping is little with its lattice damage, and the controlled advantage of doping junction depth obtains original more concerns.
The method of ald has that uniformity is high, surface coverage good, from advantages such as limiting surface adsorption reaction and speed of growth controllable precise, has been applied in the growth course of current C MOS technology gate medium.Monatomic for atomic layer deposition sum diffusing, doping is combined, is conducive to the preparation of for ultra-shallow junctions realizing controllable precise.
Summary of the invention
(1) technical problem that will solve
The object of the invention is atomic layer technology and monatomic diffusion phase to combine, thus provides a kind of method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface.
(2) technical scheme
For achieving the above object, the invention provides a kind of method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface, be the mode of being carried out by the zinc in the zinc oxide obtained by ald spreading prepares zinc doping for ultra-shallow junctions at semiconductor substrate surface, the method comprises:
Step 1: cleaning semiconductor substrate surface;
Step 2: the method deposited oxide zinc layers on the semiconductor substrate utilizing ald in atomic layer deposition system;
Step 3: depositing cap layers on described zinc oxide film;
Step 4: the zinc atom in described zinc oxide film is diffused into semiconductor substrate surface by high annealing;
Step 5: remove cap layers and remaining zinc oxide film.
In such scheme, the Semiconductor substrate described in step 1 is silicon substrate, germanium substrate, silicon-Germanium substrate or Group III-V compound semiconductor substrate.
In such scheme, cleaning semiconductor substrate surface described in step 1, first acetone and ethanol is utilized within ultrasonic cleaning 1-10 minute, to remove organic substance and the grease contamination of described semiconductor substrate surface successively respectively, then clean described semiconductor substrate surface with hydrochloric acid, hydrofluoric acid, ammoniacal liquor or hydrobromic acid, remove the natural oxide of described semiconductor substrate surface.
In such scheme, the atomic layer deposition system described in step 2, reaction chamber temperature is 20 DEG C-500 DEG C, and reaction chamber pressure is 0.5 millibar-10 millibars.
In such scheme, the method deposited oxide zinc layers on the semiconductor substrate of ald is utilized described in step 2, first in atomic layer deposition system reaction cavity, pass into the pulse of the precursor source of zinc, then clean with high pure nitrogen, wash out the precursor source of byproduct of reaction and residual zinc, then in atomic layer deposition system reaction cavity, pass into the pulse of the precursor source of oxygen, and clean with high pure nitrogen, wash out the precursor source of byproduct of reaction and residual oxygen, form complete zinc oxide growth cycle, the periodicity grown by controlled oxidization zinc carrys out the growth thickness of accurate controlled oxidization zinc.
In such scheme, in atomic layer deposition system described in step 2, the precursor source of zinc is diethyl zinc (Zn (C
2h
5)
2), zinc methide (Zn (CH
3)
2) or zinc acetate (Zn (CH
3cOO)
2), the precursor source of oxygen is water (H
2o), oxygen (O
2) and ozone (O
3) in one or more combinations, when ald zinc oxide, the pulse of the precursor source of described zinc be 1 millisecond-60 seconds, burst length of the precursor source of described oxygen be 1 millisecond-60 seconds.
In such scheme, the thickness of the zinc oxide film described in step 2 is 1 dust-100 nanometer.
In such scheme, the cap layers described in step 3 is the method deposition adopting ald, plasma reinforced chemical vapour deposition or sputtering, and described cap layers is alundum (Al2O3), silicon dioxide or silicon nitride, and the thickness of described cap layers is 3 dust-200 nanometers.
In such scheme, the high annealing described in step 4, annealing temperature is 400 DEG C-1000 DEG C, the annealing time of described high annealing be 1 millisecond-1 hour.
In such scheme, the removal cap layers described in step 5 and remaining zinc oxide film, be remove cap layers and remaining zinc oxide film by the mode etched or corrode, wherein etching or corrosion adopt the mode of wet method or dry method.
(3) beneficial effect
The invention has the beneficial effects as follows: the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface provided by the invention, it is deposited oxide zinc layers on a semiconductor substrate, depositing cap layers on zinc oxide film, then by the mode of annealing, zinc is diffused in Semiconductor substrate, adopt the mode of corrosion or etching to remove cap layers, thus form for ultra-shallow junctions of zinc doping.Wherein, monoatomic layer diffusion has the advantage that junction depth is controlled, lattice damage is little, and ald has surface coverage is good, growth thickness controllable precise, growth temperature are low, growth thickness uniformity is good advantage, technique for atomic layer deposition and monatomic diffusion technique combine by the present invention, in order to prepare the Semiconductor substrate for ultra-shallow junctions of zinc doping, in the control of for ultra-shallow junctions junction depth, the damage of for ultra-shallow junctions uniformity, semiconductor substrate surface, doping content control etc., there is very large advantage, be applicable to the making of plane, non-planar semiconductor device for ultra-shallow junctions.
Accompanying drawing explanation
Fig. 1 is the method flow diagram forming for ultra-shallow junctions of zinc doping on a semiconductor substrate according to the embodiment of the present invention;
Fig. 2 is the structural representation of the Semiconductor substrate according to the embodiment of the present invention;
Fig. 3 be according to the zinc layers of deposited oxide on a semiconductor substrate of the embodiment of the present invention after structural representation;
Fig. 4 is the structural representation on zinc oxide film after depositing cap layers according to the embodiment of the present invention;
Fig. 5 is according to the annealing of the embodiment of the present invention make zinc be diffused into schematic diagram that semiconductor substrate surface forms for ultra-shallow junctions;
Fig. 6 is the schematic diagram of for ultra-shallow junctions of the zinc doping formed at semiconductor substrate surface according to the embodiment of the present invention;
Fig. 7 is the test result of the square resistance of for ultra-shallow junctions of gallium arsenide substrate zinc doping according to the embodiment of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
The method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface provided by the invention, it is deposited oxide zinc layers on a semiconductor substrate, depositing cap layers on zinc oxide film, then by the mode of annealing, zinc is diffused in Semiconductor substrate, adopt the mode of corrosion or etching to remove cap layers, thus form for ultra-shallow junctions of zinc doping.
As shown in Figure 1, Fig. 1 is the method flow diagram forming for ultra-shallow junctions of zinc doping on a semiconductor substrate according to the embodiment of the present invention, the method is the mode of being carried out by the zinc in the zinc oxide obtained by ald spreading prepares zinc doping for ultra-shallow junctions at semiconductor substrate surface, and the method comprises:
Step 1: cleaning semiconductor substrate surface;
Step 2: the method deposited oxide zinc layers on the semiconductor substrate utilizing ald in atomic layer deposition system;
Step 3: depositing cap layers on described zinc oxide film;
Step 4: the zinc atom in described zinc oxide film is diffused into semiconductor substrate surface by high annealing;
Step 5: remove cap layers and remaining zinc oxide film.
Wherein, the Semiconductor substrate described in step 1 is silicon substrate, germanium substrate, silicon-Germanium substrate or III-V compound Semiconductor substrate.Described cleaning semiconductor substrate surface, first acetone and ethanol is utilized within ultrasonic cleaning 1-10 minute, to remove organic substance and the grease contamination of described semiconductor substrate surface successively respectively, then clean described semiconductor substrate surface with hydrochloric acid, hydrofluoric acid, ammoniacal liquor or hydrobromic acid, remove the natural oxide of described semiconductor substrate surface.
Atomic layer deposition system described in step 2, reaction chamber temperature is 20 DEG C-500 DEG C, and reaction chamber pressure is 0.5 millibar-10 millibars.The described method deposited oxide zinc layers on the semiconductor substrate utilizing ald, first in atomic layer deposition system reaction cavity, pass into the pulse of the precursor source of zinc, then clean with high pure nitrogen, wash out the precursor source of byproduct of reaction and residual zinc, then in atomic layer deposition system reaction cavity, pass into the pulse of the precursor source of oxygen, and clean with high pure nitrogen, wash out the precursor source of byproduct of reaction and residual oxygen, form complete zinc oxide growth cycle, the periodicity grown by controlled oxidization zinc carrys out the growth thickness of accurate controlled oxidization zinc.In described atomic layer deposition system, the precursor source of zinc is diethyl zinc (Zn (C
2h
5)
2), zinc methide (Zn (CH
3)
2) or zinc acetate (Zn (CH
3cOO)
2), the precursor source of oxygen is water (H
2o), oxygen (O
2) and ozone (O
3) in one or more combinations, when ald zinc oxide, the pulse of the precursor source of described zinc be 1 millisecond-60 seconds, burst length of the precursor source of described oxygen be 1 millisecond-60 seconds.The thickness of described zinc oxide film is 1 dust-100 nanometer.
Cap layers described in step 3 is the method deposition adopting ald, plasma reinforced chemical vapour deposition or sputtering, and described cap layers is alundum (Al2O3), silicon dioxide or silicon nitride, and the thickness of described cap layers is 3 dust-200 nanometers.
High annealing described in step 4, annealing temperature is 400 DEG C-1000 DEG C, the annealing time of described high annealing be 1 millisecond-1 hour.
Removal cap layers described in step 5 and remaining zinc oxide film, be remove cap layers and remaining zinc oxide film by the mode etched or corrode, wherein etching or corrosion adopt the mode of wet method or dry method.
Following examples only for technical scheme of the present invention is clearly described, and can not limit the scope of the invention with this.The present embodiment specifically describes the method that a kind of gallium arsenide substrate provided by the present invention makes zinc doping for ultra-shallow junctions, and the method comprises the steps:
Step 1: as shown in Figure 2, first utilizes acetone and ethanol to distinguish organic substance and the grease contamination on ultrasonic cleaning 5 minutes removal gallium arsenide substrate 1 surfaces successively, then uses volume ratio HCl: H
2the watery hydrochloric acid of O=1: 10 removes the natural oxide on described gallium arsenide substrate 1 surface.
Step 2: as shown in Figure 3, in described atomic layer deposition system, the precursor source of zinc is diethyl zinc (Zn (C
2h
5)
2), the precursor source of oxygen can be water (H
2o).The reaction chamber temperature of described atomic layer deposition system is 250 degrees Celsius, reaction chamber pressure is 1.5 millibars, first in atomic layer deposition system reaction cavity, diethyl zinc pulse is passed into, pulse is 200 milliseconds, and then clean with high pure nitrogen, and then clean with high pure nitrogen, the purity of high pure nitrogen is 99.999%, the flow of high pure nitrogen is 300sccm, scavenging period is 2 seconds, wash out byproduct of reaction and residual diethyl zinc, speed up the pulse passing into water in atomic layer deposition system reaction cavity, burst length was 200 bold and unconstrained seconds, and then clean with high pure nitrogen, and then clean with high pure nitrogen, the purity of high pure nitrogen is 99.999%, the flow of high pure nitrogen is 300sccm, scavenging period is 2 seconds.Wash out byproduct of reaction and residual water, forms complete zinc oxide growth cycle, each growth cycle deposits 2 dust zinc oxide, and described gallium arsenide substrate 1 grows the zinc oxide of 25 growth cycles, formation zinc oxide film 2.
Step 3: as shown in Figure 4, utilizes the method for plasma reinforced chemical vapour deposition on described zinc oxide film 2, deposit the silicon dioxide layer 3 of 20 nanometer thickness.
Step 4: as shown in Figure 5, the substrate annealing obtained described step 3 under 600 degrees Celsius 20 minutes, is diffused into zinc in described gallium arsenide substrate 1, forms for ultra-shallow junctions 4 of zinc doping.
Step 5: as shown in Figure 6, utilizes volume ratio CH
3cOOH: NH
4f: H
2the silicon dioxide layer 3 of the substrate surface that solution corrosion 40 seconds removal steps 4 of O=1: 1: 1 obtain, utilizes volume ratio HCl: H
2the zinc oxide film 2 of the substrate remnants that solution corrosion 20 seconds removal steps 4 of O=1: 10 obtain.
As shown in Figure 7, test shows, the present embodiment by the square resistance of semi-insulated gallium arsenide substrate from 10
6Ω/ has been reduced to 2100 Ω/.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. prepare a method for zinc doping for ultra-shallow junctions at semiconductor substrate surface, be the mode of being carried out by the zinc in the zinc oxide obtained by ald spreading prepares zinc doping for ultra-shallow junctions at semiconductor substrate surface, the method comprises:
Step 1: cleaning semiconductor substrate surface;
Step 2: the method deposited oxide zinc layers on the semiconductor substrate utilizing ald in atomic layer deposition system;
Step 3: depositing cap layers on described zinc oxide film;
Step 4: the zinc atom in described zinc oxide film is diffused into semiconductor substrate surface by high annealing;
Step 5: remove cap layers and remaining zinc oxide film.
2. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, is characterized in that, the Semiconductor substrate described in step 1 is silicon substrate, germanium substrate, silicon-Germanium substrate or Group III-V compound semiconductor substrate.
3. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, it is characterized in that, cleaning semiconductor substrate surface described in step 1, first acetone and ethanol is utilized within ultrasonic cleaning 1-10 minute, to remove organic substance and the grease contamination of described semiconductor substrate surface successively respectively, then clean described semiconductor substrate surface with hydrochloric acid, hydrofluoric acid, ammoniacal liquor or hydrobromic acid, remove the natural oxide of described semiconductor substrate surface.
4. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, is characterized in that, the atomic layer deposition system described in step 2, and reaction chamber temperature is 20 DEG C-500 DEG C, and reaction chamber pressure is 0.5 millibar-10 millibars.
5. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, it is characterized in that, the method deposited oxide zinc layers on the semiconductor substrate of ald is utilized described in step 2, first in atomic layer deposition system reaction cavity, pass into the pulse of the precursor source of zinc, then clean with high pure nitrogen, wash out the precursor source of byproduct of reaction and residual zinc, then in atomic layer deposition system reaction cavity, pass into the pulse of the precursor source of oxygen, and clean with high pure nitrogen, wash out the precursor source of byproduct of reaction and residual oxygen, form complete zinc oxide growth cycle, the periodicity grown by controlled oxidization zinc carrys out the growth thickness of accurate controlled oxidization zinc.
6. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 5, is characterized in that, in atomic layer deposition system described in step 2, the precursor source of zinc is diethyl zinc (Zn (C
2h
5)
2), zinc methide (Zn (CH
3)
2) or zinc acetate (Zn (CH
3cOO)
2), the precursor source of oxygen is water (H
2o), oxygen (O
2) and ozone (O
3) in one or more combinations, when ald zinc oxide, the pulse of the precursor source of described zinc be 1 millisecond-60 seconds, burst length of the precursor source of described oxygen be 1 millisecond-60 seconds.
7. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, is characterized in that, the thickness of the zinc oxide film described in step 2 is 1 dust-100 nanometer.
8. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, it is characterized in that, cap layers described in step 3 is the method deposition adopting ald, plasma reinforced chemical vapour deposition or sputtering, described cap layers is alundum (Al2O3), silicon dioxide or silicon nitride, and the thickness of described cap layers is 3 dust-200 nanometers.
9. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, is characterized in that, the high annealing described in step 4, and annealing temperature is 400 DEG C-1000 DEG C, the annealing time of described high annealing be 1 millisecond-1 hour.
10. the method preparing zinc doping for ultra-shallow junctions at semiconductor substrate surface according to claim 1, it is characterized in that, removal cap layers described in step 5 and remaining zinc oxide film, be remove cap layers and remaining zinc oxide film by the mode etched or corrode, wherein etching or corrosion adopt the mode of wet method or dry method.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310721825.8A CN104733285A (en) | 2013-12-24 | 2013-12-24 | Method for preparing zinc-doped ultra-shallow junction on surface of semiconductor substrate |
| PCT/CN2014/075402 WO2015096304A1 (en) | 2013-12-24 | 2014-04-15 | Method for preparing zinc-doped ultra-shallow junction on semiconductor substrate surface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310721825.8A CN104733285A (en) | 2013-12-24 | 2013-12-24 | Method for preparing zinc-doped ultra-shallow junction on surface of semiconductor substrate |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109037043A (en) * | 2017-06-08 | 2018-12-18 | 朗姆研究公司 | Using atomic layer deposition and anneal so that antimony and phosphor codoping form ultra-shallow junctions |
| CN110508155A (en) * | 2019-08-21 | 2019-11-29 | 南京大学 | A kind of preparation method of zinc-base inorganic-organic hybridization nanoporous seperation film |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117727695B (en) * | 2024-02-07 | 2024-05-07 | 中国科学院长春光学精密机械与物理研究所 | CMOS device for reducing electric leakage and preparation method thereof |
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| JPH11145553A (en) * | 1997-11-10 | 1999-05-28 | Hitachi Ltd | Semiconductor laser device and manufacture thereof |
| US20080164476A1 (en) * | 2007-01-09 | 2008-07-10 | Sang Hee Park | METHOD OF MANUFACTURING P-TYPE ZnO SEMICONDUCTOR LAYER USING ATOMIC LAYER DEPOSITION AND THIN FILM TRANSISTOR INCLUDING THE P-TYPE ZnO SEMICONDUCTOR LAYER |
| US20120252197A1 (en) * | 2011-03-31 | 2012-10-04 | Tokyo Electron Limited | Method for forming ultra-shallow boron doping regions by solid phase diffusion |
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| JP2000091254A (en) * | 1998-09-11 | 2000-03-31 | Oki Electric Ind Co Ltd | METHOD FOR DIFFUSING SOLID PHASE OF Zn AND LIGHT EMITTING ELEMENT USING THE SAME |
| US8569158B2 (en) * | 2011-03-31 | 2013-10-29 | Tokyo Electron Limited | Method for forming ultra-shallow doping regions by solid phase diffusion |
| CN102938371B (en) * | 2012-11-28 | 2016-01-20 | 中国科学院微电子研究所 | Method for preparing n +/p type ultra-shallow junction on p type Ge substrate |
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| JPH07162014A (en) * | 1993-12-07 | 1995-06-23 | Honda Motor Co Ltd | Manufacture of semiconductor device |
| JPH11145553A (en) * | 1997-11-10 | 1999-05-28 | Hitachi Ltd | Semiconductor laser device and manufacture thereof |
| US20080164476A1 (en) * | 2007-01-09 | 2008-07-10 | Sang Hee Park | METHOD OF MANUFACTURING P-TYPE ZnO SEMICONDUCTOR LAYER USING ATOMIC LAYER DEPOSITION AND THIN FILM TRANSISTOR INCLUDING THE P-TYPE ZnO SEMICONDUCTOR LAYER |
| US20120252197A1 (en) * | 2011-03-31 | 2012-10-04 | Tokyo Electron Limited | Method for forming ultra-shallow boron doping regions by solid phase diffusion |
| CN103193261A (en) * | 2013-04-08 | 2013-07-10 | 长春理工大学 | Method for preparing p-type ZnO nanowire |
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| CN109037043A (en) * | 2017-06-08 | 2018-12-18 | 朗姆研究公司 | Using atomic layer deposition and anneal so that antimony and phosphor codoping form ultra-shallow junctions |
| CN109037043B (en) * | 2017-06-08 | 2024-03-29 | 朗姆研究公司 | Method for processing substrate |
| CN110508155A (en) * | 2019-08-21 | 2019-11-29 | 南京大学 | A kind of preparation method of zinc-base inorganic-organic hybridization nanoporous seperation film |
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| WO2015096304A1 (en) | 2015-07-02 |
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