CN104601503B - 具有预测判决反馈均衡的接收机和包括该接收机的显示器 - Google Patents

具有预测判决反馈均衡的接收机和包括该接收机的显示器 Download PDF

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Publication number
CN104601503B
CN104601503B CN201410592647.8A CN201410592647A CN104601503B CN 104601503 B CN104601503 B CN 104601503B CN 201410592647 A CN201410592647 A CN 201410592647A CN 104601503 B CN104601503 B CN 104601503B
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China
Prior art keywords
field effect
digital
effect transistor
analog converter
replica
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CN201410592647.8A
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English (en)
Chinese (zh)
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CN104601503A (zh
Inventor
穆罕默德·赫克马特
阿米尔·阿米尔查尼
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Samsung Display Co Ltd
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Samsung Display Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/70—Automatic control for modifying converter range
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03114—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals
    • H04L25/03146—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals with a recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03878—Line equalisers; line build-out devices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Noise Elimination (AREA)
  • Analogue/Digital Conversion (AREA)
  • Dc Digital Transmission (AREA)
CN201410592647.8A 2013-10-31 2014-10-29 具有预测判决反馈均衡的接收机和包括该接收机的显示器 Active CN104601503B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201361898421P 2013-10-31 2013-10-31
US61/898,421 2013-10-31
US14/340,463 US9674008B2 (en) 2013-10-31 2014-07-24 Body-biased slicer design for predictive decision feedback equalizers
US14/340,463 2014-07-24

Publications (2)

Publication Number Publication Date
CN104601503A CN104601503A (zh) 2015-05-06
CN104601503B true CN104601503B (zh) 2019-12-20

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410592647.8A Active CN104601503B (zh) 2013-10-31 2014-10-29 具有预测判决反馈均衡的接收机和包括该接收机的显示器

Country Status (7)

Country Link
US (1) US9674008B2 (enExample)
EP (1) EP2869518B1 (enExample)
JP (1) JP6463619B2 (enExample)
KR (1) KR102240296B1 (enExample)
CN (1) CN104601503B (enExample)
AU (1) AU2014240238B2 (enExample)
TW (1) TWI642286B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9595975B1 (en) * 2015-09-30 2017-03-14 Samsung Display Co., Ltd. Low-latency high-gain current-mode logic slicer
US10798396B2 (en) 2015-12-08 2020-10-06 Samsung Display Co., Ltd. System and method for temporal differencing with variable complexity
US9722820B1 (en) * 2016-03-17 2017-08-01 Samsung Display Co., Ltd. Calibration technique for a tap value in decision feedback equalizers
US9742597B1 (en) * 2016-03-29 2017-08-22 Xilinx, Inc. Decision feedback equalizer
US10476707B2 (en) * 2018-03-05 2019-11-12 Samsung Display Co., Ltd. Hybrid half/quarter-rate DFE
CN112422461B (zh) 2020-11-05 2022-04-19 硅谷数模(苏州)半导体有限公司 判决反馈均衡器以及数据的采集与校正方法
US11695397B2 (en) * 2021-08-10 2023-07-04 Xilinx, Inc. Offset circuitry and threshold reference circuitry for a capture flip-flop
CN114217561B (zh) * 2021-12-15 2024-03-01 江苏集萃智能集成电路设计技术研究所有限公司 用于dp接口的控制电路装置及其自适应均衡方法
EP4203324A1 (en) * 2021-12-21 2023-06-28 Imec VZW An input circuitry and a method for receiving an analog input signal
US11881969B2 (en) * 2022-04-22 2024-01-23 Samsung Display Co., Ltd. Real-time DC-balance aware AFE offset cancellation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7728749B2 (en) * 2007-06-12 2010-06-01 Texas Instruments Incorporated Multi-mode digital-to-analog converter

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5132562A (en) * 1991-07-01 1992-07-21 International Business Machines Corporation Push-pull driver without input saturation or output leakage
KR100474821B1 (ko) 1997-08-26 2005-06-28 삼성전자주식회사 비선형특성을갖는재생신호처리장치및방법
KR100442818B1 (ko) 1998-10-14 2004-09-18 삼성전자주식회사 순차적 갱신 적응형 등화기 및 그 방법
CN100428640C (zh) * 2004-04-07 2008-10-22 明基电通股份有限公司 滤波器、均衡器及决策回授等化方法
US7499489B1 (en) * 2004-09-16 2009-03-03 Analog Devices, Inc. Equalization in clock recovery receivers
US7733951B2 (en) 2006-09-12 2010-06-08 Mediatek Inc. Equalization method with adjustable equalizer span
US8743944B2 (en) * 2006-09-14 2014-06-03 Nec Corporation Decision feedback equalizing method and equalizer
US7792187B2 (en) 2007-08-31 2010-09-07 International Business Machines Corporation Multi-tap decision feedback equalizer (DFE) architecture eliminating critical timing path for higher-speed operation
JP4956840B2 (ja) * 2008-03-14 2012-06-20 日本電気株式会社 判定帰還等化装置及び方法
TWI452880B (zh) * 2009-09-03 2014-09-11 Realtek Semiconductor Corp 等化裝置
US8680937B2 (en) * 2010-11-17 2014-03-25 Freescale Semiconductor, Inc. Differential equalizers with source degeneration and feedback circuits
TWI478541B (zh) * 2011-08-02 2015-03-21 Realtek Semiconductor Corp 等化裝置及等化方法
US9013386B2 (en) * 2012-01-09 2015-04-21 Himax Technologies Limited Liquid crystal display and method for operating the same
US8564352B2 (en) * 2012-02-10 2013-10-22 International Business Machines Corporation High-resolution phase interpolators
US9100229B2 (en) * 2013-09-25 2015-08-04 Avago Technologies General Ip (Singapore) Pte. Ltd. Method of calibrating a slicer in a receiver or the like

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7728749B2 (en) * 2007-06-12 2010-06-01 Texas Instruments Incorporated Multi-mode digital-to-analog converter

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A 6.25-Gbps 4-tap Low-Power Decision Feedback Equalizer in 0.13 um CMOS Technology;ZHANG Xuelin等;《IEEE》;IEEE;20130925;图2及其相关说明 *
Decision Feedback Equalizers Using the Back-Gate Feedback Technique;HSIEH Changlin等;《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS》;IEEE;20111231;第58卷(第12期);附图4a、5及其相关说明 *

Also Published As

Publication number Publication date
KR20150050428A (ko) 2015-05-08
US20150116299A1 (en) 2015-04-30
TWI642286B (zh) 2018-11-21
CN104601503A (zh) 2015-05-06
TW201517569A (zh) 2015-05-01
EP2869518A1 (en) 2015-05-06
AU2014240238B2 (en) 2019-01-17
EP2869518B1 (en) 2018-05-23
US9674008B2 (en) 2017-06-06
JP6463619B2 (ja) 2019-02-06
AU2014240238A1 (en) 2015-05-14
JP2015089126A (ja) 2015-05-07
KR102240296B1 (ko) 2021-04-14

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