CN104579202A - Triangular wave comparator circuit - Google Patents
Triangular wave comparator circuit Download PDFInfo
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- CN104579202A CN104579202A CN201410854474.2A CN201410854474A CN104579202A CN 104579202 A CN104579202 A CN 104579202A CN 201410854474 A CN201410854474 A CN 201410854474A CN 104579202 A CN104579202 A CN 104579202A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3264—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits in audio amplifiers
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Abstract
The invention relates to a triangular wave comparator circuit. The triangular wave comparator circuit comprises a pre-amplifying module, an amplifying module and a comparison outputting module; the pre-amplifying module is equipped with an in-phase input end for receiving a triangular wave signal, and a reversal-phase input end for receiving an integral signal; the pre-amplifying module is sued for performing first-stage amplification for the inputted triangular wave signal and the integral signal, as well as respectively outputting two signals to the amplifying module; the amplifying module is connected with the pre-amplifying module; the amplifying module is equipped with two medium joints and used for performing multi-stage amplifying for the two signals input by the pre-amplifying circuit as well as respectively outputting to the comparison outputting module through the two medium joints; the comparison outputting module is connected with the amplifying module and is equipped with an output end; the comparison output module is used for comparing and modulating the received signals as well as outputting a PWM signal through the output end. With the adoption of the triangular wave comparator circuit, the D type audio power amplification output distortion can be reduced.
Description
Technical field
The present invention relates to a kind of triangle wave device circuit.
Background technology
As everyone knows, D class power amplifier, is also digital power amplifier.Exactly audio signal is become a string PWM waveform of equivalent area by the triangular modulation that exceeds audio frequency highest frequency certain multiple.Thus D class audio frequency power amplifier needs triangle wave device circuit, realize the modulation of triangular signal to integrated signal, produce the modulation signal of PWM form.
For traditional triangle wave device circuit, adopt general comparator circuit structure, but the output delay of comparator is with the change of input common mode electrical level, the gain of output modulation signal to input integral signal is changed with the amplitude of integrated signal, finally causes D class audio frequency power amplifier to export distortion.Therefore, the quiet charging circuit of existing D class audio frequency power amplifier more and more can not meet the needs of user.
Summary of the invention
In order to overcome the deficiency that above-mentioned prior art exists, the present invention aims to provide a kind of triangle wave device circuit, output delay can be reduced significantly, and reduce input common mode electrical level significantly to the impact of output delay, thus reduce D class audio frequency power amplifier output distortion.
The invention provides a kind of triangle wave device circuit, for realizing the debugging of triangular signal to integrated signal, comprising the pre-amplification module, the amplification module that connect in turn and comparing output module, wherein:
Described pre-amplification module, there is in-phase input end and inverting input, described in-phase input end is for accepting described triangular signal, described inverting input is for accepting described integrated signal, and described pre-amplification module is used for carrying out first order amplification to inputted triangular signal and integrated signal and exporting two paths of signals to described amplification module respectively;
Described amplification module, be connected with pre-amplification module with described, described amplification module possesses two intermediate nodes, described amplification module is used for carrying out multistage amplification respectively to the two paths of signals that described pre-amplification module inputs, and exports to respectively by described two intermediate nodes and describedly compare output module;
Describedly compare output module, be connected with described amplification module, the described output module that compares is for amplifying accepted two paths of signals and being converted into a road signal, and the described output module that compares possesses output for output pwm signal.
Concrete, described pre-amplification module comprises:
First metal-oxide-semiconductor, described first metal-oxide-semiconductor is PMOS, its grid as described in-phase input end, for inputting triangular signal;
Second metal-oxide-semiconductor, described second metal-oxide-semiconductor is PMOS, and its grid is as described inverting input, and for input integral signal, its source electrode is connected with the source electrode of described first metal-oxide-semiconductor;
3rd metal-oxide-semiconductor, described 3rd metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described first metal-oxide-semiconductor, its grid and drain electrode short circuit, and described 3rd metal-oxide-semiconductor is used for as the first mirror image metal-oxide-semiconductor;
4th metal-oxide-semiconductor, described 4th metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described second metal-oxide-semiconductor, its grid and drain electrode short circuit, and described 4th metal-oxide-semiconductor is used for as the second mirror image metal-oxide-semiconductor;
5th metal-oxide-semiconductor, described 5th metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with biased electrical pressure side, its drain electrode is connected with the source electrode of described first metal-oxide-semiconductor, and described 5th metal-oxide-semiconductor is used for providing direct current for described first metal-oxide-semiconductor and described second metal-oxide-semiconductor.
Concrete, described amplification module comprises:
6th metal-oxide-semiconductor, described 6th metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the grid of described 4th metal-oxide-semiconductor, and described 6th metal-oxide-semiconductor is used for forming current mirror with described 4th metal-oxide-semiconductor;
7th metal-oxide-semiconductor, described 7th metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the grid of described 3rd metal-oxide-semiconductor, and described 7th metal-oxide-semiconductor is used for forming current mirror with described 3rd metal-oxide-semiconductor;
8th metal-oxide-semiconductor, described 8th metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its drain electrode is connected with the drain electrode of described 6th metal-oxide-semiconductor, its grid and its drain electrode short circuit, and described 8th metal-oxide-semiconductor is used for as the 3rd mirror image metal-oxide-semiconductor;
9th metal-oxide-semiconductor, described 9th metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with the grid of described 8th metal-oxide-semiconductor, and its drain electrode is connected with the drain electrode of described 7th metal-oxide-semiconductor, and described 9th metal-oxide-semiconductor is used for forming current mirror with described 8th metal-oxide-semiconductor;
Tenth metal-oxide-semiconductor, described tenth metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the grid of described 4th metal-oxide-semiconductor, and described tenth metal-oxide-semiconductor is used for forming current mirror with described 4th metal-oxide-semiconductor;
11 metal-oxide-semiconductor, described 11 metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the drain electrode of described 3rd metal-oxide-semiconductor, and the 11 metal-oxide-semiconductor is used for forming current mirror with described 3rd metal-oxide-semiconductor;
12 metal-oxide-semiconductor, described 12 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its drain electrode is connected with the drain electrode of described 11 metal-oxide-semiconductor, its grid and its drain electrode short circuit, and described 12 metal-oxide-semiconductor is as the 4th mirror image metal-oxide-semiconductor;
13 metal-oxide-semiconductor, described 13 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with the grid of described 12 metal-oxide-semiconductor, its drain electrode is connected with the drain electrode of the tenth metal-oxide-semiconductor, and described 13 metal-oxide-semiconductor and described 12 metal-oxide-semiconductor form current mirror;
First intermediate node, the tie point of the drain electrode of described 13 metal-oxide-semiconductor and the drain electrode of described tenth metal-oxide-semiconductor, as the first intermediate node, describedly compares output module for being exported to by signal;
Second intermediate node, the tie point of the drain electrode of described 9th metal-oxide-semiconductor and the drain electrode of described 7th metal-oxide-semiconductor, as described second intermediate node, describedly compares output module for being exported to by signal.
Concrete, the described output module that compares comprises:
14 metal-oxide-semiconductor, described 14 metal-oxide-semiconductor is PMOS, and its grid is connected with described first intermediate node;
15 metal-oxide-semiconductor, described 15 metal-oxide-semiconductor is PMOS, and its grid is connected with described second intermediate node, and its source electrode is connected with the source electrode of described 14 metal-oxide-semiconductor;
16 metal-oxide-semiconductor, described 16 metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described 14 metal-oxide-semiconductor, its grid and drain electrode short circuit, and described 16 metal-oxide-semiconductor is used for as the 5th mirror image metal-oxide-semiconductor;
17 metal-oxide-semiconductor, described 17 metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described 15 metal-oxide-semiconductor, its grid is connected with the grid of described 16 metal-oxide-semiconductor, and described 17 metal-oxide-semiconductor and described 16 metal-oxide-semiconductor form current-mirror structure;
18 metal-oxide-semiconductor, described 18 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid connects biased electrical pressure side, its drain electrode is connected with the source electrode of described 15 metal-oxide-semiconductor, and described 18 metal-oxide-semiconductor is used for providing DC power supply to described 14 metal-oxide-semiconductor and described 15 metal-oxide-semiconductor;
3rd intermediate node, the drain electrode of described 15 metal-oxide-semiconductor and the tie point of described 17 metal-oxide-semiconductor, as described 3rd intermediate node, output signal for two-way prime amplifying signal being converted to a road;
19 metal-oxide-semiconductor, described 19 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with described 3rd intermediate node;
20 metal-oxide-semiconductor, described 20 metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with described 3rd intermediate node, and its drain electrode is connected with the drain electrode of described 19 metal-oxide-semiconductor;
Output, the drain electrode of described 19 metal-oxide-semiconductor and the drain junction of described 20 metal-oxide-semiconductor as described output, for exporting the pwm signal that described triangle wave device circuit exports.
Utilize triangle wave device circuit of the present invention, effectively can improve the response of triangle wave device to integrated signal VN and triangular signal VP, the final D of reduction class power amplifier exports distortion.
Accompanying drawing explanation
Fig. 1 is the circuit structure diagram of triangle wave device circuit of the present invention;
Fig. 2 is the oscillogram of triangle wave device circuit input signal of the present invention and output signal.
Embodiment
Below in conjunction with accompanying drawing, triangle wave device circuit of the present invention is described in detail.
Fig. 1 is the circuit structure diagram of triangle wave device circuit of the present invention, and triangle wave device circuit of the present invention possesses the pre-amplification module I, the amplification module II that connect in turn and compares output module III.
Wherein pre-amplification module I, has in-phase input end and inverting input, and in-phase input end is used for accepting triangular signal VP, and inverting input is used for accepting integrated signal VN, and the first metal-oxide-semiconductor M1 is PMOS, and its grid is as this input in the same way; Second metal-oxide-semiconductor M2 is PMOS, and its grid is as this inverting input.The source electrode of the second metal-oxide-semiconductor M2 is connected with the source electrode of the first metal-oxide-semiconductor M1, thus the first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 forms front input difference pair jointly.
3rd metal-oxide-semiconductor M3 is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of the first metal-oxide-semiconductor M1, and grid and the drain electrode short circuit of the 3rd metal-oxide-semiconductor, form automatic biasing structure.The effect of the 3rd metal-oxide-semiconductor M3 is as the first mirror image metal-oxide-semiconductor, for by the outgoing mirror picture of the first PMOS M1 in aftermentioned amplification module II.
4th metal-oxide-semiconductor M4 is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of the second metal-oxide-semiconductor M2, and its grid and drain electrode short circuit, form automatic biasing structure.The effect of the 4th NMOS tube M4 the output of the second PMOS is proceeded in aftermentioned amplification module II as the second mirror image metal-oxide-semiconductor.
5th metal-oxide-semiconductor M5 is PMOS, its source electrode is connected with power supply Vdd, its grid is connected with biased electrical pressure side VB1, its drain electrode is connected with the source electrode of the first metal-oxide-semiconductor M1, biased electrical pressure side VB1 provides for external circuit, effect is for the 5th metal-oxide-semiconductor M5 provides bias voltage to make its conducting, the 5th metal-oxide-semiconductor M5 be used for for the first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 jointly form before input difference to providing direct current.
Amplification module II is connected with pre-amplification module I, for carrying out multistage amplification to the output of pre-amplification module I, and the result after amplifying to be exported to by two intermediate nodes and compares in output module III.
In the present embodiment, amplification module II utilizes many group current mirrors to realize.Comprise particularly:
6th metal-oxide-semiconductor M6 is NMOS tube, its source ground, and its grid is connected with the drain electrode of the 4th metal-oxide-semiconductor M4, thus the 6th metal-oxide-semiconductor M6 and the 4th metal-oxide-semiconductor M4 forms current mirror;
7th metal-oxide-semiconductor M7 is NMOS tube, its source ground, and its grid is connected with the drain electrode of the 3rd metal-oxide-semiconductor M3, thus the 7th metal-oxide-semiconductor M7 and the 3rd metal-oxide-semiconductor M3 forms current mirror;
8th metal-oxide-semiconductor M8 is PMOS, and its source electrode is connected with power supply, and its drain electrode is connected with the drain electrode of the 6th metal-oxide-semiconductor M6, and its grid and its drain electrode short circuit form automatic biasing structure, and the 8th metal-oxide-semiconductor M8 is used for as the 3rd mirror image metal-oxide-semiconductor;
9th metal-oxide-semiconductor M9 is PMOS, and its source electrode is connected with power supply, and its grid is connected with the grid of the 8th metal-oxide-semiconductor M8, thus the 9th metal-oxide-semiconductor M9 and the 8th metal-oxide-semiconductor M8 forms current mirror.The drain electrode of the 9th metal-oxide-semiconductor M9 is connected with the drain electrode of the 7th metal-oxide-semiconductor M7, and this tie point is as the second intermediate node B;
Tenth metal-oxide-semiconductor M10 is NMOS tube, its source ground, and its grid is connected with the drain electrode of the 4th metal-oxide-semiconductor M4, thus the tenth metal-oxide-semiconductor M10 and the 4th metal-oxide-semiconductor M4 forms current mirror;
11 metal-oxide-semiconductor M11 is NMOS tube, its source ground, and its grid is connected with the grid of the 3rd metal-oxide-semiconductor M3, thus the 11 metal-oxide-semiconductor M11 and the 3rd metal-oxide-semiconductor M3 forms current mirror;
12 metal-oxide-semiconductor M12 is PMOS, and its source electrode is connected with power supply, and its drain electrode is connected with the drain electrode of the 11 metal-oxide-semiconductor M11, its grid and drain electrode short circuit, and form automatic biasing structure, the 12 metal-oxide-semiconductor is as the 4th mirror image metal-oxide-semiconductor;
13 metal-oxide-semiconductor M13 is PMOS, and its source electrode is connected with power supply, and its its drain electrode that is connected of the grid of its grid the 12 metal-oxide-semiconductor M12 is connected with the drain electrode of the tenth metal-oxide-semiconductor M10, and this tie point is as the first intermediate node A.
Amplification module II achieves and carries out multistage amplification to the output signal of the first metal-oxide-semiconductor M1 and the output signal of the second metal-oxide-semiconductor M2, and exports result to aftermentioned comparison in output module III by the first middle node A point and the second intermediate node B.
Relatively output module III is connected with described amplification module II, and the signal accepted compares and modulates and by described output output pwm signal, concrete, compares output module III by following circuit realiration:
14 metal-oxide-semiconductor M14 is PMOS, and its grid is connected with the first intermediate node A.15 metal-oxide-semiconductor M15 is PMOS, and its grid is connected with the second intermediate node B, and its source electrode is connected with the source electrode of the 14 metal-oxide-semiconductor M14.Input difference pair after 14 metal-oxide-semiconductor M14 and the 15 metal-oxide-semiconductor M15 is formed.
16 metal-oxide-semiconductor M16 is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of the 14 metal-oxide-semiconductor M14, its grid and drain electrode short circuit.
17 metal-oxide-semiconductor M17 is NMOS tube, its source ground, its drain electrode is connected with the drain electrode of the 15 metal-oxide-semiconductor M15, its grid is connected with the grid of the 16 metal-oxide-semiconductor M16,17 metal-oxide-semiconductor M17 and the 16 metal-oxide-semiconductor M16 forms current mirror, and the 17 metal-oxide-semiconductor M17 is connected contact as the 3rd intermediate node C with the drain electrode of the 15 metal-oxide-semiconductor M15, for prime amplifying signal being changed into a road output signal.
18 metal-oxide-semiconductor M18 is PMOS, and its source electrode is connected with power supply, and its grid connects biased electrical pressure side VB1, and this bias voltage provides for external circuit, and for making the 18 metal-oxide-semiconductor M18 conducting, its drain electrode is connected with the source electrode of the 15 metal-oxide-semiconductor.18 metal-oxide-semiconductor M18 is for rear input difference is to providing direct current.
19 metal-oxide-semiconductor M19 is PMOS, and its source electrode is connected with power supply, and its grid is connected with the 3rd intermediate node C; 20 metal-oxide-semiconductor M20 is NMOS tube, its source ground, and its grid is connected with the 3rd intermediate node C, and its drain electrode is connected with the drain electrode of the 19 metal-oxide-semiconductor M19, tie point as output end vo ut for exporting the pwm signal after modulation.
Next, continuation composition graphs 1 and Fig. 2 are described the course of work of triangle wave device circuit of the present invention and principle.
In pre-amplification module I, the first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 forms the first input difference pair, for carrying out first order amplification to triangular signal VP and integrated signal VN.3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 as the right load of the first input difference, for the common-mode voltage of stable input difference to output voltage.Meanwhile, the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor, respectively as mirror image metal-oxide-semiconductor, are respectively used to the output signal of the output signal of the first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 to be mirrored in amplification module II.
In amplification module II, the 11 metal-oxide-semiconductor M11 and the 3rd metal-oxide-semiconductor M3 forms current mirror, and the 12 metal-oxide-semiconductor M12, as the load of current mirror, carries out second level amplification to the output signal of the first metal-oxide-semiconductor M1; 13 metal-oxide-semiconductor M13 forms current mirror with the 12 metal-oxide-semiconductor M12 simultaneously, carries out three grades of amplifications to the output signal of the first metal-oxide-semiconductor M1.
4th metal-oxide-semiconductor M4 and the 6th metal-oxide-semiconductor M6 forms current mirror, and the 8th metal-oxide-semiconductor M8 carries out second level amplification as the output signal of load to the second metal-oxide-semiconductor M2 of current mirror; 9th metal-oxide-semiconductor M9 and the 8th MOS closes M8 and forms current mirror, carries out three grades of amplifications to the output signal of the second metal-oxide-semiconductor M2.
7th metal-oxide-semiconductor M7 and the 3rd metal-oxide-semiconductor M3 forms current mirror, and the 9th metal-oxide-semiconductor M9, as the load of current mirror, carries out second level amplification to the output signal of the first metal-oxide-semiconductor M1.
Tenth metal-oxide-semiconductor M10 and the 4th metal-oxide-semiconductor M4 forms current mirror, and the 12 metal-oxide-semiconductor M12, as the load of current mirror, carries out secondary amplification to the output of the second metal-oxide-semiconductor M2.
Finally by the first intermediate node A and the second intermediate node B, two-way amplifying signal is input to and amplifies in output module III.
In amplification output module III, the 14 metal-oxide-semiconductor M14 forms the second input difference pair with the 15 metal-oxide-semiconductor M15, the 18 metal-oxide-semiconductor M18 to this second input difference to providing direct current.16 metal-oxide-semiconductor M16 and the 17 metal-oxide-semiconductor M17 forms the right current mirror load of the second Differential Input, for converting two-way prime amplifying signal to a road and exporting to the 19 metal-oxide-semiconductor M19 and the 20 metal-oxide-semiconductor M20 by the 3rd intermediate node C.19 metal-oxide-semiconductor M19 and 20 metal-oxide-semiconductor M20 forms output stage, accept the signal that the 3rd intermediate node C inputs, and export modulation signal with the form of AB class output stage, concrete with reference to accompanying drawing 2, thus achieve integrated signal VN triangular signal VP is modulated, the final PWM form signal exported.
Below the above-mentioned principle to this circuit and technique effect are described.The above-mentioned second level is amplified and the third level amplifies the amplification all referring to current signal, the first order is enlarged into input mutual conductance and amplifies, for the first metal-oxide-semiconductor M1, amplification coefficient is the mutual conductance Gm of the first metal-oxide-semiconductor M1, therefore input voltage VP is Gm times through amplifying after-current, and this electric current is the output signal of the first metal-oxide-semiconductor M1.The multiplication factor that the second level is amplified and the third level is amplified is current mirror coefficient, such as, be designed to 8 times.For the 13 metal-oxide-semiconductor M13, the electric current of the 13 metal-oxide-semiconductor M13 is 8 times of the electric current of the first metal-oxide-semiconductor M1, this electric current flows through the drain-source resistance of the 13 metal-oxide-semiconductor M13 resistance Rds in parallel with both drain-source resistances of the tenth metal-oxide-semiconductor M10, voltage after being amplified is Gm*8*Rds times of input voltage VP, and representative value can more than 800 times.Therefore, the input voltage of the 14 metal-oxide-semiconductor M14, the i.e. output signal of the first intermediate node A, from triangular signal VP, integrated signal VN typical case can more than 800 times.
Therefore for the first intermediate node A, the output of the 13 metal-oxide-semiconductor M13 and the tenth metal-oxide-semiconductor M10 is passed through from triangular signal VP and integrated signal VN respectively and is amplified, namely be exaggerated the differential input signal of triangular signal VP and integrated signal VN, inhibit its common mode input signal.In like manner for the second intermediate node B, the output of the 9th metal-oxide-semiconductor M9 and the 7th metal-oxide-semiconductor M7 is passed through from triangular signal VP and integrated signal VN respectively and is amplified, namely be exaggerated the differential input signal of triangular signal VP and integrated signal VN, inhibit its common mode input signal.Subsequently in amplification output module III, carry out differential mode similarly and amplified common mode inhibition.
Due in D class audio frequency power amplifier, the slope of integrated signal VN and amplitude are often designed to close to triangular signal VP, significantly can reduce the amplitude of triangle wave device Differential Input component on the one hand, and then significantly increase comparator output delay, significantly can increase the amplitude of triangle wave device common mode input component on the other hand, and then make comparator output delay with the fluctuation of common mode input component, namely result in triangular signal VP and the common-mode input range of integrated signal VN own is larger, difference-mode input amplitude is less, these two kinds of effects are finally all presented as that D class audio frequency power amplifier exports distortion.Correspondingly, the present invention is directed to that triangle wave device input signal difference-mode input component is less inputs the larger feature of component with common mode, adopt triangle wave device circuit of the present invention, at utmost reduce its impact on comparator output delay.First, triangle wave device circuit of the present invention makes full use of circuit element and carries out multistage amplification, except the 5th metal-oxide-semiconductor M5 and the 18 metal-oxide-semiconductor M18, all the other 18 metal-oxide-semiconductors play respectively signal amplify effect, this multistage amplification can shorten significantly difference-mode input component less time comparator output delay.Secondly, the circuit element of triangle wave device circuit of the present invention forms symmetrical automatic biasing structure, and the propagation being intercepted common-mode signal by symmetry is amplified, by the DC point of the every one-level of automatic biasing Stability Analysis of Structures, and the amplitude of attenuation common-mode signal.Thus improving the response of triangle wave device to integrated signal VN and triangular signal VP significantly, the final D of reduction class power amplifier exports distortion.
Claims (4)
1. a triangle wave device circuit, for realizing the debugging of triangular signal to integrated signal, is characterized in that, comprises the pre-amplification module, the amplification module that connect in turn and compares output module, wherein:
Described pre-amplification module, there is in-phase input end and inverting input, described in-phase input end is for accepting described triangular signal, described inverting input is for accepting described integrated signal, and described pre-amplification module is used for carrying out first order amplification to inputted triangular signal and integrated signal and exporting two paths of signals to described amplification module respectively;
Described amplification module, be connected with pre-amplification module with described, described amplification module possesses two intermediate nodes, described amplification module is used for carrying out multistage amplification respectively to the two paths of signals that described pre-amplification module inputs, and exports to respectively by described two intermediate nodes and describedly compare output module;
Describedly compare output module, be connected with described amplification module, the described output module that compares is for amplifying accepted two paths of signals and being converted into a road signal, and the described output module that compares possesses output for output pwm signal.
2. triangle wave device circuit as claimed in claim 1, it is characterized in that, described pre-amplification module comprises:
First metal-oxide-semiconductor, described first metal-oxide-semiconductor is PMOS, its grid as described in-phase input end, for inputting triangular signal;
Second metal-oxide-semiconductor, described second metal-oxide-semiconductor is PMOS, and its grid is as described inverting input, and for input integral signal, its source electrode is connected with the source electrode of described first metal-oxide-semiconductor;
3rd metal-oxide-semiconductor, described 3rd metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described first metal-oxide-semiconductor, its grid and drain electrode short circuit, and described 3rd metal-oxide-semiconductor is used for as the first mirror image metal-oxide-semiconductor;
4th metal-oxide-semiconductor, described 4th metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described second metal-oxide-semiconductor, its grid and drain electrode short circuit, and described 4th metal-oxide-semiconductor is used for as the second mirror image metal-oxide-semiconductor;
5th metal-oxide-semiconductor, described 5th metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with biased electrical pressure side, its drain electrode is connected with the source electrode of described first metal-oxide-semiconductor, and described 5th metal-oxide-semiconductor is used for providing direct current for described first metal-oxide-semiconductor and described second metal-oxide-semiconductor.
3. triangle wave device circuit as claimed in claim 2, it is characterized in that, described amplification module comprises:
6th metal-oxide-semiconductor, described 6th metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the grid of described 4th metal-oxide-semiconductor, and described 6th metal-oxide-semiconductor is used for forming current mirror with described 4th metal-oxide-semiconductor;
7th metal-oxide-semiconductor, described 7th metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the grid of described 3rd metal-oxide-semiconductor, and described 7th metal-oxide-semiconductor is used for forming current mirror with described 3rd metal-oxide-semiconductor;
8th metal-oxide-semiconductor, described 8th metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its drain electrode is connected with the drain electrode of described 6th metal-oxide-semiconductor, its grid and its drain electrode short circuit, and described 8th metal-oxide-semiconductor is used for as the 3rd mirror image metal-oxide-semiconductor;
9th metal-oxide-semiconductor, described 9th metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with the grid of described 8th metal-oxide-semiconductor, and its drain electrode is connected with the drain electrode of described 7th metal-oxide-semiconductor, and described 9th metal-oxide-semiconductor is used for forming current mirror with described 8th metal-oxide-semiconductor;
Tenth metal-oxide-semiconductor, described tenth metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the grid of described 4th metal-oxide-semiconductor, and described tenth metal-oxide-semiconductor is used for forming current mirror with described 4th metal-oxide-semiconductor;
11 metal-oxide-semiconductor, described 11 metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with the drain electrode of described 3rd metal-oxide-semiconductor, and the 11 metal-oxide-semiconductor is used for forming current mirror with described 3rd metal-oxide-semiconductor;
12 metal-oxide-semiconductor, described 12 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its drain electrode is connected with the drain electrode of described 11 metal-oxide-semiconductor, its grid and its drain electrode short circuit, and described 12 metal-oxide-semiconductor is as the 4th mirror image metal-oxide-semiconductor;
13 metal-oxide-semiconductor, described 13 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with the grid of described 12 metal-oxide-semiconductor, its drain electrode is connected with the drain electrode of the tenth metal-oxide-semiconductor, and described 13 metal-oxide-semiconductor and described 12 metal-oxide-semiconductor form current mirror;
First intermediate node, the tie point of the drain electrode of described 13 metal-oxide-semiconductor and the drain electrode of described tenth metal-oxide-semiconductor, as the first intermediate node, describedly compares output module for being exported to by signal;
Second intermediate node, the tie point of the drain electrode of described 9th metal-oxide-semiconductor and the drain electrode of described 7th metal-oxide-semiconductor, as described second intermediate node, describedly compares output module for being exported to by signal.
4. triangle wave device circuit as claimed in claim 3, it is characterized in that, the described output module that compares comprises:
14 metal-oxide-semiconductor, described 14 metal-oxide-semiconductor is PMOS, and its grid is connected with described first intermediate node;
15 metal-oxide-semiconductor, described 15 metal-oxide-semiconductor is PMOS, and its grid is connected with described second intermediate node, and its source electrode is connected with the source electrode of described 14 metal-oxide-semiconductor;
16 metal-oxide-semiconductor, described 16 metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described 14 metal-oxide-semiconductor, its grid and drain electrode short circuit, and described 16 metal-oxide-semiconductor is used for as the 5th mirror image metal-oxide-semiconductor;
17 metal-oxide-semiconductor, described 17 metal-oxide-semiconductor is NMOS tube, its source ground, and its drain electrode is connected with the drain electrode of described 15 metal-oxide-semiconductor, its grid is connected with the grid of described 16 metal-oxide-semiconductor, and described 17 metal-oxide-semiconductor and described 16 metal-oxide-semiconductor form current-mirror structure;
18 metal-oxide-semiconductor, described 18 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid connects biased electrical pressure side, its drain electrode is connected with the source electrode of described 15 metal-oxide-semiconductor, and described 18 metal-oxide-semiconductor is used for providing DC power supply to described 14 metal-oxide-semiconductor and described 15 metal-oxide-semiconductor;
3rd intermediate node, the drain electrode of described 15 metal-oxide-semiconductor and the tie point of described 17 metal-oxide-semiconductor, as described 3rd intermediate node, output signal for two-way prime amplifying signal being converted to a road;
19 metal-oxide-semiconductor, described 19 metal-oxide-semiconductor is PMOS, and its source electrode is connected with power supply, and its grid is connected with described 3rd intermediate node;
20 metal-oxide-semiconductor, described 20 metal-oxide-semiconductor is NMOS tube, its source ground, and its grid is connected with described 3rd intermediate node, and its drain electrode is connected with the drain electrode of described 19 metal-oxide-semiconductor;
Output, the drain electrode of described 19 metal-oxide-semiconductor and the drain junction of described 20 metal-oxide-semiconductor as described output, for exporting the pwm signal that described triangle wave device circuit exports.
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| CN201410854474.2A CN104579202A (en) | 2014-12-30 | 2014-12-30 | Triangular wave comparator circuit |
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