CN104505377A - Semiconductor encapsulation frame - Google Patents
Semiconductor encapsulation frame Download PDFInfo
- Publication number
- CN104505377A CN104505377A CN201410610332.1A CN201410610332A CN104505377A CN 104505377 A CN104505377 A CN 104505377A CN 201410610332 A CN201410610332 A CN 201410610332A CN 104505377 A CN104505377 A CN 104505377A
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- frame
- pin
- muscle
- communicated
- conduction rack
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Abstract
The invention relates to a semiconductor encapsulation frame. The semiconductor encapsulation frame comprises a first border and a second border that are opposite, pins arranged between the first border and the second border, connecting ribs connecting the first border with the second border and connected with and fixing the pins, and conductive frames connected with the pins. The connecting ribs and the pins and the pins are connected with each other, so that the electroplating of the pins can be conducted through the connecting ribs, then the pins and the connecting ribs are disconnected with each other, so that cut surfaces are formed. Secondary electroplating of the pins can be then conducted through the conductive frames, so that an electroplated layer is formed on each cut surface, and firmness can be improved in following welding process.
Description
Technical field
The present invention relates to field of semiconductor package, particularly relate to a kind of semiconductor packaging frame.
Background technology
In prior art, as SMD without pin package etc. in PQFN (Punch Quad Flat No-lead) four limit flat no-lead packages, PDFN (Punch Dual Flat No-lead) both sides flat no-lead packages, SON (Small-Outline No Lead) small-sized surface, encapsulation unit matrix arrangement is on lead frame, be connected together by the company's muscle on framework between encapsulation unit, product is excised by die-cut mode again and connects muscle and then make encapsulation unit independent after electroplating work procedure, and cut surface is exposed framework substrate surface.Be welded in the process of mainboard by packaging body, because cut surface is exposed, therefore cannot combining with solder (solder as containing tin), to make between packaging body with mainboard only to be undertaken welding by ground interconnected, welding fastness is poor.
Summary of the invention
Provide hereinafter about brief overview of the present invention, to provide about the basic comprehension in some of the present invention.Should be appreciated that this general introduction is not summarize about exhaustive of the present invention.It is not that intention determines key of the present invention or pith, and nor is it intended to limit the scope of the present invention.Its object is only provide some concept in simplified form, in this, as the preorder in greater detail discussed after a while.
The invention provides a kind of semiconductor packaging frame, comprising: the first frame positioned opposite to each other and the second frame; Pin, is arranged between described first frame and the second frame; Connect muscle, be communicated with described first frame and described second frame, and the described muscle that connects is communicated with and fixes corresponding described pin; Conduction rack, is communicated with corresponding described pin.
At least one beneficial effect of the present invention is, connect muscle to be communicated with pin, can electroplate pin by connecting muscle, then pin was cut off with being communicated with even between muscle, therefore there is cut surface, now can carry out second time plating by conduction rack to pin, thus also form electrodeposited coating on cut surface, thus in follow-up welding process, can strong degree be improved.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the structural representation of the first embodiment of semiconductor packaging frame of the present invention;
Fig. 2 is the structural representation of semiconductor packaging frame the second embodiment of the present invention.
Fig. 3 is the structural representation of the third embodiment of semiconductor packaging frame of the present invention.
Fig. 4 is the structural representation of semiconductor packaging frame of the present invention 4th kind of embodiment.
Reference numeral:
1-first frame; 2-second frame; 3-first connects muscle; 4-second connects muscle; 5-pin; 6-conduction rack.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.The element described in an accompanying drawing of the present invention or a kind of execution mode and feature can combine with the element shown in one or more other accompanying drawing or execution mode and feature.It should be noted that for purposes of clarity, accompanying drawing and eliminate expression and the description of unrelated to the invention, parts known to persons of ordinary skill in the art and process in illustrating.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under the prerequisite not paying creative work, all belongs to the scope of protection of the invention.
In the following embodiment of the present invention, the sequence number of embodiment and/or sequencing are only convenient to describe, and do not represent the quality of embodiment.The description of each embodiment is all emphasized particularly on different fields, in certain embodiment, there is no the part described in detail, can see the associated description of other embodiments.
The present invention relates to a kind of semiconductor packaging frame, see Fig. 1 to Fig. 4, comprise the first frame 1, second frame 2, pin 5, connect muscle and conduction rack 6, wherein, first frame 1 and the second frame 2 positioned opposite to each other, pin 5 is arranged between the first frame 1 and the second frame 2, be communicated with by connecting muscle and fix, this connects muscle and is communicated with at the first frame 1 and the second frame 2, to guarantee pin fixed position, and this connects muscle and is also communicated with corresponding pin, and to ensure in subsequent step, each pin can be plated; Above-mentioned conduction rack is communicated with corresponding described pin.Should be appreciated that, pin is communicated with described pin, to ensure that each pin can complete plating, plating here with above by connecting two electroplating processs when muscle is communicated with to pin the plating realized.
The above-mentioned muscle that connects is communicated with and fixes corresponding pin, and the company's of referring to muscle may have follows more, and pin also has multiple, such as, can determine which connects muscle and connects which pin according to conditions such as distributing positions.
Said structure is when applying, meeting chip, the mounting means of chip has multiple, can specifically describe below, and chip can be communicated with each pin, to realize the function of chip, after this, by connecting muscle to the connection of pin, pin is electroplated (can be called first time plating herein), just define electrodeposited coating in pin periphery like this, side face electrodeposited coating can be referred to as herein; After formation exempts from electrodeposited coating in week, need to connect muscle excision, cut surface just directly exposes, now conduction rack can be adopted, proceed plating (second time plating can be called herein), to make cut surface also form electrodeposited coating, tangent plane electrodeposited coating can be referred to as herein.
The following describes two kinds of optional modes when chip is installed:
The first, see Fig. 1 and Fig. 4, above-mentioned semiconductor packaging frame has base island 7, is arranged between the first frame 1 and the second frame 2, and this Ji Dao is used for accepting and chip.Chip is arranged on Gai Ji island, being then communicated with pin by chip by being communicated with line, being realized the communication of chip and other equipment by pin.
The second, chip can directly between upside-down mounting pin, and pin is directly communicated with chip, and in semiconductor package process, plastic packaging glue also can be used to encapsulate, and the chip therefore on upside-down mounting and pin can not come off, perishable.
In a kind of Alternate embodiments, have the packaging area for packaged chip between the first frame and the second frame, the company's of stating muscle is positioned at outside packaging area, and conduction rack part is positioned at described packaging area.Here need to be appreciated that in actual use, can be able to encapsulate after chip, then excise connecting muscle, therefore connecting muscle must be will be arranged on outside packaging area, can not excise to avoid packed.And conduction rack needs to connect the cut surface continuation plating after muscle to excision, its part is just arranged in packaging area, and another part is outside packaging area, because the part outside packaging area will be connected with the first frame or the second frame.If conduction rack is also outside packaging area, when in the end excising this conduction rack, from the pin that packaging area exposes, there will be again the cut surface not having electrodeposited coating.
Muscle and pin all have multiple, and each muscle that connects connects and fixes at least one pin.For company's muscle, there are two to be below described:
Optionally, the above-mentioned muscle that connects has two, and be respectively first and connect muscle and second even muscle, these two company's muscle are arranged opposite to each other between the first frame 1 and the second frame 2.Conveniently understand, can think that first frame 1, second frame 2, first company's muscle and second connects muscle and forms a quadra structure, certainly, square just a kind of example, other shapes go for the present invention equally.Need be appreciated that above-mentioned company connects muscle is exemplary explanation, and actual can have many even muscle.
Optional conduction rack is arranged at first and connects muscle and described second even between muscle.Like this, when excising two company's muscle, can not excise together by related conduction rack, ensure that the follow-up plating to tangent plane.
See Fig. 2 to Fig. 4, above-mentioned multiple pin 5, all can be communicated with same company on muscle, also can be communicated in any one respectively connect on muscle when having multiple muscle.These are determined according to real needs.Need be appreciated that the muscle (comprising the first muscle and the second muscle) mentioned and the first frame 1, second frame 2 are all conductors here.Connect muscle to be like this communicated with pin, object is can to the foreign-plated formation electrodeposited coating of pin 5.Be appreciated that because pin 5 tool can have multiple, connecting muscle needs to guarantee to be communicated with each pin 5, can be plated successfully to make each pin 5.
Meanwhile, semiconductor packaging frame also has conduction rack 6, and with the above-mentioned functional similarity connecting muscle, this conduction rack 6 is for carrying out second time plating to pin 5.
Optionally, connecting muscle and conduction rack, be all communicated with pin, and they are also communicated with the second frame 2 with the first frame 1, being energized can to when electroplating the first frame 1 and the second frame 2, by connecting muscle and the power supply of conduction rack realization to pin.
In the optional execution mode of one, to connect muscle, there are two, pin 5 has eight for example, first company's muscle 3 and second connects muscle 4 and is communicated with four pins 5 respectively, certainly, this is optional execution mode, pin 5 quantity, with the first muscle 3 still with being communicated with these and all can changing, as long as can ensure that namely realize twice plating can be used for the present invention of the second muscle 4.
Below with two kinds of situations, what conduction rack 6 and pin 5 were described is communicated with form:
Situation one, the quantity of conduction rack 6 is identical with the quantity of pin 5, a pin 5 is communicated on the first frame 1 or the second frame 2 by each conduction rack 6, namely conduction rack 6 is communicated with one to one with pin 5, such as can see four pins in left side in Fig. 2 and Fig. 3 and the annexation of conduction rack.Each pin 5 is independently when electroplating, even if one of them conduction rack 6 breaks down, other pin 5 still can continue plating.Certainly, also can not be communicated on the first frame 1, second frame 2, directly can power to conduction rack, realize the plating to pin.Such as, in Fig. 2, the conduction rack 6 on the left side and pin 5, a conduction rack is communicated with a pin exactly.
Situation two, the quantity of conduction rack 6 is less than the quantity of pin 5, and two or more pin is communicated on described first frame 1 or the second frame by least one conduction rack 6 possible, see the annexation of three pins lower on the right side of Fig. 2 or Fig. 3 and conduction rack.That is, in this case, may be that several pin shares a conduction rack 6, can manufacturing cost be saved like this, operating efficiency is provided.Such as, in Fig. 2 lower right corner, a conduction rack is communicated with three pins.
Should be noted that, first frame 1 and the second frame 2 also can play the effect of conduction, during plating, can by this individual frame energising between two, be communicated with conduction rack 6 because the first frame 1 and the second frame connect muscle 4 with first company's muscle 3, second simultaneously, therefore, enable them to complete first time plating and second time plating respectively.First time plating refers to, connect muscle, second by first and connect muscle and complete, to the plating of pin periphery, certainly, now pin is equally also communicated with the first frame or the second frame by conduction rack 6, and when first electroplates, conduction rack 6 also can participate in.Second time electroplating, after referring to plating successively, is connected muscle by pin and first even muscle, second and cuts off, electroplate, now realized by conduction rack cut surface.
Introduce the set-up mode that conduction rack shown by Fig. 2 with Fig. 3 is different below, in Fig. 2, the conduction rack in left side is communicated with four pins simultaneously, and conduction rack can be one, directly connection four pins, and also can be in the vertical direction be step-likely connects pin respectively; In Fig. 3, the conduction rack in left side is then at same plane, and they again horizontal direction can connect pin respectively in step-like.
Although last it is noted that described the present invention and advantage thereof in detail above, be to be understood that and can carry out various change when not exceeding the spirit and scope of the present invention limited by appended claim, substituting and converting.And scope of the present invention is not limited only to the specific embodiment of process, equipment, means, method and step described by specification.One of ordinary skilled in the art will readily appreciate that from disclosure of the present invention, can use perform the function substantially identical with corresponding embodiment described herein or obtain and its substantially identical result, existing and that will be developed in the future process, equipment, means, method or step according to the present invention.Therefore, appended claim is intended to comprise such process, equipment, means, method or step in their scope.
Claims (6)
1. a semiconductor packaging frame, is characterized in that, comprising:
First frame positioned opposite to each other and the second frame;
Pin, is arranged between described first frame and the second frame;
Connect muscle, be communicated with described first frame and described second frame, and the described muscle that connects is communicated with and fixes corresponding described pin;
Conduction rack, is communicated with corresponding described pin.
2. semiconductor packaging frame according to claim 1, is characterized in that,
Described semiconductor packaging frame also comprises Ji Dao, and be arranged between described first frame and described second frame, described Ji Dao is for accepting chip.
3. semiconductor packaging frame according to claim 1, is characterized in that,
Have the packaging area for packaged chip between described first frame and described second frame, the described muscle that connects is positioned at outside described packaging area, and described conduction rack part is positioned at described packaging area.
4. semiconductor packaging frame according to claim 3, is characterized in that,
Described muscle and described pin all have multiple, and each described muscle that connects connects and fixes pin described at least one.
5. semiconductor packaging frame according to claim 1, is characterized in that,
The quantity of described conduction rack is identical with the quantity of described pin, and a described pin is communicated on described first frame and/or the second frame by a described conduction rack.
6. semiconductor packaging frame according to claim 1, is characterized in that,
Two or more pin is communicated on described first frame and/or the second frame by a described conduction rack.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410610332.1A CN104505377A (en) | 2014-11-03 | 2014-11-03 | Semiconductor encapsulation frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410610332.1A CN104505377A (en) | 2014-11-03 | 2014-11-03 | Semiconductor encapsulation frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104505377A true CN104505377A (en) | 2015-04-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410610332.1A Pending CN104505377A (en) | 2014-11-03 | 2014-11-03 | Semiconductor encapsulation frame |
Country Status (1)
| Country | Link |
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| CN (1) | CN104505377A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202363455U (en) * | 2011-11-04 | 2012-08-01 | 无锡华润华晶微电子有限公司 | Lead frame and lead frame array used for packaging power IC and packaging structure |
| CN102891129A (en) * | 2012-08-30 | 2013-01-23 | 无锡永阳电子科技有限公司 | Pre-plastic-package lead frame and package process thereof |
| CN202749366U (en) * | 2012-08-01 | 2013-02-20 | 山东迪一电子科技有限公司 | Bridge type rectifier DF frame |
-
2014
- 2014-11-03 CN CN201410610332.1A patent/CN104505377A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202363455U (en) * | 2011-11-04 | 2012-08-01 | 无锡华润华晶微电子有限公司 | Lead frame and lead frame array used for packaging power IC and packaging structure |
| CN202749366U (en) * | 2012-08-01 | 2013-02-20 | 山东迪一电子科技有限公司 | Bridge type rectifier DF frame |
| CN102891129A (en) * | 2012-08-30 | 2013-01-23 | 无锡永阳电子科技有限公司 | Pre-plastic-package lead frame and package process thereof |
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| C06 | Publication | ||
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| CB02 | Change of applicant information |
Address after: 226006 Jiangsu Province, Nantong City Chongchuan District Chongchuan Road No. 288 Applicant after: Tongfu Microelectronics Co., Ltd. Address before: 226006 Jiangsu Province, Nantong City Chongchuan District Chongchuan Road No. 288 Applicant before: Fujitsu Microelectronics Co., Ltd., Nantong |
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| COR | Change of bibliographic data | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20150408 |
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| RJ01 | Rejection of invention patent application after publication |