CN104483796A - 一种阵列基板及其制备方法、显示面板及显示装置 - Google Patents

一种阵列基板及其制备方法、显示面板及显示装置 Download PDF

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CN104483796A
CN104483796A CN201510002273.4A CN201510002273A CN104483796A CN 104483796 A CN104483796 A CN 104483796A CN 201510002273 A CN201510002273 A CN 201510002273A CN 104483796 A CN104483796 A CN 104483796A
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voltage
array base
junction
base palte
data line
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乔赟
孙建
李成
安星俊
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to CN201510002273.4A priority Critical patent/CN104483796A/zh
Publication of CN104483796A publication Critical patent/CN104483796A/zh
Priority to EP15832875.7A priority patent/EP3242159A4/en
Priority to US14/906,350 priority patent/US9651838B2/en
Priority to PCT/CN2015/084210 priority patent/WO2016107140A1/zh
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
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    • H01—ELECTRIC ELEMENTS
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/76—Unipolar devices, e.g. field effect transistors
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    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G02F1/136245—Active matrix addressed cells having more than one switching element per pixel having complementary transistors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Abstract

本发明涉及一种阵列基板及其制备方法、显示面板及显示装置，所述阵列基板包括基底，以及设置在基底上的数据线、开关器件和电压补偿模块，所述开关器件连接在所述数据线与电压补偿模块之间，用以在所述数据线上的电压低于预设低电压或高于预设高电压时，将所述数据线与电压补偿模块导通；所述开关器件为PN结。所述阵列基板采用PN结作为数据线与电压补偿模块之间的开关器件，由于PN结的P端和N端之间的漏电流较小，从而可以降低阵列基板的功耗。

Description

一种阵列基板及其制备方法、显示面板及显示装置
技术领域
本发明涉及液晶显示技术领域，具体地，涉及一种阵列基板及其制备方法、显示面板及显示装置。
背景技术
在薄膜晶体管液晶显示器(TFT LCD)中，低温多晶硅(LTPS)技术可以实现高分辨率、反应速度快、高亮度和高开口率等；基于以上优点，LTPS技术成为TFT LCD的发展方向之一。LTPS技术较为复杂，使得采用LTPS技术的TFT LCD的产品良率较低。特别地，在采用LTPS技术的TFT LCD的生产和使用过程中，更容易产生静电，因此，采用LTPS技术的TFT LCD中一般设置ESD回路，用于提高抗静电释放(Electro-Static Discharge，以下简称为ESD)能力，以避免TFT LCD因ESD而损坏。
图1为现有采用LTPS技术的TFT LCD中的ESD回路的示意图。如图1所示，所述ESD回路包括第一、第二晶体管，第一晶体管的栅极G、漏极D与数据线DATA连接，源极S与阵列基板上的高电压端VDD连接，所述高电压端VDD上的电压为TFT LCD的显示面板正常工作的最高正电压VGH；第二晶体管的源极S与数据线DATA连接，栅极G、漏极D与低电压端VSS连接，所述低电压端VSS上的电压为TFT LCD的显示面板正常工作的最低负电压VGL。图2为图1所示TFT LCD的结构图。如图2所示，第一、第二晶体管的源极S、漏极D通过设置在阵列基板上的多晶硅连接，且该多晶硅的与源极S、漏极D连接的一端均进行N型高浓度掺杂，且该两端之间进行P型低浓度掺杂。
在上述TFT LCD中，由于第一晶体管的栅极G、漏极D和第二晶体管的栅极G、漏极D相连，其二者等效为单向导通的二极管。在静电产生，使数据线DATA上的电压高于VGH时，第一晶体管开启，使数据线DATA与高电压端VDD连接，从而使数据线DATA上的电压不高于VGH；在静电产生，使数据线DATA上的电压低于VGL时，第二晶体管开启，使数据线DATA与低电压端VSS连接，从而使数据线DATA上的电压不低于VGL。在数据线DATA上的电压处在VGH和VGL之间时，第一、第二晶体管关闭，从而使高电压端VDD、低电压端VSS不会影响数据线DATA上的电压。
在上述TFT LCD中，采用栅极G、漏极D连接的第一晶体管、第二晶体管等效单向导通的二极管，连接在数据线DATA与高电压端VDD、低电压端VSS之间，可以不增加阵列基板的制备工艺(第一晶体管、第二晶体管与每个像素单元内的薄膜晶体管同时制备)。但由于在多晶硅的两端均进行N型高浓度掺杂，会使第一、第二晶体管的源极S、漏极D之间具有较大的漏电流，这样会导致TFT LCD工作时的功耗较高。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一，提出了一种阵列基板及其制备方法、显示面板及显示装置，所述阵列基板、显示面板及显示装置的功耗较低。
为实现本发明的目的而提供一种阵列基板，所述阵列基板包括基底，以及设置在基底上的数据线、开关器件和电压补偿模块，所述开关器件连接在所述数据线与电压补偿模块之间，用以在所述数据线上的电压低于预设低电压或高于预设高电压时，将所述数据线与电压补偿模块导通；所述开关器件为PN结。
其中，所述电压补偿模块包括高电压端和低电压端，所述高电压端的电压为所述预设高电压，所述低电压端的电压为所述预设低电压。
其中，所述开关器件包括第一PN结和第二PN结，所述第一PN结的P端与数据线连接，N端与高电压端连接，所述第二PN结的P端与低电压端连接，N端与数据线连接。当数据线上的电压高于预设高电压时，第一PN结将数据线与高电压端导通；当数据线上的电压低于预设低电压时，第二PN结将数据线与低电压端导通。
其中，所述电压补偿模块至少包括高电压端，所述高电压端的电压为所述预设高电压；所述PN结的数量为一个，所述PN结的P端与数据线连接，N端与高电压端连接。当数据线上的电压高于预设高电压时，所述PN结将数据线与高电压端导通。
其中，所述电压补偿模块至少包括低电压端，所述低电压端的电压为所述预设低电压；所述PN结的数量为一个，所述PN结的P端与低电压端连接，N端与数据线连接。当数据线上的电压低于预设低电压时，所述PN结将数据线与低电压端导通。
其中，所述PN结的P端和N端通过在多晶硅或单晶硅的两端分别进行P型高浓度掺杂和N型高浓度掺杂制备。
其中，所述PN结的P端和N端之间具有间隔，所述间隔区域进行P型低浓度掺杂。
其中，所述阵列基板还包括制备在基底上的光阻挡层，所述光阻挡层设置在所述PN结的正下方。
其中，所述阵列基板包括有效显示区和环绕所述有效显示区的边框区，所述PN结和电压补偿模块设置在所述边框区。
其中，所述阵列基板上的每个像素单元内还设置有薄膜晶体管，所述PN结在制备所述薄膜晶体管的工艺过程中制备。
作为另一个技术方案，本发明还提供一种阵列基板的制备方法，用于制备本发明提供的上述阵列基板，所述阵列基板的制备方法包括：
在基底上制备数据线的步骤；
在基底上制备与数据线和电压补偿模块连接的PN结的步骤。
其中，制备所述PN结的步骤包括：
在基底上制备多晶硅或单晶硅层；
在多晶硅或单晶硅层的两端分别进行P型高浓度掺杂和N型高浓度掺杂。
其中，所述阵列基板的制备方法还包括在基底上制备薄膜晶体管的步骤；
所述PN结在制备所述薄膜晶体管的工艺过程中制备。
其中，还包括在制备所述PN结之前，在基底上制备光阻挡层的步骤。
作为另一个技术方案，本发明还提供一种显示面板，包括阵列基板和对盒基板，所述阵列基板采用本发明提供的上述阵列基板。
作为另一个技术方案，本发明还提供一种显示装置，包括显示面板，所述显示面板采用本发明提供的上述显示面板。
本发明具有以下有益效果：
本发明提供的阵列基板，其采用PN结作为连接在数据线与电压补偿模块之间的开关器件，与现有技术中栅极、漏极连接的薄膜晶体管结构相比，PN结的P端和N端之间的漏电流更小，从而使本发明提供的阵列基板的功耗更小。
本发明提供的阵列基板的制备方法，其在基底上制备与数据线和电压补偿模块连接的PN结作为开关器件，使开关器件中的漏电流更小，从而使本发明提供的阵列基板的制备方法所制备出的阵列基板的功耗更小。
本发明提供的显示面板，其采用本发明上述提供的上述阵列基板，可以降低功耗。
本发明提供的显示装置，其采用本发明提供的上述显示面板，可以降低功耗。
附图说明
附图是用来提供对本发明的进一步理解，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本发明，但并不构成对本发明的限制。在附图中：
图1为现有采用LTPS技术的TFT LCD中的ESD回路的示意图；
图2为图1所示TFT LCD的结构图；
图3为本发明提供的阵列基板的实施方式的结构示意图；
图4为图3所示阵列基板的ESD回路的电路图；
图5为图4所示ESD回路的第一种替代方式的电路图；
图6为图4所示ESD回路的第二种替代方式的电路图。
其中，附图标记：
1：阵列基板；10：基底；11：PN结；12：电压补偿模块；110：第一PN结；111：第二PN结；13：光阻挡层。
具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本发明，并不用于限制本发明。
请参看图3和图4，图3为本发明提供的阵列基板的实施方式的结构示意图，图4为图3所示阵列基板的ESD回路的电路图。在本实施方式中，阵列基板1包括基底10，以及设置在基底10上的数据线DATA、开关器件和电压补偿模块12，所述开关器件连接在数据线DATA与电压补偿模块12之间，用以在数据线DATA上的电压低于预设低电压或高于预设高电压时将数据线DATA与电压补偿模块12导通；所述开关器件为PN结11。具体地，所述预设高电压可以为阵列基板1最高工作正电压VGH，即阵列基板1正常工作所允许的最高正电压，所述预设低电压可以为阵列基板1最低工作负电压VGL，即阵列基板1正常工作所允许的最低负电压；当然，所述预设高电压也可以设置为一个小于最高工作正电压VGH的电压值，所述预设低电压也可以设置为一个大于最低工作负电压VGL的电压值。
在本实施方式中，当阵列基板1上产生静电，导致数据线DATA上的电压高于预设高电压或低于预设低电压时，电压补偿模块12通过导通的PN结与数据线DATA电连接，可以使数据线DATA上的电压不高于预设高电压，或不低于预设低电压，或者使数据线DATA上的电压既不高于预设高电压，也不低于预设低电压，从而使数据线DATA上的电压处在或尽可能处在正常的工作范围之内，避免由于静电释放导致阵列基板1及应用所述阵列基板1的显示面板和显示装置损坏。同时，与现有技术中的两个N型高浓度掺杂的端部相比，PN结的P端和N端之间的漏电流更小，这样可以使阵列基板1，以及采用阵列基板1的显示面板和显示装置的功耗较低。
具体地，如图3和图4所示，所述电压补偿模块12包括高电压端VDD和低电压端VSS，所述高电压端VDD上的电压等于所述预设高电压，所述低电压端VSS上的电压等于所述预设低电压。所述PN结11包括第一PN结110和第二PN结111，所述第一PN结110的P端与数据线DATA连接，N端与高电压端VDD连接，从而使数据线DATA上的电压高于预设高电压时，第一PN结110可以导通，将数据线DATA与高电压端VDD电连接；所述第二PN结111的P端与低电压端VSS连接，N端与数据线DATA连接，从而使数据线DATA上的电压低于预设低电压时，第二PN结111可以导通，将数据线DATA与低电压端VSS电连接。
作为一种替代实施例，如图5所示，所述电压补偿模块12可以至少包括高电压端VDD(可以包括低电压端VSS，也可以不包括低电压端VSS)；与上述实施例相同，高电压端VDD的电压同样为所述预设高电压；在此情况下，PN结11的数量为一个，所述PN结11的P端与数据线DATA连接，N端与高电压端VDD连接。在本实施例中，当数据线DATA上的电压高于预设高电压时，PN结11可以导通，将数据线DATA与高电压端VDD电连接。
作为另一种替代实施例，如图6所示，所述电压补偿模块12可以至少包括低电压端VSS(可以包括高电压端VDD，也可以不包括高电压端VDD)；与上述实施例相同，低电压端VSS的电压同样为所述预设低电压；在此情况下，PN结11的数量为一个，所述PN结11的P端与低电压端VSS连接，N端与数据线DATA连接。在本实施例中，当数据线DATA上的电压低于预设低电压时，PN结11可以导通，将数据线DATA与低电压端VSS电连接。
具体地，所述PN结11的P端(图3中的P+区域)和N端(图3中的N+区域)通过在多晶硅或单晶硅的两端分别进行P型高浓度掺杂和N型高浓度掺杂制备。进一步地，所述PN结11的P端和N端之间具有间隔(图3中的P－区域)，所述间隔区域进行P型低浓度掺杂。
优选地，所述阵列基板1还包括制备在基底10上的光阻挡层13，所述光阻挡层13设置在所述PN结11的正下方。这样设置可以避免背光源发出的光线照射至PN结11上，在PN结11的P端和N端产生光生漏电流。
阵列基板1包括有效显示区和环绕所述有效显示区的边框区，一般地，所述静电产生在所述边框区，因此，在本实施方式中，所述PN结11和电压补偿模块12设置在所述边框区。
阵列基板1上的每个像素单元内还设置有薄膜晶体管，所述PN结11在制备所述薄膜晶体管的工艺过程中制备；这样设置可以不增加制备阵列基板1的工艺流程，从而不增加阵列基板1的生产时间和生产成本。
综上所述，本发明实施方式提供的阵列基板1，其采用PN结11作为连接在数据线DATA与电压补偿模块12之间的开关器件，与现有技术中栅极、漏极连接的薄膜晶体管结构相比，PN结11的P端和N端之间的漏电流更小，从而使本实施方式提供的阵列基板1的功耗更小。
作为另一个技术方案，本发明实施方式还提供一种阵列基板的制备方法，用于制备本发明上述实施方式所提供的阵列基板，所述阵列基板的制备方法包括：
在基底上制备数据线的步骤；
在基底上制备与数据线和电压补偿模块连接的PN结的步骤。
制备所述PN结的步骤可以包括：
在基底上制备多晶硅或单晶硅层；
在多晶硅或单晶硅层的两端分别进行P型高浓度掺杂和N型高浓度掺杂。具体地，所述多晶硅或单晶硅层的两端之间的区域可以进行P型低浓度掺杂。
在本实施方式中，所述阵列基板的制备方法还包括在基底上制备薄膜晶体管的步骤；所述PN结在制备所述薄膜晶体管的工艺过程中制备；这样可以不增加阵列基板的制备工艺，从而不会增加阵列基板的生产成本和生产时间。
优选地，所述阵列基板的制备方法还包括在制备所述PN结之前，在基底上制备光阻挡层的步骤；这样设置可以避免背光源发出的光线照射至PN结上，在PN结的P端和N端产生光生漏电流。
本发明实施方式提供的阵列基板的制备方法，其在基底上制备与数据线和电压补偿模块连接的PN结作为开关器件，使开关器件中的漏电流更小，从而使本发明提供的阵列基板的制备方法所制备出的阵列基板的功耗更小。
作为另一个技术方案，本发明还提供一种显示面板的实施方式，在本实施方式中，显示面板包括阵列基板和对盒基板，所述阵列基板采用本发明上述实施方式提供的阵列基板。
本实施方式提供的显示面板，其采用本发明上述实施方式提供的阵列基板，可以降低功耗。
作为另一个技术方案，本发明还提供一种显示装置的实施方式，在本实施方式中，显示装置包括显示面板，且所述显示面板采用本发明上述实施方式提供的显示面板。
本实施方式提供的显示装置，其采用本发明上述实施方式提供的显示面板，可以降低功耗。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (16)

1.一种阵列基板，包括基底，以及设置在基底上的数据线、开关器件和电压补偿模块，所述开关器件连接在所述数据线与电压补偿模块之间，用以在所述数据线上的电压低于预设低电压或高于预设高电压时，将所述数据线与电压补偿模块导通；其特征在于，所述开关器件为PN结。
2.根据权利要求1所述的阵列基板，其特征在于，所述电压补偿模块包括高电压端和低电压端，所述高电压端的电压为所述预设高电压，所述低电压端的电压为所述预设低电压。
3.根据权利要求2所述的阵列基板，其特征在于，所述开关器件包括第一PN结和第二PN结，所述第一PN结的P端与数据线连接，N端与高电压端连接，所述第二PN结的P端与低电压端连接，N端与数据线连接。
4.根据权利要求1所述的阵列基板，其特征在于，所述电压补偿模块至少包括高电压端，所述高电压端的电压为所述预设高电压；
所述PN结的数量为一个，所述PN结的P端与数据线连接，N端与高电压端连接。
5.根据权利要求1所述的阵列基板，其特征在于，所述电压补偿模块至少包括低电压端，所述低电压端的电压为所述预设低电压；
所述PN结的数量为一个，所述PN结的P端与低电压端连接，N端与数据线连接。
6.根据权利要求1～5任意一项所述的阵列基板，其特征在于，所述PN结的P端和N端通过在多晶硅或单晶硅的两端分别进行P型高浓度掺杂和N型高浓度掺杂制备。
7.根据权利要求6所述的阵列基板，其特征在于，所述PN结的P端和N端之间具有间隔，所述间隔区域进行P型低浓度掺杂。
8.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板还包括制备在基底上的光阻挡层，所述光阻挡层设置在所述PN结的正下方。
9.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板包括有效显示区和环绕所述有效显示区的边框区，所述PN结和电压补偿模块设置在所述边框区。
10.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板上的每个像素单元内还设置有薄膜晶体管，所述PN结在制备所述薄膜晶体管的过程中形成。
11.一种阵列基板的制备方法，用于制备权利要求1～10任意一项所述的阵列基板，其特征在于，所述阵列基板的制备方法包括：
在基底上制备数据线的步骤；
在基底上制备与数据线和电压补偿模块连接的PN结的步骤。
12.根据权利要求11所述的阵列基板的制备方法，其特征在于，制备所述PN结的步骤包括：
在基底上制备多晶硅或单晶硅层；
在多晶硅或单晶硅层的两端分别进行P型高浓度掺杂和N型高浓度掺杂。
13.根据权利要求11所述的阵列基板的制备方法，其特征在于，所述阵列基板的制备方法还包括在基底上制备薄膜晶体管的步骤；
所述PN结在制备所述薄膜晶体管的工艺过程中制备。
14.根据权利要求11所述的阵列基板的制备方法，其特征在于，还包括在制备所述PN结之前，在基底上制备光阻挡层的步骤。
15.一种显示面板，包括阵列基板和对盒基板，其特征在于，所述阵列基板采用权利要求1～10任意一项所述的阵列基板。
16.一种显示装置，包括显示面板，其特征在于，所述显示面板采用权利要求15所述的显示面板。
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