CN104465547B - 高频天线信号反射的封装结构及制造方法 - Google Patents

高频天线信号反射的封装结构及制造方法 Download PDF

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CN104465547B
CN104465547B CN201410754216.7A CN201410754216A CN104465547B CN 104465547 B CN104465547 B CN 104465547B CN 201410754216 A CN201410754216 A CN 201410754216A CN 104465547 B CN104465547 B CN 104465547B
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何洪文
孙鹏
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National Center for Advanced Packaging Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6661High-frequency adaptations for passive devices
    • H01L2223/6677High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Abstract

本发明涉及一种高频天线信号反射的封装结构及制造方法,包括PCB系统板和封装体,封装体包括塑封料和芯片,在塑封料的背面布置线路层和天线,在线路层上设置焊球,封装体通过焊球与PCB系统板连接;其特征是:在所述天线的周围设置焊接层,在焊接层上连接反射装置,反射装置为一个罩体,将天线罩设住。所述封装结构的制造方法,包括以下步骤:在临时键合片表面涂覆膜材料或胶,将芯片放置在膜材料或胶上,采用塑封料将芯片进行塑封,去除临时键合片;在塑封料的背面制造线路层、天线和焊接层,在线路层上制作焊球;将反射装置扣在天线正下方;将封装体贴装在PCB系统板上。本发明降低了信号的损耗和串扰问题,解决了占用PCB系统板面积的问题。

Description

高频天线信号反射的封装结构及制造方法
技术领域
本发明涉及一种对天线信号反射的封装结构,尤其是一种高频天线信号反射的封装结构及制造方法。
背景技术
随着电子技术的高速发展,毫米波市场异常活跃,如60GHz应用的近场通讯和无线个人网络,77GHz的自适应巡航控制雷达以及94GHz的高分辨率的无线电成像。但是,在高频波段(如:毫米波频率段),一些寄生效应如阻抗失配、信号反射、串扰、损耗以及辐射等是不能忽略的。传统应用的射频模块产生的辐射信号较容易被耦合到PCB系统板的信号路径上,产生射频噪声,对PCB系统板上的电路产生干扰,从而影响产品的性能和可靠性。
为解决射频模块芯片和PCB系统板之间信号干扰问题的一个有效途径就是在PCB板上特定区域安装金属屏蔽(兼具信号反射功能),然而该方法使原本有限的PCB布线区域变得更加拥挤,制造工艺复杂,提高成本。另外,该方法也会增大信号的分布电容,使传输线阻抗增大,信号沿变缓,产生的寄生电学效应也不可避免。
发明内容
本发明的目的是克服现有技术中存在的不足,提供一种高频天线信号反射的封装结构及制造方法,极大的降低了信号的损耗和串扰问题,而且解决了占用PCB系统板面积的问题,有利于实现器件和系统小型化。
按照本发明提供的技术方案,所述高频天线信号反射的封装结构,包括PCB系统板和封装体,封装体包括塑封料,在塑封料中塑封芯片,在塑封料的背面布置线路层和天线,在线路层上设置焊球,封装体通过焊球与PCB系统板连接;其特征是:在所述天线的周围设置焊接层,在焊接层上连接反射装置,反射装置为一个罩体,将天线罩设住。
所述反射装置的高度小于等于焊球的高度。
所述芯片的一表面与塑料的背面平齐。
所述高频天线信号反射的封装结构的制造方法,其特征是,包括以下步骤:
第一步,在临时键合片表面涂覆膜材料或胶,得到胶层或膜层;
第二步,将芯片放置在胶层或膜层上面,实现连接;
第三步,采用塑封料将芯片进行塑封;
第四步,去除掉临时键合片以及胶层或膜层;
第五步,在塑封料的背面制造线路层和天线,制作线路层时,在天线的周围预留一圈焊接层;
第六步,在线路层上植球,得到焊球;
第七步,将反射装置扣在封装体的天线正下方,反射装置通过焊接层焊接固定在塑封料表面;
第八步,将第七步得到的整个封装体贴装在PCB系统板上。
所述线路层、天线的材料均为铜,厚度为5~25微米。
所述焊接层的材质与线路层相同,与线路层不进行电学导通。
所述反射装置的材质为铝、铜、铜镀镍或不锈钢。
本发明所述高频天线信号反射的封装结构及制造方法,摒弃传统的在PBC板上进行反射系统的安装,将反射系统直接键合在封装体的下方,高频天线的信号经过此反射结构进行反射,极大的降低了信号的损耗和串扰问题,而且解决了占用PCB系统板面积的问题,有利于实现器件和系统小型化。
附图说明
图1为在临时键合片表面涂覆膜材料或胶的示意图。
图2为将芯片连接在胶层或膜层上的示意图。
图3为将芯片塑封在塑封料中的示意图。
图4为去除临时键合片的示意图。
图5为制作线路层和焊接层的示意图。
图6为制作天线的示意图。
图7为制作焊球的示意图。
图8为焊接反射装置的示意图。
图9为将封装体贴装在PCB系统板上的示意图。
图中序号:PCB系统板1、封装体2、塑封料3、芯片4、天线5、线路层6、焊球7、反射装置8、临时键合片9、胶层或膜层10、焊接层11。
具体实施方式
下面结合具体附图对本发明作进一步说明。
如图9所示:所述高频天线信号反射的封装结构包括PCB系统板1和封装体2,封装体2包括塑封料3,在塑封料3中塑封芯片4,芯片4的一表面与塑料3的背面平齐;在所述塑封料3的背面布置线路层6和天线5,在线路层6上设置焊球7,封装体2通过焊球7与PCB系统板1连接;在所述天线5的周围设置焊接层11,在焊接层11上连接反射装置8,反射装置8为一个罩体,将天线5罩设住;
所述反射装置8的高度小于等于焊球7的高度。
所述高频天线信号反射的封装结构的制造方法,包括以下步骤:
第一步,如图1所示,在临时键合片9表面涂覆膜材料或胶,得到胶层或膜层10;所述膜材料或胶为临时键合粘接剂,可选材料为杜邦HD3007、Brewer Science(布鲁尔科技)的Zone Bond材料;
第二步,如图2所示,将芯片4放置在胶层或膜层10上面,实现连接;
第三步,如图3所示,采用塑封料3将芯片4进行塑封;
第四步,如图4所示,去除掉临时键合片9以及胶层或膜层10;
第五步,如图5、图6所示,在塑封料的背面制造线路层6和天线5,具体工艺采用现有的光刻胶曝光显影和电镀技术;所述线路层6、天线5的材料均为铜,厚度为5~25微米;制作线路层6时,在天线5的周围预留一圈焊接层11,焊接层11的材质与线路层6相同,与线路层6不进行电学导通;
第六步,如图7所示,在线路层6上植球,得到焊球7;
第七步,如图8所示,将反射装置8扣在封装体的天线5正下方,阻断信号向下传送的路径,同时,通过反射原理,实现信号的定向传送(正上方);所述反射装置8通过焊接层11焊接固定在塑封料3表面,反射装置8可以采用铝、铜、铜镀镍、不锈钢等;
第八步,如图9所示,将第七步得到的整个封装体贴装在PCB系统板1上,从而完成系统互连。

Claims (4)

1.一种高频天线信号反射的封装结构的制造方法,其特征是,包括以下步骤:
第一步,在临时键合片(9)表面涂覆膜材料或胶,得到胶层或膜层(10);
第二步,将芯片(4)放置在胶层或膜层(10)上面,实现连接;
第三步,采用塑封料(3)将芯片(4)进行塑封;
第四步,去除掉临时键合片(9)以及胶层或膜层(10);
第五步,在塑封料的背面制造线路层(6)和天线(5),制作线路层(6)时,在天线(5)的周围预留一圈焊接层(11);
第六步,在线路层(6)上植球,得到焊球(7);
第七步,将反射装置(8)扣在封装体的天线(5)正下方,反射装置(8)通过焊接层(11)焊接固定在塑封料(3)表面;
第八步,将第七步得到的整个封装体贴装在PCB系统板(1)上。
2.如权利要求1所述的高频天线信号反射的封装结构的制造方法,其特征是:所述线路层(6)、天线(5)的材料均为铜,厚度为5~25微米。
3.如权利要求1所述的高频天线信号反射的封装结构的制造方法,其特征是:所述焊接层(11)的材质与线路层(6)相同,与线路层(6)不进行电学导通。
4.如权利要求1所述的高频天线信号反射的封装结构的制造方法,其特征是:所述反射装置(8)的材质为铝、铜、铜镀镍或不锈钢。
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