CN104183625A - 补偿器件 - Google Patents
补偿器件 Download PDFInfo
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- CN104183625A CN104183625A CN201410299098.5A CN201410299098A CN104183625A CN 104183625 A CN104183625 A CN 104183625A CN 201410299098 A CN201410299098 A CN 201410299098A CN 104183625 A CN104183625 A CN 104183625A
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- dopant
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- 239000002019 doping agent Substances 0.000 claims abstract description 106
- 238000004519 manufacturing process Methods 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 40
- 238000009792 diffusion process Methods 0.000 claims abstract description 20
- 238000010438 heat treatment Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims description 68
- 238000000151 deposition Methods 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 11
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 10
- 229910052796 boron Inorganic materials 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 10
- 229910052785 arsenic Inorganic materials 0.000 claims description 9
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052787 antimony Inorganic materials 0.000 claims description 4
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 235000012431 wafers Nutrition 0.000 description 21
- 239000007789 gas Substances 0.000 description 7
- 230000000903 blocking effect Effects 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 230000009471 action Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 230000003139 buffering effect Effects 0.000 description 4
- 239000002800 charge carrier Substances 0.000 description 4
- 238000004088 simulation Methods 0.000 description 4
- 238000010790 dilution Methods 0.000 description 3
- 239000012895 dilution Substances 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 239000002243 precursor Substances 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000013213 extrapolation Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000007781 pre-processing Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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Abstract
本发明提供了涉及制造补偿器件的方法、装置和设备。一些情况下,用于校准目的沉积n/p共掺杂层以将净掺杂浓度最小化。在其它情况下,然后交替地沉积n和p掺杂层。在其它实施例中,将n/p共掺杂层沉积在其中n和p掺杂剂具有不同扩散性能的沟槽中。为了获得不同的掺杂轮廓,可执行热处理。
Description
技术领域
本申请涉及补偿器件并且涉及可用于制造这种补偿器件的方法和装置。
背景技术
已经越来越多地研究诸如使用补偿区的金属氧化物半导体场效应晶体管的补偿器件来作为用于功率应用的器件。在这种器件中,例如,使用交替的垂直p和n掺杂半导体区,一方面当该器件导电时其应被高度掺杂以提供低电阻,并且另一方面其应尽可能精确地彼此补偿以确保良好阻断能力,例如,在达到额定阻断电压之前,当器件非导电时,避免甚至在较高电压下比如雪崩击穿的器件的击穿。这种情况下补偿基本上意味着总的有效n掺杂应当尽可能精确地与有效的总的p掺杂(诸如与n掺杂相邻的有效的总的p掺杂)对应。
为此,按照惯例,在沉积n和p掺杂层之前已经分开地校准(calibrate)用于n和p掺杂每一个的源。然而,对于一些应用,以这种方式获得的补偿精确度可能不足以获得所需的阻断性能(behavior),例如高达600V或更多的电压。
附图说明
图1示出了根据实施例的装置的示意性框图;
图2示出了说明根据实施例的方法的流程图;
图3示出了说明根据实施例的方法的流程图;
图4示出了根据实施例制造的器件;
图5示出了用于说明在一些实施例中采用的技术的测量结果;
图6示出了说明根据实施例的方法的流程图;
图7是说明在制造过程的不同阶段中的根据实施例的器件的示意图;
图8是示出在制造过程的不同阶段中的根据另一实施例的器件的示意图;
图9示出了在热处理之前和之后的掺杂轮廓;和
图10示出了用于校准的示例。
下面,将参考附图详细地描述实施例。这些实施例仅用作示例且不被解释为限制本申请的范围。例如,虽然实施例可能描述为具有多个特征,但是其它实施例可包括更少特征和/或替换特征。此外,除非另外明确说明,来自不同实施例的特征可彼此组合。
具体实施方式
各种实施例涉及补偿器件的制造并且涉及对应的补偿器件。如已经在背景技术中解释的补偿器件通常被理解为其中将n掺杂和p掺杂区提供在衬底(例如半导体衬底)上的器件,n掺杂的量基本与p掺杂的量匹配。由于对于从目标值的技术系统波动和偏差是常见的或者甚至有时是不可避免的,所以可将补偿器件定义为其中半导体器件中受体(acceptor)电荷密度与半导体器件中的施主(donor)电荷密度的差的绝对值低于预定义极限的器件。例如,对于具有某阻断能力的半导体器件,此绝对值的上限可以是1.4×1014/cm3或者高达2×1014/cm3。对于更高的阻断电压,此绝对值降低。因此,预定义极限可以依赖于器件需要。
在图1中,示出了根据实施例的装置的框图。应当注意到,虽然图1的装置被示为具有多个部件,但是图1的描述并不暗示着部件之间任何特定空间关系。一些部件甚至可以被彼此远离定位,并且例如,要被处理的衬底也可在较大的距离上在部件之间转移。
将图1的装置配置为处理衬底,作为用于补偿器件的制造过程的一部分。另外,在一些实施例中,图1的装置也可在常规制造过程中被用来制造除了补偿器件之外的其它器件。在此情况下,控制器14(例如,比如计算机的基于微处理器的控制)可被用来控制该装置并且例如将该装置从制造补偿器件切换到制造其它器件。
此外,如下面将详细地解释的图1的装置可以以校准模式并以生产模式来操作。
在校准模式中,用于校准目的的衬底被供应到外延装置11。该衬底可以是例如仅用于校准目的的未处理衬底,或者也可以是例如在稍后更详细地描述的预处理设备10中预处理的预处理衬底,以使得用于校准目的的衬底类似(resemble)稍后供应至生产模式中的外延装置11的衬底。
外延装置11例如可以是化学气相沉积(CVD)装置,比如LPCVD(低压化学气相沉积)、APCVD(常压化学气相沉积)、MOCVD(金属有机化学气相沉积)、或者PECVD(等离子体增强化学气相沉积)装置。由于这些沉积技术本身是常规技术,因此本文将不对其进一步描述。在其它实施例中也可以使用其它外延技术,比如MBE(分子束外延)。
外延装置11具有n掺杂剂源12和与其相关联的p掺杂剂源13。例如,在CVD装置的情况下,用于n掺杂的对应的前体气体(precursor gas)可由n掺杂剂源12供应,以及用于p掺杂的对应前体气体可由p掺杂剂源13供应。例如,对于诸如其中将硅晶片用作衬底的硅基工艺,典型的n掺杂剂可包括磷(P)、砷(As)或者锑(Sb),并且典型的p掺杂剂可包括例如硼(B)或铝(Al)。
对于校准,在一些实施例中,控制14可控制n掺杂剂源12和p掺杂剂源13以及外延装置11,以沉积名义上(例如,根据上次校准)相同量的n和p掺杂两者的外延层,以制造补偿层。然后例如通过测量由此沉积的校准层的表面电阻来在掺杂剂浓度测量设备15中测量总的掺杂剂浓度。在净掺杂低于预定阈值的情况下,完成校准。在主要n掺杂剂的情况下,对于例如使用诸如新的衬底的下一校准层,降低n掺杂剂浓度和/或增加p掺杂剂浓度。同样地,如果证明校准层具有净p掺杂,则可降低p掺杂剂浓度和/或可增加n掺杂剂浓度。换句话说,相对于彼此调整掺杂剂量以改善补偿。重复这个过程直到完成校准过程,即,净掺杂(n掺杂和p掺杂之间的差)低于预定阈值。预定阈值可以是例如低于2×1014/cm3、低于1.5×1014/cm3或低于1×1014/cm3,然而也可以使用其它值。例如可根据稍后将制造的补偿器件的需要来选择所使用的阈值。
在其它实施例中,因为校准控制14可控制n掺杂剂源12和p掺杂剂源13以及外延装置11,以在n和p两者掺杂的一系列晶片上沉积外延层,所以掺杂剂浓度(n或p)中的一种比另一掺杂剂浓度(p或n)更高,并且掺杂剂浓度(p或n)中的至少一个在该系列中逐个晶片地变化。对于每个晶片,测量净掺杂剂浓度,并且根据测量结果,可以例如通过线性外推法来外推用以获得补偿掺杂(即在预定义阈值之下的净掺杂)的比如掺杂剂气流的参数。图10中示出了用于这种测量结果的示例。在此简单示例中,以50sccm(每分钟标准立方厘米)的流速将n掺杂剂气体以及某预选的,比如例如氢的载气中的稀释物供应至CVD反应器。对于三种不同的测试晶片,在例如可以与n掺杂剂气体的稀释物相同或者不同的某预选的稀释物下,以43sccm、41sccm和39sccm的流速供应p掺杂剂气体,使得对于该示例中所有的测试晶片,所得到的p掺杂比n掺杂更高。对于所有三个晶片的净掺杂浓度被测量为1.4×1014/cm3、1.1×1014/cm3和0.8×1014/cm3下的净p掺杂浓度。在图10中,绘制所测量的掺杂对比p掺杂剂气流。对所测量点拟合的线100表示外推法,并且其中线18与水平(流速)轴线交叉的点表示用于补偿的p掺杂剂气体的气流,在本示例中为33.67sccm。
应当注意,上面的数字值仅用于说明目的。此外,可使用多于三个晶片或者仅两个晶片。在其它实施例中,对于校准,可使用比p掺杂浓度更高的n掺杂浓度。在又一些实施例中,对于一些晶片,可使用更高的n掺杂浓度,并且对于其它晶片,可使用更高p掺杂浓度。例如,如在图10的示例中,可在其中n路径的传导性对于被制造器件来说是重要的情况下使用固定的n掺杂浓度。
在完成校准之后,图1的装置可用于制造补偿器件。特别地,通过经由测量掺杂n掺杂剂和p掺杂剂两者的共掺杂层来校准n掺杂剂和p掺杂剂的量,可获得与补偿相关的相对高的进动(precession)。为了制造补偿器件,可在预处理设备10中预处理衬底,比如硅晶片、其它半导体晶片或者其它衬底。例如,如稍后将更详细地解释的,沟槽可被蚀刻到衬底中。例如,也可执行其它常规预处理,比如构造、掺杂等,用于制造补偿器件的其它部分和/或用于在相同衬底上制造补偿器件之外的其它器件。为了制造补偿器件,在一些实施例中,至少一个n掺杂层和至少一个p掺杂层可交替地沉积在器件中,基于上述校准,n掺杂的量与p掺杂的量对应。在一些实施例中,当多于一个n掺杂层和多于一个p掺杂层被沉积在沟槽中时,可以执行中间蚀刻以从器件底部去除外延层中的全部或者一些,使得例如每个n掺杂层和/或每个p掺杂层接触沟槽底部且因此接触衬底。在一些实施例中,可沉积第一n掺杂层和然后的p掺杂层,并且可以仅去除在沟槽底部的p掺杂层。在其它实施例中,该顺序可以反过来。对于n和p掺杂层的这种交替沉积,可使用用于供应n掺杂剂和p掺杂剂的校准中获得的参数,导致良好的补偿。在其它实施例中,可通过在平面衬底(例如半导体表面)上沉积所需数目的n和p掺杂层来制造横向器件。随后,可制造相应单元的区域中用于源极、漏极和本体的接触区域和漏极接触。
在其它实施例中,可使用在校准期间获得的参数来在此沟槽中沉积n/p共掺杂层,并且可执行随后的加热。在一些实施例中,n掺杂剂和p掺杂剂具有不同的扩散系数,导致不同的n掺杂剂和p掺杂剂轮廓(profile),并因此导致n掺杂和p掺杂区。稍后将描述对于这些可能性的说明性示例。在已经执行了外延之后,如由箭头16所指示的,可进一步处理衬底从而以常规方式完成器件。例如,可在衬底上提供电接触。
在图2中,示出了说明根据实施例的方法的流程图。虽然将稍后描述的方法以及其它方法描述为一系列动作或事件,但是,示出的动作或事件的顺序不被解释为限制性的,因为在其它实施例中,可以按不同顺序、彼此同时地或者与其它动作或事件同时地执行动作或事件。此外,其它实施例可包括比图中示出的以及下面描述的更少的动作或事件。
图2的方法例如可在图1的装置中实施,并且将参考图1的先前描述来被描述。然而,应当理解的是,其它装置也可用来实施图2的方法。
在20处,校准层被沉积在n/p共掺杂的衬底上,即,有意识地将n掺杂剂和p掺杂剂两者并入在校准层中。
通常,应当注意到,在本申请上下文中,除非另外说明,“掺杂”指的是使用掺杂剂源的层的有意识的掺杂并且不是由于不注意地并入在层中的杂质所引起的背景掺杂。如本领域技术人员理解的,某些量的背景掺杂事实上总是存在的。执行n/p共掺杂以便例如,基于掺杂剂源的名义上的规格(specification)或基于先前校准而得到的层名义上是未掺杂的。
在21处,测量实际掺杂剂浓度并调整n和p掺杂剂源以将净掺杂(即总的掺杂)最小化。这实质上对应于已经参考图1描述的校准,但是,也可在除了图1中所示的装置之外其它装置中采用。
在22处,基于调整来制造补偿器件。稍后将参考图3和6来描述用于制造这种补偿器件的方法。然而,22处的制造不限于图3和6的方法,并且也可基于该调整(即n和p源的上述调整)来制造其它补偿器件。
应当注意,当必要时可以重复校准,例如,在已经处理了用于制造补偿器件的一定量的衬底之后,在一定时间之后,或者例如,基于对被制造的补偿器件的测试。
在图3中,示出了基于图2的22的调整的用于制造补偿器件的方法的示例。图3的方法可在图1的装置中实施,但是,也可使用其它设备、技术和装置来实施。
在30处,例如通过在衬底中蚀刻沟槽来在衬底中提供沟槽。该衬底例如可以是半导体晶片比如硅晶片。
在31处,在沟槽中交替地沉积一个或多个n掺杂层和一个或多个p掺杂层。在多于一个n掺杂层和多于一个p掺杂层的情况下,可以执行中间蚀刻,例如以确保衬底与n掺杂层之间、衬底与p掺杂层之间或者衬底与两种类型的层之间的接触。
图4中,示出了例如可使用图3的方法制造的对应器件的示意图。在衬底40,例如硅晶片、其它半导体晶片或者另外其它类型的衬底中,例如经由蚀刻提供沟槽41。在沟槽中,例如通过使用掩模来限制到沟槽的沉积,诸如,使用如上所述的校准来沉积n型外延层42其次是p型外延层43,使得假定层厚度是相同的,则n型掺杂的量对应于p型掺杂的量。与许多外延装置一样,可给出层厚度的良好控制,有时高达原子级,这确保了补偿的相当地精确的量。在其它实施例中,层42可以是p型层,并且层43可以是n型层。在一些实施例中,衬底40可以是n型衬底或者是提供有n型层的衬底。在其它实施例中,衬底40可以是p型衬底。根据其它实施例,层42和/或层43也可沉积且保留在衬底40的上表面上。
在一些实施例中,可以用未掺杂外延层填充剩余沟槽。在其它实施例中,保留气隙。在又一些实施例中,在沉积层43之后,可沉积又一n型层(或p型层)其次是又一p型层(或n型层)。可重复此过程以提供一系列的多个n型层和p型层。在一些实施例中,在每次沉积比如层43的p型层之后,可例如经由各向异性蚀刻去除沟槽41底部的p型层。例如,可去除p型层43的部分44。以这种方式,随后沉积的n型层经由n型层42接触衬底40。在其它实施例中,可各向异性地蚀刻n型层以在底部将其去除,使得p型层接触衬底。在再一些实施例中,可以在每个层沉积之后执行各向异性蚀刻使得所有层接触衬底。以这种方式,可以在一些实施例中制造具有精确补偿的在沟槽中具有多个垂直掺杂柱(column)的补偿器件。
n和p层的整体净掺杂可以每个为约2×1012/cm2或以下,以及层厚度容限可以为约1%。层厚度可以是约0.2或0.5或者一个或两个微米。
n和p层的掺杂可在1016/cm3和2×1017/cm3之间,然而其它浓度也是可能的。图4中,示出了对准期间测量的晶片上的示例掺杂浓度。在左侧,示出了晶片的表面图50,不同颜色表示不同掺杂水平。在右侧,示出了沿着箭头53的截面。例如当至少在稍后用于器件制造的晶片的部分上,如由曲线51表示的净掺杂低于例如由线52表示的预定阈值时,校准可被看作完成(例如,在一些情况下,可以不使用晶片边缘处或者附近的一些区域)。如已经关于图1和2提到的,可以重复校准和调整直到达到了所需标准,例如净掺杂低于某阈值。
在图6中,示出了说明制造补偿器件的又一实施例的流程图。图6的实施例可用作图2的实施例的制造方法22,但是也可独立于图2的实施例使用,例如,在其中已经以与先前讨论的不同的方式校准掺杂剂源的情况下。
在图6的实施例中的60处,例如通过将沟槽蚀刻到比如硅衬底的衬底中来在衬底中提供沟槽。在61处,n/p共掺杂层被沉积在沟槽中使得总的净掺杂低于所需阈值,这可通过执行如上述一些实施例中的校准来获得。在图6的实施例中,所使用的n掺杂剂具有与所使用的p掺杂剂不同的扩散性能(behavior)。例如,缓慢扩散的施主即比如砷(As)或者锑(Sb)的n掺杂剂可与快速扩散的受体即诸如硼的p掺杂剂一起使用。然后当对该层热处理时,p掺杂剂比n掺杂剂扩散得更快,导致n掺杂区夹在p掺杂区之间,并且总的净掺杂低于上述阈值,然后可以将其用在补偿器件中。
在62处,基于不同扩散性能,执行热处理从而获得对于n掺杂和p掺杂的不同掺杂轮廓。
图7中示意性地示出了这种实施例连同所得到器件部分的说明。图7仅被视为简单的示例,用于进一步说明图6的方法,但是不被解释为限制图6的方法。图7示出了如由箭头指示的相互跟随的四个制造阶段(a)至(d)。
在阶段(a)中,提供预处理衬底。如最初已经提到的,方法可应用于预处理的衬底和没有任何预处理的衬底两者。在情形(a)中提供的衬底包括半导体晶片72,其可以是高度n掺杂的衬底,例如,锑掺杂的衬底,之后是可选的n掺杂的缓冲71(buffer)。缓冲71之后是弱掺杂层70,例如弱n掺杂层。n掺杂缓冲71和弱掺杂层70的总厚度可以是在从30至60微米的范围内,但是不限于此。在实施例中,根据下述,n掺杂缓冲71和弱掺杂层70的以μm为单位的厚度ttot可对应于被制造器件的以伏特为单位的所需阻断电压VBlock:
这意味着对于具有例如600V的所需额定阻断电压的器件,厚度ttot例如可在30μm至60μm的范围内。
在一些实施例中,通过提供比如缓冲层71的缓冲层,可以改善例如关于雪崩性能或辐射性能的器件的稳定性(robustness)。
此后,将沟槽蚀刻到衬底中,如情形(b)中所示。为此,掩模73可以被提供成留下例如约1微米开放的宽度b。这限定了如所示的沟槽74的上部宽度。在图7的实施例中,蚀刻沟槽以达到衬底72。在其它实施例中,沟槽74可以在可选缓冲层71中终止。在一些实施例中,缓冲层71可以在垂直方向(图7中的上下方向)上具有掺杂变量,其中在衬底72附近呈现更高的掺杂浓度。
通常,沟槽的深度可以是约42微米。如果存在的话,至下一沟槽(未示出)的距离可以约为4.5微米。这些数字值仅用作示例,并且根据应用,也可以使用其它值。
接下来,沟槽被填充补偿外延层,即其中n掺杂的量补偿p掺杂的量并且n掺杂剂具有与p掺杂剂不同的扩散性能的n/p共掺杂。例如,如上所述,可以使用较慢扩散的n掺杂剂和较快扩散的p掺杂剂。在情形(c)的示例中,以有些“过满”来将沟槽完全填充补偿外延层75。在其它实施例中,可保留限定的腔(例如如图4中所示),其可被填充弱掺杂的或本征层或者其可以简单地被闭合以防止掺杂剂的向外扩散。
最后,如情形(d)中所示来将该器件平坦化,并且执行热处理以引起掺杂剂的扩散。在示出的示例中,n掺杂剂具有比p掺杂剂明显更慢的扩散。因此,n掺杂中心区76保持(图7中较暗的灰色所示)被p掺杂区(较浅的灰色所示)包围。
例如为了制造以晶体管形式的补偿器件,调整晶体管的单元使得沟道末端到达沟槽的垂直n掺杂中心76。图7中所示的制造可用于条纹形、方形、六边形或者其它单元。当在相邻沟槽之间形成小节距(pitch),即小距离时,六边形单元和六边形沟槽可以是有利的。
在图7的实施例中,因为层75被补偿,即具有相同量的p掺杂和n掺杂,所以确保了由扩散形成的n掺杂区和p掺杂区的净掺杂也被补偿。当使用多个沟槽时,以这种方式确保了每个沟槽被补偿。
在一些实施例中,可通过在沟槽中交替沉积补偿掺杂的n/p共掺杂的和名义上未掺杂的层来获得更小节距。将参考图8来解释用于此的简单示例。
在图8中,再次示出了与图7的示例有些类似的器件制造过程的各种阶段或情形(a)至(d)。在情形(a)中,提供其顶部上具有弱掺杂层81的衬底80。换句话说,在图8的示例中,省略了图7的缓冲层71。然而,在图8的示例中,也可提供缓冲层。
在与图7的情形(b)类似的图8的情形(b)中,已经通过使用掩模82将沟槽83蚀刻成到达衬底80。此后,在沟槽中沉积n/p共掺杂层83,接着是本征层,即,名义上的未掺杂层,或者弱掺杂层85。应当注意到,虽然图8中,层85完全填充了层84之间的空间,但是在其它实施例中,可以仅沉积较薄的层85,接着是另一n/p共掺杂层等。应当进一步注意,可执行各向异性蚀刻以去除沟槽底部的n/p掺杂层,如已经参考图4解释的。因此,在图8的情形(c)的情况下,在单一沟槽中形成两个n/p共掺杂柱84。在如上文所述的其它实施例中,可形成更多柱。
在热处理之后,可以与图7中的情形(d)类似地形成两个柱86,每个柱86具有被p掺杂区包围的n掺杂中心区(或者在n掺杂剂具有比p掺杂剂更快的扩散性能情况下,反之)。
应当注意,图7和8中的各种情形不一定彼此按比例绘制。而且,应当注意,通过扩散,由n和p掺杂区覆盖的实际区域可能比原始的沟槽更宽。
当通过在如图8中所示的单一沟槽内沉积n/p共掺杂材料的多个柱来降低节距时,可减小特定的电阻。然而,相反地,在一些情况下,其中掺杂被本征地补偿的区域在某些情况下可以增加。
为了提供稳定的器件,在一些实施例中,可设计该器件使得可以大约在接收电压的深度的中间发生可能的击穿。为了实现这个,在深度方向上补偿程度可变化。例如,补偿程度可以在厚度dz情况下的深度z上根据k(z)=2×[(n载流子数目)-(p载流子数目)]/[(n载流子数目)+(p载流子数目)]来表现(behave),其中k是补偿程度。为了实现这个,k(z)可从负值开始从表面开始向着器件的背面增加。在整个电压接收深度上总的补偿
k=∫k(z)xdz
应该为0以具有补偿元件(compensation element)。为了实现这个,在一些实施例中,可相应地掺杂初始层(图7的70或者图8的81),使得下半部例如是n掺杂的并且上半部是p掺杂的,具有对称轮廓。然而,在其它实施例中,可将这个省略,并且层70或81可被均匀掺杂。
为了进一步说明图6-8的原理,图9示出了在加热引发扩散之前和之后的模拟掺杂轮廓。曲线90示出了在热处理之前在沟槽中沉积的砷(n掺杂剂)和硼(p掺杂剂)的掺杂轮廓。在示出的模拟示例中,将具有1μm宽度的沟槽蚀刻到Si衬底中,并且两个沟槽之间的距离为4.5μm。出于对称原因,可以使用半单元来实施图9中的模拟区域,即沟槽的一半和剩余Si台面(mesa)的一半分别具有0.5μm和2.25μm的宽度。坐标系的原点位于Si台面的中间并横向扩展直到沟槽的中间达到2.75μm。对于两种类型的掺杂剂而言掺杂的量是相同的,即,补偿了层。曲线94示出了在热处理之前,将沟槽蚀刻到其中的层中的弱磷掺杂,比如图7的层70或图8的层81。在该模拟中,然后执行1,150℃下的热处理达350分钟。在热处理之后,曲线91示出了对于砷的轮廓,曲线92示出了对于硼的轮廓,并且曲线94示出了对于磷的轮廓,表示原始的和几乎可忽略的Si台面的背景掺杂。如可以看到的,硼比砷扩散更快,导致在沟槽中心处砷浓度比硼浓度更高,和进一步远离沟槽的更低的砷浓度和更高的硼浓度。此外,曲线94示出了扩散之后的磷,示出了一些磷扩散到沟槽的该区中。由示出与台面中心约1.9μm距离处的最小值的曲线93示出总的(绝对)掺杂。这个最小值的右边,存在净n掺杂(因为砷浓度比硼浓度更高(注意对数标度),然而这个最小值左边,由于较高的硼浓度而存在净p掺杂。补偿了总的掺杂。
图9仅示出了沟槽的“左”侧,即沟槽的一侧。如已经参考图7中的情形(b)讨论的,整个轮廓将实质上对于位于图9中2.75μm处的沟槽中心对称,或者将实质上对于位于图9中0μm处的台面的中心对称。因此,在n/p共掺杂层中使用两种掺杂剂情况下的掺杂轮廓结果具有在相同位置(图9中的横向距离)处的最大值,但是在量值上不同,一种掺杂剂通常具有更窄轮廓和更高的最大值,以及另一种掺杂剂(图9中的曲线92)具有更宽的轮廓和更低的最大值。
图9的模拟仅用于说明,并且当然,可以使用其它的层厚度、掺杂剂和结构。此外,在本公开中给出的任何数字值仅用于给出一些示例,并且其它值同样是可能的。而且,虽然描述了用于沉积层的各种沉积技术,但是也可例如通过使用外延装置之外的其它层形成装置来使用用于形成这些层的其它技术。而且,可使用蚀刻之外的其它技术来形成或提供沟槽。因此,所讨论的实施例不被解释为以任何方式限制范围。
Claims (25)
1.一种装置,包括:
层形成装置,被配置成形成半导体层;
n掺杂剂源,将n掺杂剂供应至所述层形成装置;
p掺杂剂源,将p掺杂剂供应至所述层形成装置;
控制器,被配置成控制n掺杂的量和p掺杂的量;和
掺杂剂浓度测量设备;
其中将所述控制器配置成控制所述n掺杂剂源、所述p掺杂剂源和所述层形成装置,以形成n/p共掺杂校准层;
所述掺杂剂浓度测量设备被配置成测量所述校准层的净掺杂剂浓度,所述控制器被配置成基于所述净掺杂剂浓度来调整相对于p掺杂剂的量的n掺杂剂的量。
2.如权利要求1所述的装置,其中所述装置还被配置成基于调整来制造补偿器件。
3.如权利要求2所述的装置,其中所述装置被配置成交替地形成至少一个n掺杂层和一个p掺杂层以形成补偿器件。
4.如权利要求3所述的装置,还包括沟槽蚀刻设备,以在衬底中蚀刻沟槽,所述至少一个n掺杂层和至少一个p掺杂层被形成在沟槽内。
5.如权利要求3所述的装置,其中所述装置被配置成基于所述调整而形成n/p共掺杂层,并且其中所述n掺杂剂和所述p掺杂剂具有不同扩散常数,所述装置被进一步配置成在所述n/p共掺杂层的所述沉积之后执行热处理。
6.一种装置,包括:
沟槽形成设备,其被配置成在衬底中形成沟槽;
层形成装置;
n掺杂剂源,被配置成将n掺杂剂供应至所述层形成装置;
p掺杂剂源,被配置成将p掺杂剂供应至所述层形成装置,所述n掺杂剂和所述p掺杂剂具有不同的扩散性能;并且
所述装置被配置成在由所述沟槽形成设备形成的沟槽中形成n/p共掺杂补偿层,并且加热所形成的n/p共掺杂层从而引起所述n掺杂剂和所述p掺杂剂的不同扩散。
7.如权利要求6所述的装置,其中所述装置被配置成在所述沟槽中形成至少两个分开的n/p共掺杂层。
8.如权利要求6所述的装置,其中所述层形成装置包括化学气相沉积装置。
9.如权利要求6所述的装置,其中所述n掺杂剂包括砷和锑中的一种,并且其中所述p掺杂剂包括硼,其中所述装置被配置成处理硅衬底。
10.如权利要求6所述的装置,其中所述沟槽形成设备被配置成通过在衬底上提供的层到达所述衬底来蚀刻沟槽。
11.一种方法,包括:
在衬底上形成n/p共掺杂校准层;和
基于n/p共掺杂校准层的净掺杂来调整n掺杂剂和p掺杂剂的供应。
12.如权利要求11的方法,还包括在多个衬底上形成n/p共掺杂校准层,p掺杂浓度或n掺杂浓度的至少一个在衬底之间变化,其中所述调整包括基于多个n/p共掺杂校准层的净掺杂确定n掺杂剂和p掺杂剂的供应的值。
13.如权利要求11所述的方法,其中重复所述形成和所述调整直到所述校准层的净掺杂低于预定阈值。
14.如权利要求11所述的方法,还包括基于所述调整制造补偿器件。
15.如权利要求14所述的方法,其中制造补偿器件包括基于所述调整交替地形成n和p掺杂层。
16.如权利要求14所述的方法,其中,制造所述补偿器件包括基于所述调整形成至少一个n/p共掺杂层,所述n掺杂剂和所述p掺杂剂具有不同扩散性能,并且执行热处理。
17.如权利要求14所述的方法,其中制造所述补偿器件包括在沟槽中形成至少一层。
18.一种方法,包括:
在衬底中提供沟槽;
在所述沟槽中形成至少一个n/p共掺杂层,其中所述n/p共掺杂中的n掺杂剂具有与所述n/p共掺杂的p掺杂剂不同的扩散性能;并且
执行热处理从而获得对于所述n掺杂剂和所述p掺杂剂的不同的掺杂轮廓。
19.如权利要求18所述的方法,其中所述n/p共掺杂层的所述形成包括在所述沟槽中沉积至少两个分开的n/p共掺杂层。
20.一种器件,包括:
衬底;
在所述衬底上提供的层;和
至少在这层内的垂直区,具有对称的n掺杂轮廓和对称的p掺杂轮廓,n掺杂轮廓的最大值与p掺杂轮廓的最大值实质上一致,所述n掺杂轮廓和所述p掺杂轮廓中的一个比所述n掺杂轮廓和所述p掺杂轮廓中的另一个更宽。
21.如权利要求20所述的器件,
其中所述衬底为高度n掺杂的,其中所述层与所述衬底相比是弱掺杂的;并且
其中所述n掺杂的轮廓比所述p掺杂的轮廓更窄。
22.如权利要求21所述的器件,还包括在所述弱掺杂层和所述衬底之间的n掺杂的缓冲层。
23.如权利要求21所述的器件,其中所述层的掺杂轮廓在垂直方向上变化。
24.如权利要求20所述的器件,其中所述n掺杂轮廓和所述p掺杂轮廓的总的净掺杂浓度低于2×1014/cm3。
25.如权利要求20所述的器件,其中在该层中的整体净掺杂低于2×1012/cm2。
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