CN104183580A - 外延结构与封装基板为一体的整合式led元件及制作方法 - Google Patents
外延结构与封装基板为一体的整合式led元件及制作方法 Download PDFInfo
- Publication number
- CN104183580A CN104183580A CN201310187738.9A CN201310187738A CN104183580A CN 104183580 A CN104183580 A CN 104183580A CN 201310187738 A CN201310187738 A CN 201310187738A CN 104183580 A CN104183580 A CN 104183580A
- Authority
- CN
- China
- Prior art keywords
- electrode structure
- led
- electrode
- substrate
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/25—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
- H01L2224/251—Disposition
- H01L2224/2518—Disposition being disposed on at least two different sides of the body, e.g. dual array
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
Description
Claims (26)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310187738.9A CN104183580B (zh) | 2013-05-20 | 2013-05-20 | 外延结构与封装基板为一体的整合式led元件及制作方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310187738.9A CN104183580B (zh) | 2013-05-20 | 2013-05-20 | 外延结构与封装基板为一体的整合式led元件及制作方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104183580A true CN104183580A (zh) | 2014-12-03 |
CN104183580B CN104183580B (zh) | 2018-03-02 |
Family
ID=51964512
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310187738.9A Active CN104183580B (zh) | 2013-05-20 | 2013-05-20 | 外延结构与封装基板为一体的整合式led元件及制作方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104183580B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110197619A (zh) * | 2018-02-27 | 2019-09-03 | 欣兴电子股份有限公司 | 像素结构及制造像素结构的方法 |
CN110556470A (zh) * | 2019-09-16 | 2019-12-10 | 錼创显示科技股份有限公司 | 微型半导体芯片、微型半导体组件结构、以及转移装置 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101432896A (zh) * | 2006-04-27 | 2009-05-13 | 克里公司 | 用于半导体发光器件封装的子基板和包括其的半导体发光器件封装 |
CN202259288U (zh) * | 2011-07-01 | 2012-05-30 | 台燿科技股份有限公司 | Led基板结构 |
CN202721197U (zh) * | 2012-09-13 | 2013-02-06 | 中山市澳克士照明电器有限公司 | 大功率led封装模块 |
WO2013045353A1 (de) * | 2011-09-29 | 2013-04-04 | Osram Opto Semiconductors Gmbh | Led-modul |
CN202905774U (zh) * | 2012-10-13 | 2013-04-24 | 江苏新广联科技股份有限公司 | 光源模块用基板 |
CN202930431U (zh) * | 2012-11-13 | 2013-05-08 | 金木子 | 无金属电极的垂直结构的led高压芯片 |
-
2013
- 2013-05-20 CN CN201310187738.9A patent/CN104183580B/zh active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101432896A (zh) * | 2006-04-27 | 2009-05-13 | 克里公司 | 用于半导体发光器件封装的子基板和包括其的半导体发光器件封装 |
CN202259288U (zh) * | 2011-07-01 | 2012-05-30 | 台燿科技股份有限公司 | Led基板结构 |
WO2013045353A1 (de) * | 2011-09-29 | 2013-04-04 | Osram Opto Semiconductors Gmbh | Led-modul |
CN202721197U (zh) * | 2012-09-13 | 2013-02-06 | 中山市澳克士照明电器有限公司 | 大功率led封装模块 |
CN202905774U (zh) * | 2012-10-13 | 2013-04-24 | 江苏新广联科技股份有限公司 | 光源模块用基板 |
CN202930431U (zh) * | 2012-11-13 | 2013-05-08 | 金木子 | 无金属电极的垂直结构的led高压芯片 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110197619A (zh) * | 2018-02-27 | 2019-09-03 | 欣兴电子股份有限公司 | 像素结构及制造像素结构的方法 |
CN110197619B (zh) * | 2018-02-27 | 2021-04-23 | 欣兴电子股份有限公司 | 像素结构及制造像素结构的方法 |
CN110556470A (zh) * | 2019-09-16 | 2019-12-10 | 錼创显示科技股份有限公司 | 微型半导体芯片、微型半导体组件结构、以及转移装置 |
Also Published As
Publication number | Publication date |
---|---|
CN104183580B (zh) | 2018-03-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI549322B (zh) | 一種結合磊晶結構與封裝基板爲一體之整合式led元件及其製作方法 | |
CN102185091B (zh) | 一种发光二极管器件及其制造方法 | |
TW201143023A (en) | Light emitting diode package, lighting device and light emitting diode package substrate | |
CN102931322A (zh) | 大功率cob封装led结构及其晶圆级制造工艺 | |
CN104517947A (zh) | 发光二极管组件及制作方法 | |
CN201348169Y (zh) | 基于cob技术封装的白光led集成阵列照明光源 | |
CN201904368U (zh) | 一种硅基板集成有功能电路的led表面贴装结构 | |
US9728691B2 (en) | Light-emitting diode structure | |
CN202957291U (zh) | 大功率cob封装led结构 | |
CN104183580A (zh) | 外延结构与封装基板为一体的整合式led元件及制作方法 | |
CN202564438U (zh) | 发光二极管封装结构 | |
CN102214746A (zh) | 一种氮化镓基功率型led芯片制作方法 | |
CN202205814U (zh) | 一种发光二极管器件 | |
CN102214754B (zh) | 发光二极管及其制造方法 | |
CN105023932B (zh) | 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件 | |
CN102969433A (zh) | Led晶片模组化封装工艺 | |
CN102646673A (zh) | 高集成高光效的热电分离功率型发光二极体及封装方法 | |
TWI566375B (zh) | 發光模組 | |
CN203746897U (zh) | 一种led | |
CN106935577A (zh) | 发光二极管装置 | |
CN103855291B (zh) | 芯片板上封装结构及其制备方法 | |
CN103855282A (zh) | 一种led | |
CN102945912A (zh) | Led发光元器件支架 | |
CN203871325U (zh) | 氮化铝陶瓷支架 | |
CN204179103U (zh) | 发光二极管平板支架、支架单元及发光二极管器件 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20160601 Address after: 201306 Shanghai Xinyuan Lingang Industrial District Road No. 555 financial center room 211 Applicant after: EnRay Tek Optoelectronics (Shanghai) Co., Ltd. Address before: Brunei Darussalam Bandar Seri Begawan Applicant before: New Light Source Technology Co., Ltd. |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20161230 Address after: Unit 76, building 99, Queen's road, Hongkong,, China Applicant after: Hongkong Beida Jade Bird Co. Ltd Address before: 201306 Shanghai Xinyuan Lingang Industrial District Road No. 555 financial center room 211 Applicant before: EnRayTek Optoelectronics (Shanghai) Co., Ltd. |
|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20210201 Address after: 1889 Hongyin Road, Pudong New Area, Shanghai Patentee after: SHANGHAI XIANYAO DISPLAY TECHNOLOGY Co.,Ltd. Address before: Unit 7605, 76th floor, 99 Queen's Road Central, Hong Kong, China Patentee before: HONG KONG BEIDA JADE BIRD DISPLAY Ltd. |