CN104103720A - Method for preparing nitride semiconductor - Google Patents
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- CN104103720A CN104103720A CN201410354965.0A CN201410354965A CN104103720A CN 104103720 A CN104103720 A CN 104103720A CN 201410354965 A CN201410354965 A CN 201410354965A CN 104103720 A CN104103720 A CN 104103720A
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- 150000004767 nitrides Chemical class 0.000 title claims abstract description 25
- 238000000034 method Methods 0.000 title claims abstract description 24
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical class [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 30
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 26
- 238000005240 physical vapour deposition Methods 0.000 claims abstract description 16
- 238000000576 coating method Methods 0.000 claims description 34
- 239000011248 coating agent Substances 0.000 claims description 32
- 229910002601 GaN Inorganic materials 0.000 claims description 23
- 238000002360 preparation method Methods 0.000 claims description 18
- 238000000151 deposition Methods 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 13
- 230000008021 deposition Effects 0.000 claims description 12
- 239000012535 impurity Substances 0.000 claims description 11
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 239000000428 dust Substances 0.000 claims description 7
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 3
- 229910052749 magnesium Inorganic materials 0.000 claims description 3
- 239000011777 magnesium Substances 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- OYPRJOBELJOOCE-UHFFFAOYSA-N Calcium Chemical compound [Ca] OYPRJOBELJOOCE-UHFFFAOYSA-N 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 2
- 229910052788 barium Inorganic materials 0.000 claims description 2
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052791 calcium Inorganic materials 0.000 claims description 2
- 239000011575 calcium Substances 0.000 claims description 2
- 229910052725 zinc Inorganic materials 0.000 claims description 2
- 239000011701 zinc Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 19
- 239000010409 thin film Substances 0.000 abstract 2
- 239000013078 crystal Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 238000000053 physical method Methods 0.000 description 1
- 229920006254 polymer film Polymers 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/205—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
- H01L21/2056—Epitaxial deposition of AIIIBV compounds
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- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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Abstract
The invention provides a method for preparing a nitride semiconductor. A chemical vapor deposition (CVD) AlxInyGal-x-yN material layer is deposited between a physical vapor deposition (PVD) ALN thin film layer and a CVD gallium nitride series layer, the stress action between the ALN thin film layer and the gallium nitride series layer can be reduced by the aid of the material layer, whole qualities of a light emitting diode are improved, and thereby, the light emitting efficiency is increased finally.
Description
Technical field
The present invention relates to light-emitting diode preparing technical field, particularly a kind of preparation method of nitride-based semiconductor.
Background technology
Physical vapour deposition (PVD) (Physical Vapor Deposition, PVD) technology refers under vacuum condition, adopt physical method, by material source---solid or liquid surface are gasificated into gaseous atom, molecule or partial ionization and become ion, and by low-pressure gas (or plasma) process, in matrix surface deposition, there is the technology of the film of certain specific function.Physical gas-phase deposite method mainly comprises: vacuum evaporation, sputter coating, arc-plasma plating, ion film plating, and molecular beam epitaxy etc.; It not only can depositing metallic films, alloy film, can also deposited compound, pottery, semiconductor, polymer film etc.; This technical matters process is simple, and environmental pollution is little, and raw materials consumption is few, and film forming even compact, strong with the adhesion of substrate.
In view of the above advantage of PVD method, in the situation that light-emitting diode (Light-emitting diode, LED) is studied is fast-developing, in the preparation that this method is also widely used with light-emitting diode.American documentation literature US2013/ 0285065 has disclosed the AlN thin layer surfacing that utilizes PVD method to form, and its roughness is less than 1nm; Lattice quality is more excellent, and its 002 half-peak breadth is less than 200; After on this thin layer, utilize chemical vapour deposition technique (CVD method) to deposit again the nitride layers such as N-shaped layer, luminescent layer and p-type layer.And in reality preparation, the crystal layer of later use chemical vapour deposition technique deposition and the growth chamber environmental difference of aforementioned PVD method strengthen, and material consists of GaN system, the lattice mismatch of itself and AlN thin layer is larger, thereby cause between PVD method AlN thin layer and CVD method nitride layer and to have larger stress, thereby easily cause light-emitting diode degradation, luminous efficiency reduces.
Summary of the invention
For the problems referred to above, the present invention proposes a kind of preparation method of nitride-based semiconductor, by deposit a CVD method Al between PVD method AlN thin layer and CVD method nitride layer
xin
yga
1-x-yn material layer, utilizes this material layer can reduce the effect of stress between AlN thin layer and nitride layer, improves the total quality of light-emitting diode, thereby finally improves luminous efficiency.
The technical scheme that the present invention addresses the above problem is: a kind of preparation method of nitride-based semiconductor, comprises the following steps:
Step 1 a: substrate is provided, utilizes physical vaporous deposition (PVD method) to deposit an AlN layer on described substrate, form the first resilient coating;
Step 2: utilize chemical vapour deposition technique (CVD) deposition one Al on described AlN layer
xin
yga
1-x-yn(0<x≤1,0≤y≤1) layer, form the second resilient coating; Described the second resilient coating and described the first resilient coating constitute bottom;
Step 3: utilize CVD method deposition N-shaped gallium nitride layer, luminescent layer and p-type gallium nitride series layer on described nitride bottom; The Al that this CVD method forms
xin
yga
1-x-ythe first resilient coating that the second resilient coating that N material forms and described AlN material form is alumina-bearing material layer, therefore its material coefficient is close, lattice mismatch is less; And because of the depositional mode of the second resilient coating identical with the depositional mode of third step sedimentary deposit, can preferable alloy organic chemical vapor deposition (MOCVD) method, thereby can reduce the material stress between step 1 and step 3, thus improve the lattice layer quality of bottom, improve whole epitaxial structure quality.
Preferably, the thickness range of the first resilient coating of described formation is 5 dust～350 dusts.
Preferably, the thickness range of the second resilient coating of described formation is 5 dust～1500 dusts.
Preferably, the growth temperature range of the second resilient coating of described formation is 400～1150 ℃.
Preferably, the N-shaped gallium nitride layer that described step 3 forms is the combination layer of N-shaped doped gallium nitride layer or non-impurity-doped gallium nitride layer and N-shaped gallium nitride layer.
Preferably, the bottom of described formation is non-impurity-doped or doped with N-shaped or p-type impurity.
Preferably, described N-shaped impurity is the wherein a kind of of silicon or tin.
Preferably, described p-type impurity is the wherein a kind of of zinc, magnesium, calcium, barium.
Preferably, the concentration range of described N-shaped or p-type impurity is 10
17~ 10
20/ cm
3.
Preferably, described the first resilient coating deposits formation in pvd chamber chamber; Described the second resilient coating deposits formation in MOCVD chamber.
The present invention at least has following beneficial effect: in the inventive method, and the Al that this mocvd method forms
xin
yga
1-x-ythe first resilient coating lattice mismatch that the second resilient coating that N material forms and described AlN material form is little, and its deposition chambers environment is consistent with described third step sedimentary deposit growing environment, thereby can reduce the material stress between step 1 and step 3, improve whole epitaxial structure quality.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for specification, for explaining the present invention, is not construed as limiting the invention together with embodiments of the present invention.In addition, accompanying drawing data are to describe summary, are not to draw in proportion.
The light emitting diode construction schematic diagram of the embodiment that Fig. 1 ~ 2 are the present invention.
Fig. 3 is preparation method's flow chart of a kind of nitride-based semiconductor of the present invention.
In figure: 1. substrate; 2. bottom; 21. first resilient coatings; 22. second resilient coatings; 3. N-shaped gallium nitride layer; 31. non-impurity-doped gallium nitride layers; 32. N-shaped doped gallium nitride layer; 4. luminescent layer; 5. p-type gallium nitride series layer.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is elaborated.
embodiment 1
Please refer to accompanying drawing 1 ~ 3, a kind of preparation method of nitride-based semiconductor, comprises the following steps:
Step 1: substrate 1 is provided, substrate can be Sapphire Substrate or silicon substrate, can be also patterned substrate, is placed in physical vapor deposition chamber, utilizing physical vaporous deposition (PVD method) deposit thickness on substrate 1 is the AlN layer of 5 dust～350 dusts, forms the first resilient coating 21;
Step 2: the substrate that deposits the first resilient coating 21 is placed in to chemical vapor deposition (CVD) chamber, and utilizing CVD method to deposit a thickness range is 5 dust～1500 dust Al
xin
yga
1-x-yn(0<x≤1,0≤y≤1) layer, regulate Al component, make its lattice constant between AlN layer and gallium nitride series layer, form the second resilient coating 22, growth temperature range is 400～1150 ℃; The second resilient coating 22 is combined to form bottom 2 with described the first resilient coating 21;
Step 3: continue, in the CVD of step 2 chamber, to regulate the growth parameter(s)s such as temperature, air-flow, utilize CVD method deposition N-shaped gallium nitride layer 3, luminescent layer 4 and p-type gallium nitride series layer 5 on bottom 2.Wherein, N-shaped gallium nitride layer 3 is followed successively by non-impurity-doped gallium nitride layer 31 and N-shaped doped gallium nitride layer 32 combination layers; In addition N-shaped gallium nitride layer 3 can be directly also N-shaped doped gallium nitride layer 32(as shown in Figure 2).
In the present embodiment, utilize PVD method to deposit after the first resilient coating, as directly carried out step 3 while depositing N-shaped gallium nitride layer 3, luminescent layer 4 and p-type nitride layer 5 in CVD chamber, because pvd chamber chamber depositional environment and CVD chamber depositional environment differ greatly, the film crystal state of its deposition has larger difference, and AlN layer material and follow-up nitride layer material lattice coefficient have larger difference, thereby easily cause between bottom 2 and follow-up gallium nitride series layer 3 and have certain stress, and then affect total quality and the performance of light-emitting diode.And when inserting Al
xin
yga
1-x-yduring the second resilient coating 22 of N material, because of Al
xin
yga
1-x-ybetween N material and AlN and gallium nitride series layer, material lattice difference of coefficients is dwindled, Lattice Matching degree increases, and this layer and succeeding layer all deposit in CVD chamber, and depositional mode difference is less, therefore can reduce the stress between N-shaped gallium nitride layer 3 and succeeding layer and AlN layer, improve bulk crystal quality.
embodiment 2
The difference of the present embodiment and embodiment 1 is: the first resilient coating comprising in bottom 2 and the second resilient coating can be doped with N-shaped impurity, preferred sila matter, and doping content is 10
17~ 10
20/ cm
3left and right.
embodiment 3
The difference of the present embodiment and embodiment 1 is: the first resilient coating comprising in bottom 2 and the second resilient coating can be doped with p-type impurity, preferably magnesium impurity, and doping content is 10
17~ 10
20/ cm
3left and right.
Should be understood that, above-mentioned specific embodiments is the preferred embodiments of the present invention, and scope of the present invention is not limited to this embodiment, and all any changes of doing according to the present invention, within all belonging to protection scope of the present invention.
Claims (10)
1. a preparation method for nitride-based semiconductor, comprises the following steps:
Step 1 a: substrate is provided, utilizes physical vaporous deposition (PVD method) to deposit an AlN layer on described substrate, form the first resilient coating;
Step 2: utilize chemical vapour deposition technique (CVD) deposition one Al on described AlN layer
xin
yga
1-x-yn(0<x≤1,0≤y≤1) layer, form the second resilient coating; Described the second resilient coating and described the first resilient coating constitute bottom;
Step 3: utilize chemical vapour deposition technique deposition N-shaped gallium nitride layer, luminescent layer and p-type gallium nitride layer on described bottom.
2. the preparation method of nitride-based semiconductor according to claim 1, is characterized in that: described second step is identical with third step depositional mode, is metal organic chemical vapor deposition (MOCVD) method.
3. the preparation method of nitride-based semiconductor according to claim 1, is characterized in that: the thickness range of the first resilient coating of described formation is 5 dust～350 dusts.
4. the preparation method of nitride-based semiconductor according to claim 1, is characterized in that: the thickness range of the second resilient coating of described formation is 5 dust～1500 dusts.
5. the preparation method of nitride-based semiconductor according to claim 1, is characterized in that: the growth temperature range of described the second resilient coating is 400～1150 ℃.
6. the preparation method of nitride-based semiconductor according to claim 1, is characterized in that: the N-shaped gallium nitride layer forming in described step 3 is the combination layer of N-shaped doped gallium nitride layer or non-impurity-doped gallium nitride layer and N-shaped gallium nitride layer.
7. the preparation method of nitride-based semiconductor according to claim 1, is characterized in that: the bottom of described formation is non-impurity-doped or doped with N-shaped or p-type impurity.
8. the preparation method of nitride-based semiconductor according to claim 7, is characterized in that: described N-shaped impurity is silicon or tin.
9. the preparation method of nitride-based semiconductor according to claim 7, is characterized in that: described p-type impurity is the wherein a kind of of zinc or magnesium or calcium or barium.
10. the preparation method of nitride-based semiconductor according to claim 7, is characterized in that: the concentration range of described N-shaped or p-type impurity is 10
17~ 10
20/ cm
3.
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| CN201410354965.0A CN104103720A (en) | 2014-07-24 | 2014-07-24 | Method for preparing nitride semiconductor |
| PCT/CN2015/073465 WO2016011810A1 (en) | 2014-07-24 | 2015-03-02 | Method for preparing nitride semiconductor |
| US15/401,091 US10263139B2 (en) | 2014-07-24 | 2017-01-08 | Fabrication method of nitride light emitting diodes |
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| CN201410354965.0A CN104103720A (en) | 2014-07-24 | 2014-07-24 | Method for preparing nitride semiconductor |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2016011810A1 (en) * | 2014-07-24 | 2016-01-28 | 厦门市三安光电科技有限公司 | Method for preparing nitride semiconductor |
| WO2016165558A1 (en) * | 2015-04-15 | 2016-10-20 | 厦门市三安光电科技有限公司 | Nitride light emitting diode structure and preparation method thereof |
| WO2016173359A1 (en) * | 2015-04-29 | 2016-11-03 | 厦门市三安光电科技有限公司 | Light-emitting diode structure and preparation method therefor |
| CN106374021A (en) * | 2016-12-02 | 2017-02-01 | 湘能华磊光电股份有限公司 | LED epitaxial growth method based on sapphire graphical substrate |
| CN106409996A (en) * | 2016-11-08 | 2017-02-15 | 湘能华磊光电股份有限公司 | Epitaxial growth method capable of improving LED chip property uniformity |
| CN106653970A (en) * | 2016-11-18 | 2017-05-10 | 华灿光电（浙江）有限公司 | Epitaxial wafer of light-emitting diode and growth method thereof |
| CN107195736A (en) * | 2017-05-27 | 2017-09-22 | 华灿光电（浙江）有限公司 | A kind of gallium nitride based LED epitaxial slice and its growing method |
| CN109671816A (en) * | 2018-11-21 | 2019-04-23 | 华灿光电（浙江）有限公司 | A kind of epitaxial wafer of light emitting diode and preparation method thereof |
| CN109980055A (en) * | 2019-04-17 | 2019-07-05 | 湘能华磊光电股份有限公司 | A kind of LED epitaxial growth method reducing warpage |
| CN114093989A (en) * | 2021-09-30 | 2022-02-25 | 华灿光电（浙江）有限公司 | Deep ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof |
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| CN104103720A (en) * | 2014-07-24 | 2014-10-15 | 安徽三安光电有限公司 | Method for preparing nitride semiconductor |
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- 2014-07-24 CN CN201410354965.0A patent/CN104103720A/en active Pending
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| US20130285065A1 (en) * | 2012-04-26 | 2013-10-31 | Mingwei Zhu | Pvd buffer layers for led fabrication |
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| WO2016011810A1 (en) * | 2014-07-24 | 2016-01-28 | 厦门市三安光电科技有限公司 | Method for preparing nitride semiconductor |
| WO2016165558A1 (en) * | 2015-04-15 | 2016-10-20 | 厦门市三安光电科技有限公司 | Nitride light emitting diode structure and preparation method thereof |
| WO2016173359A1 (en) * | 2015-04-29 | 2016-11-03 | 厦门市三安光电科技有限公司 | Light-emitting diode structure and preparation method therefor |
| CN106409996A (en) * | 2016-11-08 | 2017-02-15 | 湘能华磊光电股份有限公司 | Epitaxial growth method capable of improving LED chip property uniformity |
| CN106653970B (en) * | 2016-11-18 | 2019-08-23 | 华灿光电（浙江）有限公司 | A kind of epitaxial wafer and its growing method of light emitting diode |
| CN106653970A (en) * | 2016-11-18 | 2017-05-10 | 华灿光电（浙江）有限公司 | Epitaxial wafer of light-emitting diode and growth method thereof |
| CN106374021A (en) * | 2016-12-02 | 2017-02-01 | 湘能华磊光电股份有限公司 | LED epitaxial growth method based on sapphire graphical substrate |
| CN107195736A (en) * | 2017-05-27 | 2017-09-22 | 华灿光电（浙江）有限公司 | A kind of gallium nitride based LED epitaxial slice and its growing method |
| CN109671816A (en) * | 2018-11-21 | 2019-04-23 | 华灿光电（浙江）有限公司 | A kind of epitaxial wafer of light emitting diode and preparation method thereof |
| CN109671816B (en) * | 2018-11-21 | 2021-01-19 | 华灿光电（浙江）有限公司 | Epitaxial wafer of light emitting diode and preparation method thereof |
| CN109980055A (en) * | 2019-04-17 | 2019-07-05 | 湘能华磊光电股份有限公司 | A kind of LED epitaxial growth method reducing warpage |
| CN109980055B (en) * | 2019-04-17 | 2022-02-01 | 湘能华磊光电股份有限公司 | LED epitaxial growth method capable of reducing warping |
| CN114093989A (en) * | 2021-09-30 | 2022-02-25 | 华灿光电（浙江）有限公司 | Deep ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof |
| CN114093989B (en) * | 2021-09-30 | 2023-11-14 | 华灿光电（浙江）有限公司 | Deep ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof |
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