CN114093989A - Deep ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof - Google Patents
Deep ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
Abstract
The disclosure provides a deep ultraviolet light emitting diode epitaxial wafer and a manufacturing method thereof, and belongs to the technical field of semiconductors. The deep ultraviolet light-emitting diode epitaxial wafer comprises a substrate, and a first AlN layer, a second AlN layer, an N-type layer, an active layer, an electron blocking layer, a P-type layer and a P-type contact layer which are sequentially laminated on the substrate; the radius of the first AlN layer is smaller than that of the substrate, the first AlN layer is obtained by deposition through a physical vapor deposition method, and the second AlN layer is grown through a metal organic compound chemical vapor deposition method. The deep ultraviolet light emitting diode epitaxial wafer can effectively release stress, inhibit generation of cracks in an AlN growth process, improve crystal quality and improve photoelectric performance of a deep ultraviolet light emitting diode.
Description
Technical Field
The disclosure relates to the technical field of semiconductors, in particular to a deep ultraviolet light emitting diode epitaxial wafer and a manufacturing method thereof.
Background
The Light Emitting Diode (LED) is a new product with great influence in the photoelectronic industry, has the characteristics of small volume, long service life, rich and colorful colors, low energy consumption and the like, and is widely applied to the fields of illumination, display screens, signal lamps, backlight sources, toys and the like.
The core structure of the LED is an epitaxial wafer, and the manufacturing of the epitaxial wafer has great influence on the photoelectric characteristics of the LED. An epitaxial wafer generally includes a substrate, and an N-type layer, an active layer, and a P-type layer sequentially stacked on the substrate. Electrons provided by the N-type layer and holes provided by the P-type layer are radiated and recombined in the active layer to emit light. The deep ultraviolet light emitting diode is a light emitting diode with the light emitting wavelength of 200 nm-350 nm, and an N-type layer in an epitaxial wafer of the deep ultraviolet light emitting diode is usually an AlGaN layer. The high-quality AlGaN layer can improve the light emission efficiency of the deep ultraviolet LED, and in order to improve the quality of the AlGaN layer and reduce the dislocation density, an AlN buffer layer is usually further provided before the N-type layer.
Since AlN materials grown in high temperature environments have better crystal quality, high temperature growth of AlN buffer layers is generally used. However, the AlN material grown at high temperature is prone to cracking, which may affect the epitaxial growth of the subsequent epitaxial wafer.
Disclosure of Invention
The embodiment of the disclosure provides a deep ultraviolet light emitting diode epitaxial wafer and a manufacturing method thereof, which can effectively release stress, inhibit cracks in an AlN growth process, improve crystal quality and improve photoelectric performance of a deep ultraviolet light emitting diode. The technical scheme is as follows:
in a first aspect, a deep ultraviolet light emitting diode epitaxial wafer is provided, which includes a substrate, and a first AlN layer, a second AlN layer, an N-type layer, an active layer, an electron blocking layer, a P-type layer, and a P-type contact layer sequentially stacked on the substrate;
the radius of the first AlN layer is smaller than that of the substrate, the first AlN layer is obtained by deposition through a physical vapor deposition method, and the second AlN layer is grown through a metal organic compound chemical vapor deposition method.
Optionally, a difference between a radius of the first AlN layer and a radius of the substrate is 0.1 to 5 mm.
Optionally, the first AlN layer has a thickness less than a thickness of the second AlN layer.
Optionally, the thickness of the first AlN layer is 1-100 nm.
Optionally, the thickness of the second AlN layer is 2-3 um.
In another aspect, a method for manufacturing a deep ultraviolet light emitting diode epitaxial wafer is provided, the method comprising:
providing a substrate;
depositing a first AlN layer on the substrate by adopting a physical vapor deposition method;
processing the first AlN layer to enable the radius of the first AlN layer to be smaller than that of the substrate;
growing a second AlN layer on the first AlN layer by adopting a metal organic compound chemical vapor deposition method;
and sequentially growing an N-type layer, an active layer, an electron blocking layer, a P-type layer and a P-type contact layer on the second AlN layer.
Optionally, the processing the first AlN layer includes:
and processing the first AlN layer by adopting a photoetching technology and an etching technology, removing part of the edge area of the first AlN layer along the circumferential direction of the first AlN layer, and exposing the surface of the substrate.
Optionally, a difference between a radius of the first AlN layer and a radius of the substrate is 0.1 to 5 mm.
Optionally, the growth temperature of the first AlN layer is less than the growth temperature of the second AlN layer.
Optionally, the growth temperature of the first AlN layer is 500-700 ℃, and the growth temperature of the second AlN layer is 1200-1400 ℃.
The technical scheme provided by the embodiment of the disclosure has the following beneficial effects:
by arranging the first AlN layer and the second AlN layer between the substrate and the N-type layer, the first AlN layer and the second AlN layer can play a role in buffering, and the generation of dislocation is reduced. The first AlN layer is obtained by deposition through a physical vapor deposition method, and the formed first AlN layer has smaller and more uniform AlN particles and better C-axis orientation. The second AlN layer is grown on the first AlN layer, which is advantageous in forming a crystal of superior crystal quality, so that the crystal quality can be improved. Meanwhile, the radius of the first AlN layer is smaller than that of the substrate, so that when a subsequent epitaxial layer grows, a region which is left between the outer side of the first AlN layer and the surface of the substrate can be used as a stress release region to effectively release stress, thereby being beneficial to inhibiting the generation of cracks in the AlN growth process, further improving the crystal quality and improving the photoelectric performance of the deep ultraviolet light-emitting diode.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a deep ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present disclosure;
fig. 2 is a flowchart of a method for manufacturing an epitaxial wafer of a deep ultraviolet light emitting diode according to an embodiment of the present disclosure;
fig. 3 is a flowchart of another method for manufacturing an epitaxial wafer of a deep ultraviolet light emitting diode according to an embodiment of the present disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a deep ultraviolet light emitting diode epitaxial wafer provided by an embodiment of the present disclosure, and as shown in fig. 1, the deep ultraviolet light emitting diode epitaxial wafer includes a substrate 1, and a first AlN layer 2, a second AlN layer 3, an N-type layer 4, an active layer 5, an electron blocking layer 6, a P-type layer 7, and a P-type contact layer 8 sequentially stacked on the substrate 1.
The first AlN layer 2 has a radius smaller than that of the substrate 1, the first AlN layer 2 is deposited by a Physical Vapor Deposition (PVD) method, and the second AlN layer 3 is grown by a Metal Organic Chemical Vapor Deposition (MOCVD) method.
According to the embodiment of the disclosure, the first AlN layer and the second AlN layer are arranged between the substrate and the N-type layer, so that the first AlN layer and the second AlN layer can play a buffering role, and the generation of dislocation is reduced. The first AlN layer is obtained by deposition through a physical vapor deposition method, and the formed first AlN layer has smaller and more uniform AlN particles and better C-axis orientation. The second AlN layer is grown on the first AlN layer, which is advantageous in forming a crystal of superior crystal quality, so that the crystal quality can be improved. Meanwhile, the radius of the first AlN layer is smaller than that of the substrate, so that when a subsequent epitaxial layer grows, a region which is left between the outer side of the first AlN layer and the surface of the substrate can be used as a stress release region to effectively release stress, thereby being beneficial to inhibiting the generation of cracks in the AlN growth process, further improving the crystal quality and improving the photoelectric performance of the deep ultraviolet light-emitting diode.
Alternatively, as shown in FIG. 1, the difference Δ d between the radius of the first AlN layer 2 and the radius of the substrate 1 is 0.1 to 5 mm.
If the difference between the radius of the first AlN layer 2 and the radius of the substrate 1 is too small, a good stress relaxation effect cannot be obtained. If the difference between the radius of the first AlN layer 2 and the radius of the substrate 1 is too large, the probability of fogging of the region left between the outside of the first AlN layer 2 and the surface of the substrate 1 increases.
Optionally, the thickness of the first AlN layer 2 is smaller than the thickness of the second AlN layer 3.
The first AlN layer is grown by adopting a PVD method, and the thickness of the first AlN layer is thinner, so that a film with better crystallization quality can be formed and used as a growth substrate of the second AlN layer. The second AlN layer serves as a buffer layer, mainly serving to reduce dislocation, and thus, the second AlN layer is provided thicker.
Optionally, the thickness of the first AlN layer 2 is 1 to 100 nm.
If the thickness of the first AlN layer 2 is too thin, it does not function as a good base to improve the crystal quality of the second AlN layer. If the thickness of the first AlN layer 2 is excessively thick, defects are easily generated, resulting in poor crystal quality.
Optionally, the thickness of the second AlN layer 3 is 2-3 um.
If the thickness of the second AlN layer 3 is too thin, it does not function well to reduce dislocation defects. If the thickness of the second AlN layer 3 is excessively thick, defects are likely to further occur, resulting in poor crystal quality.
In the disclosed embodiment, the first AlN layer 2 is grown in a low-temperature and low-pressure environment, and the second AlN layer 3 is grown in a high-temperature and high-pressure environment.
Optionally, the substrate is a flat sheet substrate. Such as a sapphire substrate, a silicon wafer, or a silicon carbide substrate.
Optionally, the N-type layer 4 is an AlGaN layer doped with silane, and the thickness of the N-type layer 63 is 500 to 2000 nm.
Optionally, the active layer 5 includes quantum well layers and quantum barrier layers alternately grown in 3-15 periods, where the quantum well layers are AlxGa1-xN/AlyGa1-yN(x<y) layer, quantum barrier layer is AlyGa1-yAnd N layers.
Illustratively, the thickness of the quantum well layer is 2-5 nm, and the thickness of the quantum barrier layer is 8-12 nm.
Optionally, the electron blocking layer 6 is a P-type AlGaN layer doped with Mg, and the thickness is 5 to 50 nm.
Optionally, the P-type layer 7 is a P-type AlGaN layer doped with Mg, and the thickness is 10 to 500 nm.
Optionally, the P-type contact layer 8 is P-type AlGaN doped with Mg, and the thickness is 10 to 100 nm.
In one specific implementation of the deep-uv led epitaxial wafer shown in fig. 1, the difference Δ d between the radius of the first AlN layer 2 and the radius of the substrate 1 of the epitaxial wafer is 3 mm. The thickness of the first AlN layer 2 was 50 nm. The thickness of the second AlN layer 3 is 2 um.
Illustratively, the substrate 1 is a sapphire flat sheet substrate.
Illustratively, the N-type layer 4 is a silane-doped AlGaN layer, and the thickness of the N-type layer 63 is 700 nm.
Illustratively, the active layer 5 includes 5 periods of alternately grown quantum well layers and quantum barrier layers, wherein the quantum well layers are AlxGa1-xN/AlyGa1-yN(x<y) layer, quantum barrier layer is AlyGa1-yAnd N layers.
Illustratively, the quantum well layer is 3nm thick and the quantum barrier layer is 11nm thick.
Illustratively, the electron blocking layer 6 is a P-type AlGaN layer doped with Mg and having a thickness of 10 nm.
Illustratively, the P-type layer 7 is a Mg-doped P-type AlGaN layer with a thickness of 25 nm.
Illustratively, the P-type contact layer 8 is Mg-doped P-type AlGaN with a thickness of 50 nm.
In another specific implementation of the deep-uv led epitaxial wafer shown in fig. 1, the difference Δ d between the radius of the first AlN layer 2 and the radius of the substrate 1 of the epitaxial wafer is 4 mm. The thickness of the first AlN layer 2 was 60 nm. The thickness of the second AlN layer 3 is 2.5 um.
Illustratively, the substrate 1 is a sapphire flat sheet substrate.
Illustratively, the N-type layer 4 is a silane-doped AlGaN layer, and the thickness of the N-type layer 63 is 750 nm.
Illustratively, the active layer 5 includes 8 periods of quantum well layers and quantum barrier layers alternately grown, wherein the quantum well layers are AlxGa1-xN/AlyGa1-yN(x<y) layer, quantum barrier layer is AlyGa1-yAnd N layers.
Illustratively, the quantum well layer is 3nm thick and the quantum barrier layer is 10nm thick.
Illustratively, the electron blocking layer 6 is a P-type AlGaN layer doped with Mg and has a thickness of 20 nm.
Illustratively, the P-type layer 7 is a Mg-doped P-type AlGaN layer with a thickness of 50 nm.
Illustratively, the P-type contact layer 8 is Mg-doped P-type AlGaN with a thickness of 50 nm.
In yet another specific implementation of the deep-uv led epitaxial wafer shown in fig. 1, the difference Δ d between the radius of the first AlN layer 2 and the radius of the substrate 1 of the epitaxial wafer is 2 mm. The thickness of the first AlN layer 2 was 80 nm. The thickness of the second AlN layer 3 is 2.5 um.
Illustratively, the substrate 1 is a sapphire flat sheet substrate.
Illustratively, the N-type layer 4 is a silane-doped AlGaN layer, and the thickness of the N-type layer 63 is 600 nm.
Illustratively, the active layer 5 includes 7 quantum well layers and quantum barrier layers alternately grown for 7 periods, wherein the quantum well layers are AlxGa1-xN/AlyGa1-yN(x<y) layer, quantum barrier layer is AlyGa1-yAnd N layers.
Illustratively, the quantum well layer is 4nm thick and the quantum barrier layer is 8nm thick.
Illustratively, the electron blocking layer 6 is a P-type AlGaN layer doped with Mg and having a thickness of 30 nm.
Illustratively, the P-type layer 7 is a Mg-doped P-type AlGaN layer with a thickness of 90 nm.
Illustratively, the P-type contact layer 8 is Mg-doped P-type AlGaN with a thickness of 60 nm.
Fig. 2 is a flowchart of a method for manufacturing a deep ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 2, the method includes:
Alternatively, the substrate may be a flat sheet substrate, such as a sapphire substrate, a silicon wafer, or a silicon carbide substrate.
And step 204, growing a second AlN layer on the first AlN layer by using an MOCVD method.
And 205, sequentially growing an N-type layer, an active layer, an electron blocking layer, a P-type layer and a P-type contact layer on the second AlN layer.
According to the embodiment of the disclosure, the first AlN layer and the second AlN layer are arranged between the substrate and the N-type layer, so that the first AlN layer and the second AlN layer can play a buffering role, and the generation of dislocation is reduced. The first AlN layer is obtained by deposition through a physical vapor deposition method, and the formed first AlN layer has smaller and more uniform AlN particles and better C-axis orientation. The second AlN layer is grown on the first AlN layer, which is advantageous in forming a crystal of superior crystal quality, so that the crystal quality can be improved. Meanwhile, the radius of the first AlN layer is smaller than that of the substrate, so that when a subsequent epitaxial layer grows, a region which is left between the outer side of the first AlN layer and the surface of the substrate can be used as a stress release region to effectively release stress, thereby being beneficial to inhibiting the generation of cracks in the AlN growth process, further improving the crystal quality and improving the photoelectric performance of the deep ultraviolet light-emitting diode.
Fig. 3 is a flowchart of another manufacturing method of a deep ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 3, the manufacturing method includes:
Alternatively, the substrate may be a flat sheet substrate, such as a sapphire substrate, a silicon wafer, or a silicon carbide substrate.
Illustratively, the diameter of the substrate is 50 mm.
Optionally, the thickness of the first AlN layer is 1-100 nm.
If the first AlN layer is too thin, it may not serve as a good base to improve the crystal quality of the second AlN layer. If the thickness of the first AlN layer is too thick, defects are easily generated, resulting in poor crystal quality.
Illustratively, step 302 may include:
and placing the substrate into PVD equipment, controlling the temperature of a reaction chamber of the PVD equipment to be 600 ℃, the pressure to be 7mTorr, the sputtering power to be 4000W, the flow rates of introduced nitrogen and argon to be 150sccm and 80sccm respectively, and the growth time to be 50s, and depositing a first AlN layer on the substrate.
In the embodiment of the disclosure, the first AlN layer is grown in a low-temperature and low-pressure environment, and the crystal quality of the grown first AlN layer can be ensured.
Illustratively, step 303 may include:
and processing the first AlN layer by adopting a photoetching technology and an etching technology, removing part of the edge area of the first AlN layer along the circumferential direction of the first AlN layer, and exposing the surface of the substrate.
Optionally, the difference Δ d between the radius of the first AlN layer and the radius of the substrate is 0.1 to 5 mm.
If the difference between the radius of the first AlN layer and the radius of the substrate is too small, a good stress relaxation effect may not be obtained. If the difference between the radius of the first AlN layer and the radius of the substrate is too large, the probability of fogging of the region left between the outside of the first AlN layer and the surface of the substrate increases.
Alternatively, the etching technique may be one of a wet etching technique or a plasma etching technique, and may be implemented in various ways.
In the disclosed embodiments, the radius of the first AlN layer may be reduced to 49 mm.
And step 304, growing a second AlN layer on the first AlN layer by using an MOCVD method.
Optionally, the thickness of the second AlN layer is 2-3 um.
If the thickness of the second AlN layer is too thin, it does not function well to reduce dislocation defects. If the thickness of the second AlN layer is too thick, defects are likely to further occur, resulting in poor crystal quality.
Illustratively, step 304 may include:
and putting the first AlN sublayer into MOCVD equipment, controlling the temperature of a reaction chamber of the MOCVD equipment to be 1350 ℃ and the pressure to be 150mbar, and growing a second AlN sublayer with the thickness of 2.5 microns on the first AlN sublayer.
In the embodiment of the disclosure, the second AlN layer is grown under a high-temperature and high-pressure environment, which can ensure the crystal quality of the grown second AlN layer.
Wherein the N-type layer is an AlGaN layer doped with Si, and the thickness of the N-type layer is 500-2000 nm.
In this embodiment, a Veeco K465i or C4 or RB MOCVD apparatus may be used to implement the method for manufacturing the epitaxial wafer. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As the nitrogen source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium source, silane (SiH4) as N-type dopant, i.e., Si source, trimethyl aluminum (TMAl) as aluminum source, and magnesium diclocide (CP)2Mg) as a P-type dopant, i.e., a Mg source. The control of the temperature and the pressure refers to the control of the temperature and the pressure in a reaction chamber for growing the epitaxial wafer.
Illustratively, step 305 may include:
and controlling the temperature of the reaction chamber to 1060 ℃ and the pressure to be 100mbar, and growing a silane-doped n-type AlGaN layer with the thickness of 700 nm.
Optionally, the active layer 5 includes quantum well layers and quantum barrier layers alternately grown in 3-15 periods, where the quantum well layers are AlxGa1-xN/AlyGa1-yN(x<y) layer, quantum barrier layer is AlyGa1-yAnd N layers.
Illustratively, the thickness of the quantum well layer is 2-5 nm, and the thickness of the quantum barrier layer is 8-12 nm.
Optionally, step 306 may include:
the temperature of the reaction chamber is controlled at 1040 ℃, the pressure is controlled at 150mbar, and the active layer is grown on the N-type layer.
The electron blocking layer is a P-type AlGaN layer doped with Mg, and the thickness of the electron blocking layer is 5-50 nm.
Illustratively, step 307 may comprise:
controlling the temperature of the reaction chamber to be 980 ℃ and the pressure to be 150mbar, and growing an electron blocking layer with the thickness of 10nm on the active layer.
Wherein the P-type layer is a P-type AlGaN layer doped with Mg, and the thickness of the P-type AlGaN layer is 10-500 nm.
Illustratively, step 308 may include:
controlling the temperature of the reaction chamber at 900 ℃ and the pressure at 200mbar, and growing a P-type layer with the thickness of 25nm on the electron blocking layer.
Step 309 grows a P-type contact layer on the P-type layer.
Wherein the P-type contact layer is Mg-doped P-type AlGaN and has a thickness of 10-100 nm.
Illustratively, step 309 may include:
controlling the temperature of the reaction chamber at 850 ℃ and the pressure at 300mbar, and growing a P-type contact layer with the thickness of 50nm on the P-type layer.
After the completion of the epitaxial growth, the temperature is first lowered to 650 to 850 ℃, the epitaxial wafer is annealed in a nitrogen atmosphere for 30 minutes, and then the temperature of the epitaxial wafer is lowered to room temperature.
According to the embodiment of the disclosure, the first AlN layer and the second AlN layer are arranged between the substrate and the N-type layer, so that the first AlN layer and the second AlN layer can play a buffering role, and the generation of dislocation is reduced. The first AlN layer is obtained by deposition through a physical vapor deposition method, and the formed first AlN layer has smaller and more uniform AlN particles and better C-axis orientation. The second AlN layer is grown on the first AlN layer, which is advantageous in forming a crystal of superior crystal quality, so that the crystal quality can be improved. Meanwhile, the radius of the first AlN layer is smaller than that of the substrate, so that when a subsequent epitaxial layer grows, a region which is left between the outer side of the first AlN layer and the surface of the substrate can be used as a stress release region to effectively release stress, thereby being beneficial to inhibiting the generation of cracks in the AlN growth process, further improving the crystal quality and improving the photoelectric performance of the deep ultraviolet light-emitting diode.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," "third," and similar terms in the description and claims does not indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprise" or "comprises", and the like, means that the element or item listed before "comprises" or "comprising" covers the element or item listed after "comprising" or "comprises" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", "top", "bottom", and the like are used merely to indicate relative positional relationships, which may also change accordingly when the absolute position of the object being described changes.
Although the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure.
Claims (10)
1. The deep ultraviolet light-emitting diode epitaxial wafer is characterized by comprising a substrate, and a first AlN layer, a second AlN layer, an N-type layer, an active layer, an electron blocking layer, a P-type layer and a P-type contact layer which are sequentially laminated on the substrate;
the radius of the first AlN layer is smaller than that of the substrate, the first AlN layer is obtained by deposition through a physical vapor deposition method, and the second AlN layer is grown through a metal organic compound chemical vapor deposition method.
2. The deep ultraviolet light emitting diode epitaxial wafer as claimed in claim 1, wherein the difference between the radius of the first AlN layer and the radius of the substrate is 0.1 to 5 mm.
3. The deep ultraviolet light emitting diode epitaxial wafer of claim 1, wherein the thickness of the first AlN layer is less than the thickness of the second AlN layer.
4. The deep ultraviolet light emitting diode epitaxial wafer as claimed in claim 3, wherein the thickness of the first AlN layer is 1 to 100 nm.
5. The deep ultraviolet light emitting diode epitaxial wafer of claim 3, wherein the thickness of the second AlN layer is 2-3 um.
6. A manufacturing method of a deep ultraviolet light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
depositing a first AlN layer on the substrate by adopting a physical vapor deposition method;
processing the first AlN layer to enable the radius of the first AlN layer to be smaller than that of the substrate;
growing a second AlN layer on the first AlN layer by adopting a metal organic compound chemical vapor deposition method;
and sequentially growing an N-type layer, an active layer, an electron blocking layer, a P-type layer and a P-type contact layer on the second AlN layer.
7. The manufacturing method according to claim 6, wherein the processing the first AlN layer includes:
and processing the first AlN layer by adopting a photoetching technology and an etching technology, removing part of the edge area of the first AlN layer along the circumferential direction of the first AlN layer, and exposing the surface of the substrate.
8. The manufacturing method according to claim 6, wherein a difference between a radius of the first AlN layer and a radius of the substrate is 0.1 to 5 mm.
9. The manufacturing method according to claim 6, characterized in that the growth temperature of the first AlN layer is lower than the growth temperature of the second AlN layer.
10. The method according to claim 9, wherein the growth temperature of the first AlN layer is 500 to 700 ℃ and the growth temperature of the second AlN layer is 1200 to 1400 ℃.
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Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103824854A (en) * | 2014-02-22 | 2014-05-28 | 石以瑄 | Exchange circuit and microwave integrated circuit which have improved line width evenness and fewer defects in channel and are based on high-electron-mobility transistor |
| CN104103720A (en) * | 2014-07-24 | 2014-10-15 | 安徽三安光电有限公司 | Method for preparing nitride semiconductor |
| WO2017121232A1 (en) * | 2016-01-15 | 2017-07-20 | 厦门市三安光电科技有限公司 | Nitride substrate and method for producing the same |
| US20180083108A1 (en) * | 2016-09-19 | 2018-03-22 | Genesis Photonics Inc. | Nitrogen-containing semiconductor device |
| CN108336203A (en) * | 2017-12-29 | 2018-07-27 | 华灿光电(苏州）有限公司 | A kind of gallium nitride based LED epitaxial slice and its manufacturing method |
| US20190074403A1 (en) * | 2016-05-02 | 2019-03-07 | Nikkiso Co., Ltd | Deep ultraviolet light emitting device and method of manufacturing deep ultraviolet light emitting device |
| CN109786525A (en) * | 2018-12-10 | 2019-05-21 | 华灿光电（浙江）有限公司 | A kind of manufacturing method of LED epitaxial slice |
| CN111509093A (en) * | 2020-04-24 | 2020-08-07 | 苏州紫灿科技有限公司 | AlN thin film with gradual change insertion layer and preparation method thereof |
| CN212161845U (en) * | 2020-04-01 | 2020-12-15 | 河源市众拓光电科技有限公司 | Vertical structure LED chip of whole-surface reflector |
| US20210087705A1 (en) * | 2017-07-26 | 2021-03-25 | Siltronic Ag | Epitaxially coated semiconductor wafer of monocrystalline silicon and method for production thereof |
-
2021
- 2021-09-30 CN CN202111160679.7A patent/CN114093989B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103824854A (en) * | 2014-02-22 | 2014-05-28 | 石以瑄 | Exchange circuit and microwave integrated circuit which have improved line width evenness and fewer defects in channel and are based on high-electron-mobility transistor |
| CN104103720A (en) * | 2014-07-24 | 2014-10-15 | 安徽三安光电有限公司 | Method for preparing nitride semiconductor |
| WO2017121232A1 (en) * | 2016-01-15 | 2017-07-20 | 厦门市三安光电科技有限公司 | Nitride substrate and method for producing the same |
| US20190074403A1 (en) * | 2016-05-02 | 2019-03-07 | Nikkiso Co., Ltd | Deep ultraviolet light emitting device and method of manufacturing deep ultraviolet light emitting device |
| US20180083108A1 (en) * | 2016-09-19 | 2018-03-22 | Genesis Photonics Inc. | Nitrogen-containing semiconductor device |
| CN113451468A (en) * | 2016-09-19 | 2021-09-28 | 新世纪光电股份有限公司 | Nitrogen-containing semiconductor element |
| US20210087705A1 (en) * | 2017-07-26 | 2021-03-25 | Siltronic Ag | Epitaxially coated semiconductor wafer of monocrystalline silicon and method for production thereof |
| CN108336203A (en) * | 2017-12-29 | 2018-07-27 | 华灿光电(苏州）有限公司 | A kind of gallium nitride based LED epitaxial slice and its manufacturing method |
| CN109786525A (en) * | 2018-12-10 | 2019-05-21 | 华灿光电（浙江）有限公司 | A kind of manufacturing method of LED epitaxial slice |
| CN212161845U (en) * | 2020-04-01 | 2020-12-15 | 河源市众拓光电科技有限公司 | Vertical structure LED chip of whole-surface reflector |
| CN111509093A (en) * | 2020-04-24 | 2020-08-07 | 苏州紫灿科技有限公司 | AlN thin film with gradual change insertion layer and preparation method thereof |
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