CN104091780A - Self-alignment STI forming method - Google Patents
Self-alignment STI forming method Download PDFInfo
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- CN104091780A CN104091780A CN201410357232.2A CN201410357232A CN104091780A CN 104091780 A CN104091780 A CN 104091780A CN 201410357232 A CN201410357232 A CN 201410357232A CN 104091780 A CN104091780 A CN 104091780A
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- layer
- shallow trench
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
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Abstract
The invention discloses a self-alignment STI forming method. The method comprises the steps that a silicon nitride layer grows on the side wall of a shallow trench after an oxide layer grows on the side wall of the shallow trench through a traditional technology, then the shallow trench is filled, and annealing is carried out. According to the self-alignment STI forming method, due to the fact that the silicon nitride layer with the more compact and stable structure additionally grows on the side wall of the shallow trench, water vapor or oxygen molecules can be effectively prevented from diffusing, the water vapor is stopped by the compact silicon nitride layer during the following process of annealing, the phenomenon that silicon oxide is generated during a reaction among the water vapor, a silicon substrate and a polycrystalline silicon floating gate is avoided, it is ensured that tunneling silicon oxide layer edge thickness is not increased, and the product quality and reliability are ensured.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, relate in particular to the formation method of new autoregistration STI a kind of.
Background technology
Along with semiconductor technology enters the deep-submicron epoch, element below 0.13 μ m is for example in cmos device, isolation between nmos pass transistor and PMOS transistor all adopts STI (Shallow Trench Isolation, shallow trench isolation from) technique to form.
The formation method of traditional STI generally includes the following step: first, provide semiconductor base, form etching barrier layer on semiconductor base; Then, on described etching barrier layer, form light mask pattern, the subregion of described etching barrier layer is exposed; Semiconductor base to etching barrier layer and etching barrier layer lower floor carries out etching, in described etching barrier layer and described semiconductor base, forms V-groove; Then, in described groove, fill dielectric, form STI.
In Flash Product Process is manufactured, STI corner (bight) has a significant impact device performance.If corner too point or oxide recess (oxidation trough) crosses conference and causes electric field to be assembled, component failure.In order to reduce the impact of STI corner on device, conventional solution is from (Self-aligned STI) technology with autoregistration shallow trench isolation.
Autoregistration STI technology is more and more extensive in Flash product, and this technology has the features such as the good uniformity of simple, the high grid oxygen reliability of processing step (high reliability of the gate oxide), the not overlapping groove of gate electrode, groove width (channel width).Autoregistration STI technology provides low cost, high reliability, high storage density and the good integrated technique of voltage degree of coupling for flash memory manufacture.
Generally speaking, the structure of Flash flash cell (Cell) comprises tunnel oxide silicon (Tunnel Oxide), multi-crystal silicon floating bar (Poly-Si Floating Gate, FG in Fig. 1), ONO layer (silicon oxide/silicon nitride/silicon oxide) and control grid layer (Control Gate, CG in Fig. 1), as shown in Figure 1.Wherein, (erase/Program) speed of wiping/write that the thickness of tunnel oxide is preserved (Date Retention) and data to data has important impact.And in autoregistration STI technology, tunnel oxide is grow first, how to reduce the impact of subsequent process on tunnel oxide layer thickness and quality, have great importance.
The formation method of existing autoregistration STI comprises the following steps:
Step a, on N trap (N-well) substrate 51 doped with phosphorus, grow successively tunnel oxide silicon 52, multi-crystal silicon floating bar 53, silicon nitride 54, as shown in Figure 2 a.Wherein, tunnel oxide silicon layer adopts high temperature thermal oxidation metallization processes or the preparation of ISSG (In-Situ Steam Generation) technique, then uses N
2o annealing; Multi-crystal silicon floating bar layer adopts boiler tube low-pressure chemical vapor deposition process; Silicon nitride adopts boiler tube low-pressure chemical vapor deposition process.
Step b, forms shallow trench 6 as shown in Figure 2 b by photoetching and etching (etch silicon nitride layer, polysilicon layer, tunnel oxide silicon layer and silicon substrate successively).
Step c, by RTP (Rapid Thermal Process) technique or ISSG growth shallow trench sidewall oxide 7, as shown in Figure 2 c.
Steps d, fills 8 by HARP (High Aspect Ratio Deposition) technique to shallow trench, anneals, as shown in Figure 2 d after filling again.
But, in above-mentioned existing method, in the annealing of the HARP of steps d technique, there is steam annealing (steam anneal) step, the object of this step is the ability of removing space (void) in HARP technique for improving, conventionally adopt and improve annealing temperature method and realize that (temperature is higher, it is better that effect is improved in space), the temperature of general steam annealing is greater than 600 DEG C, and the time of steam annealing is generally greater than 30 minutes.But steam can spread in HARP technique, makes it penetrate shallow trench sidewall oxide, at high temperature with pasc reaction.That is to say, steam can consume silicon substrate and multi-crystal silicon floating bar and generate silicon dioxide, thereby causes tunnel oxide silicon marginal portion thickening, and as shown in dashed circle A in Fig. 2 d, tunnel oxide silicon degradation, has a strong impact on the reliability of product.
Summary of the invention
In order to realize goal of the invention of the present invention, the invention provides the formation method of autoregistration STI a kind of, with solving the technical problem that prior art can make tunnel oxide silicon edge thickening, affect product quality.
The formation method of autoregistration STI provided by the invention comprises the following steps:
Step S01, provides semi-conductive substrate, and on substrate, grow successively tunnel oxide silicon layer, multi-crystal silicon floating bar layer and silicon nitride layer;
Step S02, utilizes photoetching process to form mask graph, and etch silicon nitride layer, multi-crystal silicon floating bar layer, tunnel oxide silicon layer and substrate successively, forms shallow trench;
Step S03, growth shallow trench sidewall oxide;
Step S04, the shallow trench sidewall silicon nitride layer of growing on this oxide layer;
Step S05, fills shallow trench, and annealing, and autoregistration STI forms.
Further, step S04 adopts the atomic layer deposition method (Atom layer Deposition) of boiler tube.
Further, in step S04, technological temperature is 450-550 DEG C, and reacting special gas is presoma DCS (dichloro-dihydro silicon) and NH
3.
Further, step S04 is by forming the repeatedly reaction time that comprises four steps, and this four step comprises successively and passes into NH
3special gas, N
2purify purge, pass into the special gas of DCS, N
2purify purge.
Further, be 40-60 this reaction time, and growth thickness is
Further, the special gas of this reaction is passed in boiler tube by cell quartz pipe, to improve the uniformity of the special gas of reaction.
Further, in step S01, tunnel oxide silicon layer adopts ISSG (In-Situ Steam Generation, situ steam generates) technique or the preparation of LPRO (low pressure free-radical oxidation) technique, then uses N
2o annealing; Multi-crystal silicon floating bar layer adopts the preparation of boiler tube low-pressure chemical vapor deposition process; Silicon nitride layer adopts the preparation of boiler tube low-pressure chemical vapor deposition process.
Further, step S03 adopts RTP (Rapid Thermal Process, rapid thermal oxidation) or ISSG technique, and growth thickness is
Further, step S05 adopts HARP (High Aspect Ratio Deposition, high-aspect-ratio technique) technique to fill shallow trench.
The formation method of autoregistration STI of the present invention, by increasing and generate one deck silicon nitride layer at shallow trench sidewall, because silicon nitride structure is a nitrogen-atoms three silicon atoms around, silicon dioxide structure than two silicon atoms around an oxygen atom is finer and close, stable, can effectively stop the diffusion of steam or oxygen molecule, while making subsequent technique annealing, steam is stoped by fine and close silicon nitride layer, avoid steam to react with silicon substrate and multi-crystal silicon floating bar and generate silicon dioxide, thereby guarantee no longer thickening of tunnel oxide silicon layer edge thickness, ensure the q&r of product.
Brief description of the drawings
For can clearer understanding objects, features and advantages of the present invention, below with reference to accompanying drawing, preferred embodiment of the present invention is described in detail, wherein:
Fig. 1 is the structural representation of existing Flash flash cell;
Fig. 2 a to 2d is each step structural representation of existing autoregistration STI formation method;
Fig. 3 is the schematic flow sheet of autoregistration STI formation method of the present invention;
Fig. 4 a to 4d is each step structural representation of autoregistration STI formation method of the present invention;
Fig. 5 is the process cycle schematic diagram of grown silicon nitride layer in the inventive method;
Fig. 6 is the sti structure schematic diagram that the inventive method makes.
Embodiment
Please refer to Fig. 3, Fig. 4 a to 4d, the formation method of the autoregistration STI of the present embodiment comprises the following steps:
Step S01, provides a N trap substrate 11 doped with phosphorus, and on substrate 11, grow successively tunnel oxide silicon layer 12, multi-crystal silicon floating bar layer 13 and silicon nitride layer 14, as shown in Fig. 4 a.
Step S02, utilizes photoetching process to form mask graph, and etch silicon nitride layer 14, multi-crystal silicon floating bar layer 13, tunnel oxide silicon layer 12 and substrate 11 successively, forms shallow trench 2, as shown in Figure 4 b.
Step S03, growth shallow trench sidewall oxide 31.
Step S04, the shallow trench sidewall silicon nitride layer 32 of growing on this sidewall oxide 31, as shown in Fig. 4 c.
Step S05, fills shallow trench 2, and annealing, and autoregistration sti structure forms.
The present invention is by increasing and generate one deck silicon nitride layer at shallow trench sidewall, because silicon nitride structure is a nitrogen-atoms three silicon atoms around, silicon dioxide structure than two silicon atoms around an oxygen atom is finer and close, stable, can effectively stop the diffusion of steam or oxygen molecule, while making subsequent technique annealing, steam is stoped by fine and close silicon nitride layer, avoid steam to react with silicon substrate and multi-crystal silicon floating bar and generate silicon dioxide, thereby guarantee no longer thickening of tunnel oxide silicon layer edge thickness, ensured the q&r of product.
Particularly, step S04 preferably adopts the atomic layer deposition method (Atom layer Deposition) of boiler tube, the sidewall silicon nitride layer of growing by this technique can effectively ensure the even thickness degree of silicon nitride layer, it is the sidewall silicon nitride layer consistency of thickness of each position of shallow trench, improve the effect that intercepts steam, in other embodiments, also can generate sidewall silicon nitride layer by other existing technique.Preferably, the atomic layer deposition method design parameter of this step is as follows:
Technological temperature: 450-550 DEG C;
React special gas: presoma DCS (dichloro-dihydro silicon) and NH
3;
Reaction equation: DCS+NH
3→ Si
3n
4+ accessory substance;
Reaction time: pass into NH
3special gas → N
2purify the special gas → N of purge → pass into DCS
2purify purge.
Wherein, as shown in Figure 5, each cycle is made up of above-mentioned four steps, and the sidewall silicon nitride layer thickness of generation can regulate by number reaction time.In actual applications, the thickness of shallow trench sidewall silicon nitride layer can not be too thin, the too thin steam that can not effectively intercept; Silicon nitride layer thickness also can not be too thick, the too thick difficulty that can increase HARP filling, and the space that easily produces groove, affects device quality.Therefore, the preferred thickness range of sidewall silicon nitride layer is
can be 40-60 corresponding reaction time.Wherein, the total time of each reaction time is about 40 seconds, and in four steps, the time of each step is about 10 seconds.
Wherein, in order to improve the uniformity of the special gas of reaction, improve the silicon nitride layer thickness evenness of deposition, reacting special gas can be passed in boiler tube by cell quartz pipe, and effect is better than the single hole quartz ampoule of the low-pressure chemical vapor deposition of traditional boiler tube.
In the present embodiment, adopt the N trap substrate doped with phosphorus, in actual applications, the present invention can be applicable to other conventional substrates, does not repeat them here.In the present embodiment, in step S01, tunnel oxide silicon layer can adopt ISSG (In-Situ Steam Generation, situ steam generates) technique or the preparation of LPRO (low pressure free-radical oxidation) technique, then uses N
2o annealing; Multi-crystal silicon floating bar layer adopts the preparation of boiler tube low-pressure chemical vapor deposition process; Silicon nitride layer adopts the preparation of boiler tube low-pressure chemical vapor deposition process; Step S03 adopts RTP (Rapid Thermal Process, rapid thermal oxidation) or ISSG technique, and growth thickness is preferably
step S05 adopts HARP (High Aspect Ratio Deposition, high-aspect-ratio technique) technique to fill shallow trench.Wherein, the concrete technology parameter of above-mentioned steps can be with reference to this area conventional means.
The autoregistration sti structure making by the present embodiment method as shown in Figure 6, by the sidewall silicon nitride layer thickness homogeneous of boiler tube atomic layer deposition method growth, shallow trench does not cause the increase of tunnel oxide silicon layer edge thickness after filling, and has ensured the q&r of device.
Claims (9)
1. a formation method of autoregistration STI, is characterized in that, it comprises the following steps:
Step S01, provides semi-conductive substrate, and on substrate, grow successively tunnel oxide silicon layer, multi-crystal silicon floating bar layer and silicon nitride layer;
Step S02, utilizes photoetching process to form mask graph, and etch silicon nitride layer, multi-crystal silicon floating bar layer, tunnel oxide silicon layer and substrate successively, forms shallow trench;
Step S03, growth shallow trench sidewall oxide;
Step S04, the shallow trench sidewall silicon nitride layer of growing on this oxide layer;
Step S05, fills shallow trench, and annealing, and autoregistration STI forms.
2. the formation method of autoregistration STI according to claim 1, is characterized in that: step S04 adopts the atomic layer deposition method of boiler tube.
3. the formation method of autoregistration STI according to claim 2, is characterized in that: in step S04, technological temperature is 450-550 DEG C, and reacting special gas is presoma DCS and NH
3.
4. the formation method of autoregistration STI according to claim 3, is characterized in that: step S04 is by forming the repeatedly reaction time that comprises four steps, and this four step comprises successively and passes into NH
3special gas, N
2purify purge, pass into the special gas of DCS, N
2purify purge.
5. the formation method of autoregistration STI according to claim 4, is characterized in that: be 40-60 this reaction time, and growth thickness is
6. according to the formation method of the autoregistration STI described in claim 1 to 5 any one, it is characterized in that: the special gas of this reaction is passed in boiler tube by cell quartz pipe, to improve the uniformity of the special gas of reaction.
7. the formation method of autoregistration STI according to claim 6, is characterized in that: in step S01, tunnel oxide silicon layer adopts ISSG technique or the preparation of LPRO technique, then uses N
2o annealing; Multi-crystal silicon floating bar layer adopts the preparation of boiler tube low-pressure chemical vapor deposition process; Silicon nitride layer adopts the preparation of boiler tube low-pressure chemical vapor deposition process.
8. the formation method of autoregistration STI according to claim 6, is characterized in that: step S03 adopts RTP or ISSG technique, and growth thickness is
9. the formation method of autoregistration STI according to claim 6, is characterized in that: step S05 adopts HARP technique to fill shallow trench.
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| CN201410357232.2A CN104091780A (en) | 2014-07-25 | 2014-07-25 | Self-alignment STI forming method |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106024699A (en) * | 2016-05-30 | 2016-10-12 | 上海华力微电子有限公司 | Preparation method for self-alignment STI (shallow trench isolation) |
| CN107660307A (en) * | 2015-06-26 | 2018-02-02 | 应用材料公司 | The selective deposition of silicon oxide film |
| CN110164761A (en) * | 2019-05-28 | 2019-08-23 | 上海华力微电子有限公司 | The preparation method of tunnel oxide |
| CN111106057A (en) * | 2019-11-18 | 2020-05-05 | 华虹半导体(无锡)有限公司 | Method for manufacturing STI (shallow trench isolation) structure of flash memory device and flash memory device |
-
2014
- 2014-07-25 CN CN201410357232.2A patent/CN104091780A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107660307A (en) * | 2015-06-26 | 2018-02-02 | 应用材料公司 | The selective deposition of silicon oxide film |
| KR20180014204A (en) * | 2015-06-26 | 2018-02-07 | 어플라이드 머티어리얼스, 인코포레이티드 | Selective Deposition of Silicon Oxide Films |
| CN107660307B (en) * | 2015-06-26 | 2021-11-05 | 应用材料公司 | Selective deposition of silicon oxide films |
| KR102377376B1 (en) | 2015-06-26 | 2022-03-21 | 어플라이드 머티어리얼스, 인코포레이티드 | Selective Deposition of Silicon Oxide Films |
| CN106024699A (en) * | 2016-05-30 | 2016-10-12 | 上海华力微电子有限公司 | Preparation method for self-alignment STI (shallow trench isolation) |
| CN106024699B (en) * | 2016-05-30 | 2019-04-05 | 上海华力微电子有限公司 | A kind of preparation method of autoregistration STI |
| CN110164761A (en) * | 2019-05-28 | 2019-08-23 | 上海华力微电子有限公司 | The preparation method of tunnel oxide |
| CN111106057A (en) * | 2019-11-18 | 2020-05-05 | 华虹半导体(无锡)有限公司 | Method for manufacturing STI (shallow trench isolation) structure of flash memory device and flash memory device |
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