CN104079246B - Low power consumption high slew rate high gain bandwidth product fully differential operational amplifier - Google Patents
Low power consumption high slew rate high gain bandwidth product fully differential operational amplifier Download PDFInfo
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- CN104079246B CN104079246B CN201410221940.3A CN201410221940A CN104079246B CN 104079246 B CN104079246 B CN 104079246B CN 201410221940 A CN201410221940 A CN 201410221940A CN 104079246 B CN104079246 B CN 104079246B
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Abstract
The invention discloses a low power consumption high slew rate high gain bandwidth product fully differential operational amplifier. An operational amplifier circuit adopts an input stage current extraction structure and partially extracts currents inside a load pipe through an active current mirror to reduce the effective resistance of the operational amplifier; slew rate enhancing circuits are in parallel connection with bilateral sides of a main operational amplifier to enhance the slew rate of output signals; an output stage applies a Class-AB output structure. According to the low power consumption high slew rate high gain bandwidth product fully differential operational amplifier, the current mirror is connected to an input end load pipe in a parallel mode, the effect of transconductance reduction is achieved due to adjustment of the breadth length ratio of the current mirror, and accordingly the integral circuit keeps the gain bandwidth product and satisfies the integral modulator required level under the condition that the power consumption is reduced and a feedforward structure is connected to the operational amplifier in a parallel mode to inject compensating current for the load to increase the slew rate of the output signals when the operational amplifier is in a working state and transient state power consumption is not consumed excessively.
Description
Technical field
The invention belongs to Analogous Integrated Electronic Circuits technical field and in particular to a kind of low-power consumption high Slew Rate high gain-bandwidth amass
Full differential operational amplifier.
Background technology
Portable electric appts of all kinds are just moving towards huge numbers of families and each industrial application now.Data converter
As the interface between analog signal and data signal, demand is increasing.δ-modulator can be realized exclusive high-precision
Degree, application is widely.In δ-modulator, in integrator, the design of amplifier is most important, especially the amplifier of prime,
The contribution that the noise that it produces exports overall noise to modulator is maximum.
Amplifier is applied in δ-modulator, as the work of first order integrator.The finite d c gain of amplifier in integrator
Cause static error, limited gbw (gain bandwidth product) and sr (slew rate) cause dynamic error, and these errors each mean integrator
Deviation between value after time domain response is stable and ideal value, can be integrated into noise, these noises all result from integrator
Output end.
It will be seen from figure 1 that the static dynamic noise of first order integrator is to the noise transfer function of modulator output end
Closest to straight-through 1, more arrive rear class, static dynamic noise is shaped more severe.Therefore, be also first order integrator noise
Modulator output performance is affected maximum, corresponding design parameter also can be the harshest.From some integrator non-ideal factors reason
Can analyze by result of calculation and draw, the amplifier Slew Rate in first order integrator and gain bandwidth product index request are very high, this
It is the significant challenge in the modulator design of the very fast clock frequency of high voltage.
The operational amplifier commonly used at present has two classes: single stage operational amplifier (as shown in Figure 2) and the miller-compensated fortune of two-stage
Calculate amplifier (as shown in Figure 3).Single stage operational amplifier structure is the simplest, but is intended to realize high-gain and high Slew Rate must have
Very big tail current, is not provided that high-gain and high Slew Rate in the case of low-power consumption, therefore few people use.Two-stage is miller-compensated
Operational amplifier more conventional, design is relatively simple, and gain is very high, and phase margin is also abundant, but its stability requirement is relatively
Big tail current and output stage electric current, this will increase power consumption；Once exigent output Slew Rate, then the electric current of needs is only
Can be bigger.Do not meet the requirement of δ-modulator in this.
Content of the invention
For the above-mentioned technical problem existing for prior art, the invention provides a kind of low-power consumption high Slew Rate high-gain band
Wide long-pending Full differential operational amplifier, by current draw technology, improves gain bandwidth product, reduces power consumption simultaneously, and profit
Increase Slew Rate with slew rate enhancing circuit so that δ-modulator performance big upgrade, effectively reduce system power dissipation.
The Full differential operational amplifier that a kind of high Slew Rate high gain-bandwidth of low-power consumption is amassed, comprising:
Main operation amplifier unit；
Slew Rate enhancement unit, for improving the Slew Rate of main operational amplifier output difference signal；
Common mode feedback unit, for averagely being amplified to described output difference signal, to carry to main operational amplifier
For two-way common-mode voltage feedback signal cmfb1～cmfb2；
Described main operational amplifier extracts skill according to two-way common-mode voltage feedback signal cmfb1～cmfb2, applied current
Art carries out gain amplification to input differential signal in the environment of low-power consumption, obtains described output difference signal.
Described main operation amplifier unit includes 21 mos pipe m1～m21, r1～r4 and two electric capacity of four resistance
C1～c2；Wherein, the source electrode of the source electrode of mos pipe m18 and mos pipe m13, the source electrode of mos pipe m3, the source electrode of mos pipe m5, mos pipe
The source electrode of m6, the source electrode of mos pipe m4, the source electrode of mos pipe m14, the source electrode of mos pipe m19, the drain electrode of mos pipe m7 and mos pipe m8's
Drain electrode connects and connects supply voltage altogether, and the grid of mos pipe m18 is connected with the grid of mos pipe m19 and receives common-mode voltage feedback signal
The drain electrode of cmfb1, mos pipe m18 and the drain electrode of mos pipe m13, the drain electrode of mos pipe m15, the drain electrode of mos pipe m20 and electric capacity c1
One end is connected and produces positive pole output difference signal, the grid of mos pipe m13 and one end of resistance r1, the drain electrode of mos pipe m3, mos
The drain electrode of pipe m5, the drain electrode of mos pipe m1 are connected with the grid of mos pipe m8, the grid phase of the other end of resistance r1 and mos pipe m3
Even, the grid of mos pipe m5 is connected with the grid of mos pipe m6 and receives given bias voltage vbp, the drain electrode of mos pipe m6 and mos
The drain electrode of pipe m4, one end of resistance r2, the grid of mos pipe m14, the grid of mos pipe m7 are connected with the drain electrode of mos pipe m2, resistance
The other end of r2 is connected with the grid of mos pipe m4, the drain electrode of mos pipe m14 and the drain electrode of mos pipe m19, one end of electric capacity c2, mos
The drain electrode of pipe m16 is connected with the drain electrode of mos pipe m21 and produces negative pole output difference signal, the source electrode of mos pipe m7 and mos pipe m9
Drain electrode, the drain electrode of mos pipe m11, the grid of mos pipe m15 be connected with one end of resistance r3, the other end of resistance r3 is managed with mos
The grid of m9 is connected, and the grid of mos pipe m11 is connected with the grid of mos pipe m17 and the grid of mos pipe m12 and receives given inclined
Put voltage vbn, the drain electrode of mos pipe m17 is connected with the source electrode of mos pipe m1 and the source electrode of mos pipe m2, the grid of mos pipe m1 receives
Positive pole input differential signal, the grid of mos pipe m2 receives negative pole input differential signal, and the source electrode of mos pipe m8 is with mos pipe m12's
Drain electrode, the drain electrode of mos pipe m10, the grid of mos pipe m16 are connected with one end of resistance r4, the other end of resistance r4 and mos pipe m10
Grid be connected, the grid of mos pipe m20 is connected with the grid of mos pipe m21 and receives common-mode voltage feedback signal cmfb2, mos
The other end of the source electrode of pipe m20 and electric capacity c1, the source electrode of mos pipe m15, the source electrode of mos pipe m9, the source electrode of mos pipe m11, mos pipe
The source electrode of m17, the source electrode of mos pipe m12, the source electrode of mos pipe m10, the source electrode of mos pipe m16, the source electrode of mos pipe m21 and electric capacity c2
The other end connect altogether and be grounded；Mos pipe m18, m13, m3, m5, m6, m4, m14 and m19 adopt pmos manage, mos pipe m7, m8, m1,
M2, m20, m15, m9, m11, m17, m12, m10, m16 and m21 adopt nmos to manage.
Described Slew Rate enhancement unit includes two pieces of slew rate enhancing circuits, and described slew rate enhancing circuit includes nine mos
Pipe n1～n9；Wherein, the source electrode of the source electrode of mos pipe n7 and mos pipe n5, the source electrode of mos pipe n3, the source electrode of mos pipe n4, mos pipe
The source electrode of the source electrode of n6 and mos pipe n8 connects and connects supply voltage, the grid of the grid of mos pipe n7 and mos pipe n5, mos pipe n5 altogether
Drain electrode, the drain electrode of mos pipe n3 be connected with the drain electrode of mos pipe n1, the positive pole that the drain electrode of mos pipe n7 connects main operation amplifier unit is defeated
Go out end, the grid of mos pipe n1 receives positive pole input differential signal, the source electrode of the source electrode of mos pipe n1 and mos pipe n2 and mos pipe n9
Source electrode be connected, the grid of mos pipe n3 is connected with the grid of mos pipe n4 and receives given reference voltage vref1, mos pipe n9
Grid receive given reference voltage vref2, the source ground of mos pipe n9, the grid of the grid of mos pipe n8 and mos pipe n6,
The drain electrode of mos pipe n6, the drain electrode of mos pipe n4 are connected with the drain electrode of mos pipe n2, and the drain electrode of mos pipe n8 connects main operation amplifier unit
Cathode output end, the grid of mos pipe n2 receives negative pole input differential signal；Mos pipe n3～n8 adopts pmos to manage, mos pipe n1,
N2 and n9 adopts nmos to manage.
Described common mode feedback unit includes q1～q9 and two electric capacity c3～c4 of nine mos pipes；Wherein, mos pipe q1
Source electrode connects and connects supply voltage, the grid of mos pipe q1 altogether with the source electrode of the source electrode, the source electrode of mos pipe q3 and mos pipe q4 of mos pipe q2
Pole is connected and produces common-mode voltage feedback signal with the drain electrode of the drain electrode, the drain electrode of mos pipe q2 and mos pipe q5 of mos pipe q1
The grid of cmfb1, mos pipe q2 receives given bias voltage vbp, the grid of the grid of mos pipe q3 and mos pipe q4, mos pipe q3
Drain electrode be connected with the drain electrode of mos pipe q6, the drain electrode of mos pipe q4 and the drain electrode of mos pipe q7, the drain electrode of mos pipe q8 and mos pipe q7
Grid be connected and produce common-mode voltage feedback signal cmfb2, the source electrode of the source electrode of mos pipe q5 and mos pipe q6 and mos pipe q9's
Drain electrode is connected, and the grid of mos pipe q5 receives given common-mode voltage vcmo, the grid of mos pipe q6 and one end of electric capacity c3 and electricity
The one end holding c4 is connected, the cathode output end of another termination main operation amplifier unit of electric capacity c3, another termination master of electric capacity c4
The cathode output end of operation amplifier unit, the grid of mos pipe q9 is connected with the grid of mos pipe q8 and receives given bias voltage
The source electrode of vbn, mos pipe q9 connects altogether and is grounded with the source electrode of mos pipe q7 and the source electrode of mos pipe q8；Mos pipe q1～q4 adopts pmos
Pipe, mos pipe q5～q9 adopts nmos to manage.
Discharge circuit of the present invention adopts input stage current draw structure, is partly extracted in load pipe using active electric current mirror
Electric current, to reduce its effective resistance；Simultaneously in main amplifier both sides parallel connection slew rate enhancing circuit, for strengthening the pendulum of output signal
Rate, and output stage application class-ab export structure.The present invention first parallel-current in the input load pipe of operational amplifier
Mirror, and the size that calculating current extracts, adjust the breadth length ratio of current mirror as needed so that flowing in the mos pipe of diode-connected
The electric current reduction respective value crossed, and then reduce the effect of mutual conductance, this structure has been also applied in output stage simultaneously.This
Sample integrated circuit maintains the level that gain bandwidth product meets overall modulator requirement under conditions of lower power consumption；Furthermore, examine
Consider the entirety requirement that main circuit is difficult to meet system in Slew Rate.But output stage electricity can not be rolled up under the pressure of power consumption requirements again
, to pipe tail current, therefore on operational amplifier, feed forward architecture in parallel, is negative when amplifier is in running order for stream and input
Carry injecting compensating electric current to increase the Slew Rate using signal, and excessive transient power consumption will not be consumed.
Compared with prior art, the present invention has advantages below and a technique effect:
(1) power consumption is extremely low.Due to employing current draw structure, by exporting in the case that tail current holding is constant
Resistance brings up to 1/ original (1-k) to improve dc gain, and equivalent transconductance gm does not change；In output stage due to taking out
The effect of obtaining current, is keeping can suitably increasing current mirror image ratio under conditions of output stage electric current is constant, thus increasing
Gm, gain and gbw are also improved.In main amplifier, four compensation resistance r1～r4 are mainly used for isolating respective diode connection pipe
The parasitic capacitance of son, is equivalent to introducing zero point on frequency domain, pushes away far secondary limit, increases stablizing of amplifier in the environment of low-power consumption
Property.
(2) Slew Rate of main amplifier is greatly improved.By the lifting of slew rate enhancing circuit, main amplifier Slew Rate is elevated
For original twice, and do not consume excessive extra power consumption, the requirement that therefore can meet δ-σ adc is so as to be operated in place
Distortion will not be produced during reason audio signal, greatly reduce power consumption on the premise of meeting design objective.Emulation shows in amplitude
Under signal input for -4.35db, signal to noise ratio has reached 106.4db, power consumption and quality factor be only respectively 3.86mw and
565.75fj/conversion-step.
Brief description
Fig. 1 be static and dynamic noise to modulator output end noise transfer function schematic diagram.
Fig. 2 is the structural representation of single stage operational amplifier.
Fig. 3 is the structural representation of the miller-compensated operational amplifier of two-stage.
Fig. 4 is the structural representation of Full differential operational amplifier of the present invention.
The structural representation of operation amplifier unit based on Fig. 5.
Fig. 6 is the structural representation of slew rate enhancing circuit.
Fig. 7 is the structural representation of common mode feedback unit.
Fig. 8 is the AC response characteristic Simulation oscillogram with regard to phase place and gain for the first order amplifier.
Fig. 9 is the common mode loop response characteristic simulation waveform with regard to phase place and gain for the first order amplifier.
Specific embodiment
In order to more specifically describe the present invention, below in conjunction with the accompanying drawings and specific embodiment is to technical scheme
It is described in detail.
As shown in figure 4, the Full differential operational amplifier that a kind of high Slew Rate high gain-bandwidth of low-power consumption is amassed, comprising: main amplifier
Unit, two pieces of slew rate enhancing circuits and common mode feedback unit.
Due to the big input and output amplitude of oscillation and fast clock frequency, the gain bandwidth product needed for amplifier and Slew Rate are all very high,
Design difficulty is big.Through amplifier structure compare and literature survey after, amplifier finally adopt one-level current-mirror structure and class-ab
Output, and introduce current draw technology, resnstance transformer and Slew Rate enhancing technology, maximum limit under the requirement meeting design objective
Power consumption is saved on degree ground.
Therefore present embodiment adopts main amplifier cellular construction as shown in Figure 5, one-level current-mirror structure, class-ab exports
Level ensures the positive and negative Slew Rate of identical.Pipe m5 and m6 as current source, from the drain current i to pipe m1 and m2 for the input1Middle extraction
One part of current ki1(0 < k < 1), substantially increases the dc gain of one-level current-mirror structure amplifier, its expression formula such as following formula institute
Show:
Wherein: gm、i1、vgs、vth, λ be respectively the mutual conductance of respective tubes, transient current, gate source voltage, threshold voltage and ditch
The long index of modulation, b1And b2It is respectively corresponding current mirror image ratio.Equivalent transconductance g of amplifier can be obtained from above formulamAnd output
Resistance rout:
In addition, can be obtained by Fig. 5:
i13,15=b1(1-k)i1
Therefore, current draw technology is by bringing up to 1/ original (1-k) to improve dc gain output resistance, and equivalent
Mutual conductance gmDo not change.Now the gain bandwidth product gain bandwidth product expression formula of amplifier is as follows:
Gain bandwidth product is also constant as can be seen here.However, due to the effect extracting electric current, keeping, output stage electric current is constant
Under conditions of can suitably increase b1And b2, to increase gmSo that gain and gain bandwidth product are also improved accordingly.
In this amplifier structure, dominant pole is located at output end, and two limits are located at the drain node of m3 and m9 respectively.?
When design physical circuit, on the one hand as far as possible make to flow through m13, m14 and m15, m16 electric current equal it is ensured that operating point just
Really；On the other hand primary and secondary pole location and output stage electric current to be rationally set, meet the requirement of dc gain and phase margin simultaneously.
Four compensate the parasitic capacitance that resistance r1～r4 is mainly used for isolating respective diode connection pipe, are equivalent to introducing on frequency domain
Zero point, pushes away far secondary limit, increases the stability of amplifier.
The circuit structure of common mode feedback unit is as shown in fig. 7, two electric capacity obtain reality output common mode electrical level, through error
Amplifier feed-back backhauls puts output end.In the idle half period of amplifier, electric capacity two ends are all connected to half supply voltage (common mode
Voltage), refreshed.Error amplifier adopts one-level current-mirror structure, good stability, is not required to miller compensation and speed is fast.Logical
Cross and be connected in parallel on two pipes of amplifier output end upper and lower and fed back, further increase the speed of common-mode feedback.In addition,
Introduce current draw technology in common mode feedback circuit, improve the gain of common mode loop on the premise of not consuming excessive power consumption
And gain bandwidth product.In general, the gain bandwidth product of common mode loop at least will reach the 1/3 of main amplifier.
For the main amplifier structure of Fig. 5, if Slew Rate is brought up to more than 15v/ μ s, the power consumption of consumption will be very
Greatly.In order to solve this problem, many Slew Rates strengthen technology and are suggested.Its basic idea is on the basis of quiescent biasing
Increase dynamic bias circuit.When input amplitude com parison is little, quiet needed for the tail current all pipes of offer of amplifier itself
State electric current, now dynamic bias circuit do not work；After input amplitude exceedes Slew Rate treatable threshold value, dynamic bias circuit is opened
Beginning work, provides extra electric current for amplifier so that amplifier output can respond.One kind simply directly method be exactly
Directly dynamic compensation is carried out to the tail current of amplifier during big signal input, but also increase other while increasing tail current
The electric current of all pipes, it is impossible to reduce power consumption, also can make pipe bear excessive electric current.
In order to avoid the problems referred to above, it is directly a preferably selection to output loading dynamic compensation.Present embodiment adopts
As the slew rate enhancing circuit of Fig. 6 structure, it is divided into upper and lower two parts, this figure is top half.Tail pipe n9 and current draw pipe n3,
The same road current offset such as n4, arranges its breadth length ratio and makes the quiescent current of n3, n4 be slightly smaller than the half of n9.So small-signal
During input, n3, n4 are off state all in linear zone, n7 and n5.When big signal input, such as vin+ is far longer than
Vin-, right current draw pipe n4 are still in linear zone, and n2 enters saturation region, and its drain terminal voltage declines, n3 and n4 turns on, to
Vout+ loads injecting compensating electric current.Meanwhile, the right circuit of the latter half is equally started working, and loads injection to vout-
Compensate electric current；On the contrary, if vin- is far longer than vin+, the right circuit of top half and the left side circuit of the latter half
Start working, compensate output load current.By such mode, Slew Rate is increased, and does not consume excessive transient state work(
Consumption.
This Slew Rate enhancing technology is very general, and being suitable for great majority needs to strengthen the circuit of Slew Rate.Need in design to note
Meaning one be slew rate enhancing circuit cut-in voltage, input swing range in compromise choose, too low there is no need, also can
Increase dynamic power consumption, too high, do not have effect.Another thing to note is the Slew Rate of main amplifier itself nor too little, no
Then easily cause unstable.Additionally, the image ratio being responsible for current mirror such as n3 and n4 of charging stream needs rationally to arrange, ratio is too little,
Compensation effect is inconspicuous；Ratio is too high, easily causes overshoot.Meanwhile, the area of four efferent ducts such as n7, n8 can be designed to little by one
Point, to suppress overshoot phenomenon.
Table 1 is the simulation result of first order amplifier, and emulation load capacitance value used can be by during calculating amplifier work
All electric capacity of output termination are worth to.Can see that DC current gain, gain bandwidth product and the Slew Rate of first order amplifier are satisfied by
Design requirement, the gain bandwidth product of common mode loop has also reached the 1/3 of amplifier.The AC response of amplifier, common mode loop respond such as
Shown in Fig. 8 and Fig. 9.
In input swing range (interval 0.1v) can be seen by the time domain response of amplifier, can preferably more stably ring
Should get up.Curve map is not still very smooth, mainly compensates resistance and leads to.The main amplifier Slew Rate of itself is thus lifted to original two
Times.Make the big lifting of the precision of whole system.
Table 1
Total transient current that amplifier consumes is 206.93ua.Simulation result is above design objective as can be seen from Table 1, this
It is in order at the consideration in process corner, partial results are shown in table 2.Dominant pole due to amplifier is located at output node, therefore electric capacity
Process corner is very big to amplifier performance impact, needs enough design capacities.As can be seen from Table 2 under different process corner,
This amplifier can stablize normal work
Table 2
| Corner (process corner) | Pm (phase margin) | gbw/mhz |
| tt1 | 57.0533 | 54.3022 |
| tt10 | 54.2742 | 77.4528 |
| tt11 | 65.8185 | 56.2049 |
| tt12 | 60.9571 | 66.828 |
| tt13 | 43.7157 | 100.021 |
| tt14 | 59.5422 | 74.6592 |
| tt15 | 50.3297 | 88.5995 |
| tt16 | 49.34 | 87.7744 |
| tt17 | 64.8443 | 65.4561 |
| tt18 | 57.7117 | 75.6282 |
| tt19 | 57.0655 | 46.2625 |
| tt2 | 65.5327 | 41.991 |
| tt20 | 64.3028 | 34.5032 |
| tt21 | 61.0402 | 39.28 |
| tt22 | 58.9564 | 51.2213 |
| tt23 | 68.3688 | 36.9098 |
| tt24 | 64.3986 | 44.0652 |
| tt25 | 58.4969 | 48.5575 |
| tt26 | 66.4667 | 35.4585 |
| tt27 | 63.0686 | 41.4956 |
| tt3 | 61.9406 | 48.1462 |
| tt4 | 56.2162 | 66.9297 |
| tt5 | 68.2637 | 48.4338 |
| tt6 | 62.8386 | 54.9295 |
| tt7 | 57.7156 | 60.142 |
| tt8 | 67.5125 | 44.9072 |
| tt9 | 63.1986 | 51.2154 |
Claims (3)
1. the Full differential operational amplifier that a kind of high Slew Rate high gain-bandwidth of low-power consumption is amassed is it is characterised in that include:
Main operation amplifier unit；
Slew Rate enhancement unit, for improving the Slew Rate of main operational amplifier output difference signal；
Common mode feedback unit, for averagely being amplified to described output difference signal, to provide two to main operational amplifier
Road common-mode voltage feedback signal cmfb1～cmfb2；
Described main operational amplifier exists according to two-way common-mode voltage feedback signal cmfb1～cmfb2, applied current extraction technique
In the environment of low-power consumption, gain amplification is carried out to input differential signal, obtain described output difference signal；
Described main operation amplifier unit include 21 mos pipe m1～m21, r1～r4 and two electric capacity c1 of four resistance～
c2；Wherein, the source electrode of the source electrode of mos pipe m18 and mos pipe m13, the source electrode of mos pipe m3, the source electrode of mos pipe m5, mos pipe m6
Source electrode, the source electrode of mos pipe m4, the source electrode of mos pipe m14, the drain electrode of the source electrode of mos pipe m19, the drain electrode of mos pipe m7 and mos pipe m8
Connect and connect supply voltage altogether, the grid of mos pipe m18 is connected with the grid of mos pipe m19 and receives common-mode voltage feedback signal
The drain electrode of cmfb1, mos pipe m18 and the drain electrode of mos pipe m13, the drain electrode of mos pipe m15, the drain electrode of mos pipe m20 and electric capacity c1
One end is connected and produces positive pole output difference signal, the grid of mos pipe m13 and one end of resistance r1, the drain electrode of mos pipe m3, mos
The drain electrode of pipe m5, the drain electrode of mos pipe m1 are connected with the grid of mos pipe m8, the grid phase of the other end of resistance r1 and mos pipe m3
Even, the grid of mos pipe m5 is connected with the grid of mos pipe m6 and receives given bias voltage vbp, the drain electrode of mos pipe m6 and mos
The drain electrode of pipe m4, one end of resistance r2, the grid of mos pipe m14, the grid of mos pipe m7 are connected with the drain electrode of mos pipe m2, resistance
The other end of r2 is connected with the grid of mos pipe m4, the drain electrode of mos pipe m14 and the drain electrode of mos pipe m19, one end of electric capacity c2, mos
The drain electrode of pipe m16 is connected with the drain electrode of mos pipe m21 and produces negative pole output difference signal, the source electrode of mos pipe m7 and mos pipe m9
Drain electrode, the drain electrode of mos pipe m11, the grid of mos pipe m15 be connected with one end of resistance r3, the other end of resistance r3 is managed with mos
The grid of m9 is connected, and the grid of mos pipe m11 is connected with the grid of mos pipe m17 and the grid of mos pipe m12 and receives given inclined
Put voltage vbn, the drain electrode of mos pipe m17 is connected with the source electrode of mos pipe m1 and the source electrode of mos pipe m2, the grid of mos pipe m1 receives
Positive pole input differential signal, the grid of mos pipe m2 receives negative pole input differential signal, and the source electrode of mos pipe m8 is with mos pipe m12's
Drain electrode, the drain electrode of mos pipe m10, the grid of mos pipe m16 are connected with one end of resistance r4, the other end of resistance r4 and mos pipe m10
Grid be connected, the grid of mos pipe m20 is connected with the grid of mos pipe m21 and receives common-mode voltage feedback signal cmfb2, mos
The other end of the source electrode of pipe m20 and electric capacity c1, the source electrode of mos pipe m15, the source electrode of mos pipe m9, the source electrode of mos pipe m11, mos pipe
The source electrode of m17, the source electrode of mos pipe m12, the source electrode of mos pipe m10, the source electrode of mos pipe m16, the source electrode of mos pipe m21 and electric capacity c2
The other end connect altogether and be grounded；Mos pipe m18, m13, m3, m5, m6, m4, m14 and m19 adopt pmos manage, mos pipe m7, m8, m1,
M2, m20, m15, m9, m11, m17, m12, m10, m16 and m21 adopt nmos to manage.
2. Full differential operational amplifier according to claim 1 it is characterised in that: described Slew Rate enhancement unit includes two
Block slew rate enhancing circuit, described slew rate enhancing circuit includes nine mos pipe n1～n9；Wherein, the source electrode of mos pipe n7 and mos
The source electrode of pipe n5, the source electrode of mos pipe n3, the source electrode of the source electrode of mos pipe n4, the source electrode of mos pipe n6 and mos pipe n8 connect altogether and connect electricity
The grid of source voltage, the grid of mos pipe n7 and mos pipe n5, the leakage of the drain electrode of mos pipe n5, the drain electrode of mos pipe n3 and mos pipe n1
Extremely connected, the drain electrode of mos pipe n7 connects the cathode output end of main operation amplifier unit, and the grid reception positive pole input of mos pipe n1 is poor
Sub-signal, the source electrode of mos pipe n1 is connected with the source electrode of mos pipe n2 and the source electrode of mos pipe n9, the grid of mos pipe n3 and mos pipe n4
Grid be connected and receive given reference voltage vref1, the grid of mos pipe n9 receives given reference voltage vref2, mos
The grid of the source ground of pipe n9, the grid of mos pipe n8 and mos pipe n6, the drain electrode of mos pipe n6, the drain electrode of mos pipe n4 and mos
The drain electrode of pipe n2 is connected, and the drain electrode of mos pipe n8 connects the cathode output end of main operation amplifier unit, and the grid of mos pipe n2 receives to be born
Pole input differential signal；Mos pipe n3～n8 adopts pmos to manage, and mos pipe n1, n2 and n9 adopt nmos to manage.
3. Full differential operational amplifier according to claim 1 it is characterised in that: described common mode feedback unit includes nine
Individual q1～q9 and two electric capacity c3～c4 of mos pipe；Wherein, the source electrode of the source electrode of mos pipe q1 and mos pipe q2, the source electrode of mos pipe q3
Connect and connect supply voltage altogether with the source electrode of mos pipe q4, the drain electrode of the grid of mos pipe q1 and mos pipe q1, the drain electrode of mos pipe q2 and
The drain electrode of mos pipe q5 is connected and produces common-mode voltage feedback signal cmfb1, and the grid of mos pipe q2 receives given bias voltage
The grid of vbp, mos pipe q3 is connected with the drain electrode of the grid of mos pipe q4, the drain electrode of mos pipe q3 and mos pipe q6, the leakage of mos pipe q4
Pole is connected and produces common-mode voltage feedback signal with the grid of the drain electrode, the drain electrode of mos pipe q8 and mos pipe q7 of mos pipe q7
The source electrode of cmfb2, mos pipe q5 is connected with the source electrode of mos pipe q6 and the drain electrode of mos pipe q9, and the grid of mos pipe q5 receives given
Common-mode voltage, the grid of mos pipe q6 is connected with one end of one end of electric capacity c3 and electric capacity c4, the main computing of another termination of electric capacity c3
The cathode output end of amplifying unit, the cathode output end of another termination main operation amplifier unit of electric capacity c4, the grid of mos pipe q9
It is connected and receives given bias voltage vbn, the source electrode of the source electrode of mos pipe q9 and mos pipe q7 and mos with the grid of mos pipe q8
The source electrode of pipe q8 connects altogether and is grounded；Mos pipe q1～q4 adopts pmos to manage, and mos pipe q5～q9 adopts nmos to manage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| US9300257B1 (en) * | 2014-10-02 | 2016-03-29 | Analog Devices Global | High gain, high slew rate amplifier |
| CN104836541B (en) * | 2015-03-10 | 2018-01-09 | 遵义师范学院 | A kind of adjustable Full differential operational amplifiers of GBW for ADC |
| CN106330104A (en) * | 2016-10-14 | 2017-01-11 | 湘潭芯力特电子科技有限公司 | Fully differential amplifier circuit with high accuracy and high dynamic range |
| CN108663579B (en) * | 2017-04-01 | 2020-12-29 | 杭州晶华微电子有限公司 | Low-power-consumption low-cost alternating current signal detection circuit |
| CN107592078A (en) * | 2017-08-23 | 2018-01-16 | 刘欣亮 | Operation amplifier circuit and design method |
| CN108259007B (en) * | 2017-12-29 | 2021-06-04 | 思瑞浦微电子科技（苏州）股份有限公司 | Enhancement circuit applied to operational amplifier conversion rate |
| CN110912541B (en) * | 2018-09-17 | 2023-04-07 | 创意电子股份有限公司 | Comparator circuit system |
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| CN111208347A (en) * | 2020-03-16 | 2020-05-29 | 成都纳能微电子有限公司 | High-speed differential signal amplitude detection circuit |
| CN111510090B (en) * | 2020-05-19 | 2023-03-31 | 成都微光集电科技有限公司 | Operational amplifier with high voltage slew rate and wide output range |
| CN112039492B (en) * | 2020-08-06 | 2021-04-27 | 浙江大学 | High-linearity transconductance amplifier applied to physiological signal filter |
| CN112234973B (en) * | 2020-09-24 | 2023-01-24 | 西安电子科技大学 | Multistage operational amplifier suitable for driving wide-range capacitive load |
| CN114584082B (en) * | 2020-12-02 | 2023-06-30 | 圣邦微电子（北京）股份有限公司 | Bandwidth adjusting circuit and bandwidth adjusting method of operational amplifier |
| CN114115419B (en) * | 2021-11-25 | 2023-07-04 | 上海华虹宏力半导体制造有限公司 | Band gap reference source circuit |
| CN115425931B (en) * | 2022-09-07 | 2023-06-16 | 上海南麟集成电路有限公司 | Slew rate enhancement circuit, slew rate enhancement method and operational amplifier |
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