CN108092628A - A kind of operational amplifier and amplifier circuit that there is imbalance to eliminate structure - Google Patents

A kind of operational amplifier and amplifier circuit that there is imbalance to eliminate structure Download PDF

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Publication number
CN108092628A
CN108092628A CN201711316110.9A CN201711316110A CN108092628A CN 108092628 A CN108092628 A CN 108092628A CN 201711316110 A CN201711316110 A CN 201711316110A CN 108092628 A CN108092628 A CN 108092628A
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CN
China
Prior art keywords
imbalance
nmos tube
switch
grid
pmos tube
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201711316110.9A
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Chinese (zh)
Inventor
何学红
皮常明
蒋宇
严慧婕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai IC R&D Center Co Ltd
Shanghai Huahong Group Co Ltd
Chengdu Image Design Technology Co Ltd
Original Assignee
Shanghai Huahong Group Co Ltd
Shanghai Integrated Circuit Research and Development Center Co Ltd
Chengdu Image Design Technology Co Ltd
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Application filed by Shanghai Huahong Group Co Ltd, Shanghai Integrated Circuit Research and Development Center Co Ltd, Chengdu Image Design Technology Co Ltd filed Critical Shanghai Huahong Group Co Ltd
Priority to CN201711316110.9A priority Critical patent/CN108092628A/en
Publication of CN108092628A publication Critical patent/CN108092628A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/08Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
    • H03F1/083Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers
    • H03F1/086Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers with FET's
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45376Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using junction FET transistors as the active amplifying circuit
    • H03F3/45381Long tailed pairs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/249A switch coupled in the input circuit of an amplifier being controlled by a circuit, e.g. feedback circuitry being controlling the switch
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/507A switch being used for switching on or off a supply or supplying circuit in an IC-block amplifier circuit

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

A kind of operational amplifier that there is imbalance to eliminate structure disclosed by the invention, the grid of 4th PMOS tube and the grid of the 3rd PMOS tube connect the both sides of the first capacitance respectively, and the 3rd PMOS tube the drain electrode of grid and the 3rd PMOS tube and the drain electrode of the first NMOS tube be connected, the grid of the 4th PMOS tube by first switch and the 4th PMOS tube drain and the drain electrode of the second NMOS tube is connected;The grid of second NMOS tube connects reverse input end, and the grid of the first NMOS tube connects positive input;The positive input is connected by second switch with reverse input end.A kind of amplifier circuit that there is imbalance to eliminate structure disclosed by the invention, so that the offset voltage of entire amplifier circuit is stored on the first capacitance C1 in five pipe operation amplifier circuits, the loss of significance of traditional input imbalance elimination structure is avoided, tradition output imbalance is also avoided and eliminates the structure area brought and increase of power consumption due to increase pre-amplification circuit.

Description

A kind of operational amplifier and amplifier circuit that there is imbalance to eliminate structure
Technical field
The present invention relates to integrated circuit fields, and in particular to a kind of amplifier circuit that there is imbalance to eliminate structure.
Background technology
Operation amplifier circuit is the core circuit of present numerous analog circuits, and attainable performance indicator usually determines The performance indicator of entire analog circuit, thus the design of high performance amplifier circuit must be faced in Analog Circuit Design The problem of.One index of limitation amplifier performance is exactly the imbalance of amplifier circuit, can behave as offset voltage and imbalance electricity Stream, since for amplifier circuit commonly used to amplification voltage, the imbalance in this document refers mainly to offset voltage in analog circuit.
In order to promote the precision of analog circuit, amplifier circuit imbalance eliminates structure and is suggested.Traditional imbalance eliminates knot Structure mainly has input imbalance elimination structure and output imbalance to eliminate structure.
Fig. 1 lacks of proper care for traditional input eliminates structure, in figure by taking single-ended structure as an example.During work, first switch S1 is height Level controls corresponding switch conduction, and amplifier is connected into negative feedback type, and amplifier inverting input VN nodes are due to amplifier The short characteristic of void of circuit is identical with VIN2 node voltages, if the offset voltage of consideration amplifier circuit, VN node voltages at this time The equivalent input noise voltage of amplifier circuit is added for VIN2 voltages, and capacitance C1 left end pole plates are connected to input VIN1, electricity Hold the voltage difference at both ends for VIN1-VN, since VN contains the equivalent input noise voltage of amplifier circuit, so on capacitance C1 Offset voltage is stored, the offset voltage that can't see amplifier circuit from input node VIN1, VIN2 is equivalent to, so as to reach Eliminate the purpose of offset voltage.When comparator circuit shown in FIG. 1 works normally, S1 is disconnected, and VIN1 nodes start to change, The variation of its voltage is coupled to VN nodes by capacitance C1, and usual VIN1 voltages can first decline so that and VN nodes decline, so as to VOUT is made to rise to high level, then VIN1 node voltages rise so that VN nodes rise, so that VOUT falls to low electricity It is flat, complete the overturning of comparator.However, this structure specific implementation when due to the addition of capacitance C1, inevitably increase The reacting condition of the parasitic capacitance Cp, such VIN1 of VN nodes over the ground have amplitude loss, i.e. Δ VN=Δs VIN1* in VN nodes C1/ (C1+Cp), there is Δ VN<Δ VIN1 so causes the gain loss of entire comparator, increases the equivalent inpnt of comparator Noise.
Fig. 2 show traditional output imbalance and eliminates structure, in figure by taking differential configuration as an example.The operation principle of this structure with Input imbalance shown in FIG. 1 eliminates that structure is similar, but it is that the imbalance of amplifier circuit is stored in the capacitance that output terminal connect On C1, C2.It lacks of proper care compared to input and eliminates structure, this output imbalance eliminates structure does not increase capacitance in input terminal, so as to not have Have and introduce parasitic capacitance in input terminal, but since the output offset voltage of amplifier circuit is usually larger, beyond amplifier circuit Output area, so can cause offset voltage that cannot completely eliminate, thus it is shown in Fig. 2 output imbalance eliminate structure generally use In the situation of amplifier circuit amplification factor very little (being usually no more than ten times), first stage amplifier circuit is then connect again later again To increase the amplification factor of entire amplifier circuit.So amplification of the low amplification factor of amplifier circuit previous stage of two-layer configuration Device circuit is known as preamplifier circuit, it is therefore apparent that two-layer configuration can consume more power consumptions and area.
Input imbalance eliminates the big area and power consumption demand that the loss of significance that structure faces eliminates structure with output imbalance It is that present imbalance eliminates the main problem that structure faces.The imbalance of design higher precision, more small area and power consumption, which eliminates structure, to be had Practical demand.
The content of the invention
To solve the above-mentioned problems, the present invention provides a kind of amplifier circuit that there is imbalance to eliminate structure, avoid Traditional input imbalance eliminates the loss of significance of structure, also avoids tradition output imbalance and eliminates structure due to increasing pre-amplification electricity Road and the area brought and the increase of power consumption.
To achieve these goals, the present invention adopts the following technical scheme that:A kind of computing that there is imbalance to eliminate structure is put Big device, the circuit structure of the operational amplifier include:First NMOS tube, the second NMOS tube, the 3rd PMOS tube, the 4th PMOS Pipe and tail current NMOS tube;Wherein, the source electrode of the 4th PMOS tube and the source electrode of the 3rd PMOS tube connect power supply (VDD);4th The grid of PMOS tube and the grid of the 3rd PMOS tube connect the both sides of the first capacitance (C1) respectively, and the grid of the 3rd PMOS tube with The drain electrode of 3rd PMOS tube is connected with the drain electrode of the first NMOS tube, the grid of the 4th PMOS tube by first switch (S1) with The drain electrode of 4th PMOS tube is connected with the drain electrode of the second NMOS tube;The drain electrode of 4th PMOS tube and the drain electrode phase of the second NMOS tube Connect and be commonly connected to output terminal (VOUT);The source electrode of second NMOS tube and the source electrode of the first NMOS tube are connected and connect jointly To the drain electrode of tail current NMOS tube;The grid of second NMOS tube connects reverse input end (VIN), and the grid of the first NMOS tube connects forward direction Input terminal (VIP);The grid connection bias voltage (VBN) of tail current NMOS tube, the source electrode ground connection (VSS) of tail current NMOS tube, The positive input (VIP) is connected by second switch (S2) with reverse input end (VIN).
Further, first NMOS tube, the second NMOS tube, the 3rd PMOS tube, the 4th PMOS tube and tail current NMOS Source electrode and drain electrode can exchange in pipe.
Further, the first switch (S1) and second switch (S2) are realized by one-way conduction transistor.
Further, the first switch (S1) and second switch (S2) are single knife switch.
Further, the operational amplifier is five pipe operational amplifiers.
The present invention also provides a kind of amplifier circuit that there is imbalance to eliminate structure, the amplifier circuit configuration is specific Including:Operational amplifier (OTA), input terminal (VIN), sampling capacitance (Cs), feedback capacity (Cf), are always opened output terminal (VOUT) It closes (SW), wherein, one end of the feedback capacity (Cf) is connected with the sampling capacitance (Cs), the other end and the output terminal (VOUT) connect;Described master switch (SW) one end connects the sampling capacitance (Cs), and the other end connects with the output terminal (VOUT) It connects;The other end of the sampling capacitance (Cs) connects the input terminal (VIN);The reversed input of the operational amplifier (OTA) End connection sampling capacitance (Cs), positive input connection common-mode voltage (VCM), other end connection output terminal (VOUT).
Further, the time that the second switch (S2) disconnects is more late than the time that first switch (S1) disconnects, described total The time of switch (SW) conducting is more late than the time that second switch (S2) disconnects, so that the amplifier circuit final output end (VOUT) voltage value VOUT ' is equal to the sum of VCM ' and Δ VIN ', wherein, Δ VIN '=VIN1 '-VIN2 ' is input terminal (VIN) input voltage variation difference, VCM ' is the voltage value of common-mode voltage.
Further, feedback factor β=Cf ' in the amplifier circuit/(Cs '+Cf '), wherein, Cs ' is sampling electricity The capacitance of appearance, Cf ' are the capacitance of feedback capacity.
Beneficial effects of the present invention are:The operational amplifier proposed by the present invention that there is imbalance to eliminate structure will be used as electric current The grid that the 3rd PMOS tube, the 4th PMOS tube of mirror load pipe were connected originally disconnects, and the first capacitance C1 is added in, in the 4th PMOS Switch S1 is added between the grid V2 nodes of pipe and the drain terminal VOUT nodes of the 4th PMOS tube, so that entire operational amplifier electricity The offset voltage on road is stored on the first capacitance C1.The structure design of the present invention does not increase electricity in amplifier circuit input terminal Hold, eliminate the loss of significance of structure so as to avoid traditional input imbalance, while do not powered up in amplifier circuit output Hold, avoiding tradition output imbalance elimination structure needs to increase pre-amplification circuit due to output saturation problem, thus brings The increase of area and power consumption.It is proposed by the present invention imbalance eliminate structure be conducive to improve circuit precision, reduce total area and Power consumption.
Description of the drawings
Fig. 1 is that a kind of traditional input imbalance eliminates structure diagram.
Fig. 2 is that a kind of traditional output imbalance eliminates structure diagram.
Fig. 3 is the structure diagram for the five pipe operation amplifier circuits that amplifier circuit of the present invention uses.
Fig. 4 is a kind of structure diagram for the amplifier circuit that there is imbalance to eliminate structure of the present invention.
Fig. 5 is a kind of work schedule schematic diagram for the amplifier circuit that there is imbalance to eliminate structure of the present invention.
Fig. 6 is a kind of artificial circuit schematic diagram for the amplifier circuit that there is imbalance to eliminate structure of the present invention
Fig. 7 is a kind of simulation result for the amplifier circuit that there is imbalance to eliminate structure of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with the accompanying drawings to the specific reality of the present invention The mode of applying is described in further detail.
The present invention provides a kind of operational amplifier that there is imbalance to eliminate structure, put in the present embodiment using five pipe computings Big device, the circuit structure of concrete operation amplifier as shown in Figure 3, including:First NMOS tube M1, the 2nd NMOS pipes M2, the 3rd PMOS tube M3, the 4th PMOS tube M4, tail current NMOS tube M0;Wherein, the source electrode of the 4th PMOS pipes M4 and the 3rd PMOS tube M3 Source electrode meets power vd D;The grid of 4th PMOS tube M4 and the grid of the 3rd PMOS tube M3 connect the two of the first capacitance C1 respectively Side, and the grid of the 3rd PMOS tube M3 is connected with the drain electrode of the 3rd PMOS tube M3 and the drain electrode of the first NMOS tube M1, the 4th The grid of PMOS tube M4 is connected by first switch S1 with the drain electrode of the 4th PMOS tube M4 and the drain electrode of the second NMOS tube M2;The The drain electrode of four PMOS pipes M4 is connected with the drain electrode of the second NMOS tube M2 and is commonly connected to output terminal VOUT;2nd NMOS pipes M2 Source electrode and the source electrode of the first NMOS tube M1 be connected and be commonly connected to the drain electrode of tail current NMOS tube M0;Second NMOS tube M2 Grid meet reverse input end VIN, the grid of the first NMOS tube M1 meets positive input VIP;The grid of tail current NMOS tube M0 Connect bias voltage VBN, the source electrode ground connection VSS of tail current NMOS tube.Compared with five traditional pipe operation amplifier circuits, this The grid that current mirror load pipe M3, M4 were connected by invention originally disconnects, and the first capacitance C1 is added in, in the grid V2 nodes and M4 of M4 Drain terminal VOUT nodes between add in switch S1, and between the reverse input end VIN of operation amplifier circuit and positive input VIP It is connected by second switch S2.Wherein, the first NMOS tube M1, the second NMOS tube M2, the 3rd in five pipe operation amplifier circuits PMOS pipes M3, the 4th PMOS tube M4, the source electrode in tail current NMOS tube M0 and drain electrode can exchange.
A kind of amplifier circuit that there is imbalance to eliminate structure provided by the invention, including above-mentioned operational amplifier, input End, output terminal, sampling capacitance, feedback capacity, master switch and second switch, wherein, one end and the sampling capacitance of feedback capacity connect It connects, the other end is connected with output terminal;Master switch one end connects sampling capacitance, and the other end is connected with output terminal;Sampling capacitance it is another One end connects input terminal;The reverse input end connection sampling capacitance of operation amplifier circuit, positive input connection common-mode voltage, The other end connects output terminal.
As shown in Figure 4, the amplifier circuit provided by the invention that there is imbalance to eliminate structure causes feedback capacity Cf's One end is connected with sampling capacitance Cs, and the other end is connected with output terminal VOUT;Master switch SW one end connection sampling capacitance connection, it is another End is connected with output terminal VOUT;The other end connection input terminal VIN of sampling capacitance Cs;The reverse input end of operational amplifier OTA VIN connections sampling capacitance Cs, positive input VIP connection common-mode voltage VCM, other end connection output terminal VOUT, and computing is put It is connected between the reverse input end VIN and positive input VIP of big device circuit OTA by second switch S2.First in the present invention Switch S1 and second switch S2 is realized by one-way conduction transistor, and first switch S1 and second switch S2 is single knife switch. Feedback factor β=Cf '/(Cs '+Cf ') in the present invention in amplifier circuit, wherein, Cs ' be sampling capacitance capacitance, Cf ' For the capacitance of feedback capacity.
As shown in Figure 5, the overall amplifier circuit work period is divided into imbalance elimination stage and normal working stage, In, VIN ' is the voltage value of input terminal VIN inputs, and VOUT ' is the voltage value of output terminal VOUT outputs.In the imbalance elimination stage: S1, S2 are high level, control corresponding switch conduction, then input terminal VIP, VIN of amplifier circuit are shorted together, and are connect jointly The grid V1 sections of the grid V2 nodes and output terminal VOUT node short circuits, ideally M3 pipes of common-mode voltage VCM, S1 control M4 Point and M4 tube grid V2 node voltages should be identical, but due to the presence of imbalance, flow through electric current I1, I2 of two branch of amplifier circuit It is unequal, show as that V1, V2 node voltage are unequal, the voltage difference of V1, V2 node and the imbalance phase of entire amplifier circuit It closes, is stored on capacitance C1;Then S1 is low that respective switch disconnects, and then S2 is low, terminates the imbalance elimination stage.Then The SW signals of PGA become high, start normal PGA work schedules:By the variation of input signal VIN ' by Cs '/Cf ' multiples amplification To output terminal, output terminal VOUT outputs voltage VOUT0 ' during elimination of lacking of proper care is the grid grade electricity that supply voltage VDD ' subtracts M4 Vgs, i.e. VOUT0 '=VDD '-Vgs are pressed, when SW is high, output voltage values VOUT ' is equal to VCM ', then input voltage value VIN ' starts to change, and is VIN2 ' by VIN1 ' variations, output voltage values VOUT ' follows variation, and final output voltage value VOUT ' is VOUT '=VCM '+VIN1 '-VIN2 '.
Fig. 6 show a kind of artificial circuit schematic diagram for the amplifier circuit that there is imbalance to eliminate structure of the present invention, is putting Big device circuit reverse input end increases a DC source, and voltage swing is set to Vos, carrys out analog amplifier circuit with this Vos voltage Actual offset voltage, Vos is scanned during emulation from -40mV to 40mV, per mono- scanning element of 10mV.Artificial circuit shown in Fig. 6 Simulation architecture is as shown in fig. 7, SW signals and the SW signal sequences described in Fig. 5 are slightly different in Fig. 7, but do not influence in this example Simulation result.In Fig. 7 output terminal VOUT after the voltage waveform amplification of 2 points of A, B it can be seen that, lack of proper care electricity in amplifier circuit Press Vos from -40mV scan to 40mV when, 2 points in A, B of the variation of VOUT ' is respectively about 172uV and 882uV, much smaller than imbalance The variation of the 80mV of voltage Vos, simulation result show that amplifier circuit imbalance proposed by the present invention eliminates structure and effectively reduces The offset voltage of circuit greatly improves the precision of circuit.
As seen from the above description, amplifier circuit imbalance proposed by the present invention eliminates structure and is not inputted in amplifier circuit End increases capacitance, and the loss of significance of structure is eliminated so as to avoid traditional input imbalance, while not defeated in amplifier circuit Outlet, which powers up, to be held, and avoiding tradition output imbalance elimination structure needs to increase pre-amplification circuit due to output saturation problem, by The increase of this area brought and power consumption.Imbalance proposed by the present invention eliminates the precision that structure is conducive to improve circuit, reduces total Area and power consumption.
The foregoing is merely the preferred embodiment of the present invention, the embodiment is not intended to limit the patent protection of the present invention Scope, therefore the equivalent structure variation that every specification and accompanying drawing content with the present invention is made, similarly should be included in this In the protection domain of invention appended claims.

Claims (8)

  1. A kind of 1. operational amplifier that there is imbalance to eliminate structure, which is characterized in that the circuit structure bag of the operational amplifier It includes:First NMOS tube, the second NMOS tube, the 3rd PMOS tube, the 4th PMOS tube and tail current NMOS tube;Wherein, the 4th PMOS tube Source electrode and the source electrode of the 3rd PMOS tube connect power supply (VDD);The grid of 4th PMOS tube and the grid difference of the 3rd PMOS tube Connect the both sides of the first capacitance (C1), and the grid of the 3rd PMOS tube and the drain electrode of the 3rd PMOS tube and the drain electrode of the first NMOS tube It is connected, the grid of the 4th PMOS tube passes through first switch (S1) and the drain electrode of the 4th PMOS tube and the drain electrode phase of the second NMOS tube Connection;The drain electrode of 4th PMOS tube is connected with the drain electrode of the second NMOS tube and is commonly connected to output terminal (VOUT);2nd NMOS The source electrode of pipe and the source electrode of the first NMOS tube are connected and are commonly connected to the drain electrode of tail current NMOS tube;The grid of second NMOS tube Pole connects reverse input end (VIN), and the grid of the first NMOS tube connects positive input (VIP);The grid connection of tail current NMOS tube Bias voltage (VBN), the source electrode ground connection (VSS) of tail current NMOS tube, the positive input (VIP) pass through second switch (S2) It is connected with reverse input end (VIN).
  2. 2. a kind of operational amplifier that there is imbalance to eliminate structure according to claim 1, which is characterized in that described first Source electrode and drain electrode can exchange in NMOS tube, the second NMOS tube, the 3rd PMOS tube, the 4th PMOS tube and tail current NMOS tube.
  3. 3. a kind of operational amplifier that there is imbalance to eliminate structure according to claim 1, which is characterized in that described first Switch (S1) and second switch (S2) are realized by one-way conduction transistor.
  4. 4. a kind of operational amplifier that there is imbalance to eliminate structure according to claim 1, which is characterized in that described first It is single knife switch to switch (S1) and second switch (S2).
  5. A kind of 5. operational amplifier that there is imbalance to eliminate structure according to claim 1, which is characterized in that the computing Amplifier is five pipe operational amplifiers.
  6. 6. the amplifier circuit formed using the operational amplifier described in claim 1 that there is imbalance to eliminate structure, feature It is, the amplifier circuit configuration specifically includes:Operational amplifier (OTA), input terminal (VIN), output terminal (VOUT), sampling Capacitance (Cs), feedback capacity (Cf), master switch (SW), wherein, one end and the sampling capacitance of the feedback capacity (Cf) (Cs) connect, the other end is connected with the output terminal (VOUT);Described master switch (SW) one end connects the sampling capacitance (Cs), The other end is connected with the output terminal (VOUT);The other end of the sampling capacitance (Cs) connects the input terminal (VIN);It is described The reverse input end connection sampling capacitance (Cs) of operational amplifier (OTA), positive input connection common-mode voltage (VCM) are another End connection output terminal (VOUT).
  7. 7. a kind of amplifier circuit that there is imbalance to eliminate structure according to claim 6, which is characterized in that described second The time that switch (S2) disconnects is more late than the time that first switch (S1) disconnects, and the time of master switch (SW) conducting opens than second Evening time that (S2) is disconnected is closed, so that the voltage value VOUT ' at the amplifier circuit final output end (VOUT) is equal to The sum of VCM ' and Δ VIN ', wherein, Δ VIN '=VIN1 '-VIN2 ' is that the input voltage of input terminal (VIN) changes difference, VCM ' is the voltage value of common-mode voltage.
  8. A kind of 8. amplifier circuit that there is imbalance to eliminate structure according to claim 6, which is characterized in that the amplification Feedback factor β=Cf '/(Cs '+Cf ') in device circuit, wherein, Cs ' is the capacitance of sampling capacitance, and Cf ' is feedback capacity Capacitance.
CN201711316110.9A 2017-12-12 2017-12-12 A kind of operational amplifier and amplifier circuit that there is imbalance to eliminate structure Pending CN108092628A (en)

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CN201711316110.9A CN108092628A (en) 2017-12-12 2017-12-12 A kind of operational amplifier and amplifier circuit that there is imbalance to eliminate structure

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CN201711316110.9A CN108092628A (en) 2017-12-12 2017-12-12 A kind of operational amplifier and amplifier circuit that there is imbalance to eliminate structure

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Publication number Priority date Publication date Assignee Title
CN109587420A (en) * 2018-11-09 2019-04-05 上海集成电路研发中心有限公司 A kind of imaging sensor high-precision reading circuit structure and working sequence control method
CN112365853A (en) * 2020-11-13 2021-02-12 昂宝电子(上海)有限公司 Multi-path LED backlight system and constant current control circuit and method thereof
CN116073769A (en) * 2023-03-21 2023-05-05 厦门优迅高速芯片有限公司 Two-in-one eliminating circuit integrating direct current offset eliminating and slicing threshold adjusting functions

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CN104660923A (en) * 2013-11-15 2015-05-27 佳能株式会社 Comparator circuit, imaging apparatus using the same, and method of controlling comparator circuit
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CN104660923A (en) * 2013-11-15 2015-05-27 佳能株式会社 Comparator circuit, imaging apparatus using the same, and method of controlling comparator circuit
CN105306845A (en) * 2015-11-19 2016-02-03 电子科技大学 Correlated double-sampling circuit capable of cancelling offset
CN106208982A (en) * 2016-07-15 2016-12-07 天津大学 A kind of trsanscondutance amplifier imbalance based on output electric current storage eliminates structure

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109587420A (en) * 2018-11-09 2019-04-05 上海集成电路研发中心有限公司 A kind of imaging sensor high-precision reading circuit structure and working sequence control method
CN109587420B (en) * 2018-11-09 2021-04-30 上海集成电路研发中心有限公司 High-precision reading circuit structure of image sensor and working time sequence control method
CN112365853A (en) * 2020-11-13 2021-02-12 昂宝电子(上海)有限公司 Multi-path LED backlight system and constant current control circuit and method thereof
CN116073769A (en) * 2023-03-21 2023-05-05 厦门优迅高速芯片有限公司 Two-in-one eliminating circuit integrating direct current offset eliminating and slicing threshold adjusting functions
CN116073769B (en) * 2023-03-21 2023-08-11 厦门优迅高速芯片有限公司 Two-in-one eliminating circuit integrating direct current offset eliminating and slicing threshold adjusting functions

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