CN105720935B - A kind of trsanscondutance amplifier of substrate input structure - Google Patents

A kind of trsanscondutance amplifier of substrate input structure Download PDF

Info

Publication number
CN105720935B
CN105720935B CN201610039247.3A CN201610039247A CN105720935B CN 105720935 B CN105720935 B CN 105720935B CN 201610039247 A CN201610039247 A CN 201610039247A CN 105720935 B CN105720935 B CN 105720935B
Authority
CN
China
Prior art keywords
pmos
drain
input
tubes
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610039247.3A
Other languages
Chinese (zh)
Other versions
CN105720935A (en
Inventor
徐代果
胡刚毅
李儒章
王健安
陈光炳
王育新
刘涛
刘璐
邓民明
石寒夫
王旭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CETC 24 Research Institute
Original Assignee
CETC 24 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 24 Research Institute filed Critical CETC 24 Research Institute
Priority to CN201610039247.3A priority Critical patent/CN105720935B/en
Publication of CN105720935A publication Critical patent/CN105720935A/en
Application granted granted Critical
Publication of CN105720935B publication Critical patent/CN105720935B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45484—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with bipolar transistors as the active amplifying circuit
    • H03F3/45488—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with bipolar transistors as the active amplifying circuit by using feedback means
    • H03F3/45493—Measuring at the loading circuit of the differential amplifier
    • H03F3/45497—Controlling the input circuit of the differential amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0035—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
    • H03G1/007—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using FET type devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/411—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45528—Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The present invention provides a kind of trsanscondutance amplifier of substrate input structure, the substrate input positive feedback input level structure formed including PMOS M1, M2, M3 and M4, the automatic biasing active load structure that NMOS tube M5, M6, M7, M8 and PMOS M9, M10 are formed, constant-current source, trsanscondutance amplifier compensating electric capacity CCWith load capacitance CL.PMOS M3 in input stage is connected by the present invention with M4 substrate with its grid respectively, so as to which directly input signal is added on PMOS M3 and M4 grid, connected mode is very simple, nonideal ghost effect is reduced to minimum, the thinking for improving input stage mutual conductance can be realized, RC network need not be introduced again, substantially reduce circuit design cost, so that circuit is very easy to realize, and there is no quiescent dissipation；The connected mode of compensating electric capacity simultaneously, pushes first non-dominant pole of trsanscondutance amplifier to higher frequency so that while trsanscondutance amplifier unity gain bandwidth increase, maintain suitable phase margin, enhance the stability of trsanscondutance amplifier.

Description

Transconductance amplifier of substrate input structure
Technical Field
The invention belongs to the technical field of analog or digital-analog hybrid integrated circuits, and particularly relates to a transconductance amplifier with a substrate input structure.
Background
In recent years, with the continuous development of integrated circuit manufacturing technology, the demand for low-power consumption analog integrated circuits is gradually increased, and in order to meet the requirement for low power consumption, the power supply voltage is further reduced. In the structure, an input signal is directly input to a substrate and a grid of an input differential pair transistor, and positive feedback is formed, so that the input pair transistor of the transconductance amplifier works in a subthreshold region, and therefore a larger transconductance is provided. The working principle of the transconductance amplifier enables the transconductance amplifier to still provide larger direct-current gain under extremely low power supply voltage. However, the inventor of the present application finds that, in the conventional structure, the input stage transconductance is still low, and the existing method for improving the transconductance has the defects of chip area consumption, poor effect and the like; on the other hand, the conventional structure is difficult to improve the unit gain bandwidth and the phase margin while the amplifier achieves high gain. Therefore, the requirements of the high-performance transconductance amplifier are difficult to meet by using the traditional structures.
To describe the above problems in more detail, the operation principle and advantages and disadvantages of the transconductance amplifier with two conventional structures are analyzed. A schematic diagram of a conventional substrate input transconductance amplifier is shown in fig. 1, which now analyzes the input stage transconductance in structure 1. For a long channel MOS device, if it operates in the weak inversion region, its source-drain current can be expressed as:
wherein, ISFor characteristic current, n is the slope factor of weak inversion region and can be defined as 1+ gmb/gmIn practice, this slope factor is not a constant, but is related to process factors and substrate voltage. The threshold voltage V of the MOS tube can be known through circuit knowledgeTHThis can be developed by the following relationship:
VTH＝VTO-(n-1)VBS(2)
wherein, VTOThe threshold voltage when the voltage difference between the substrate and the source is zero can be obtained by the following equations (1) and (2):
since the transconductance in the case of substrate input is defined as IDS/VBSWhile the coefficient n in the formula (3) can be expressed as 1+ gmb/gmTherefore, the transconductance at the substrate input is given by the equation (3)Limitation of items, i.e. VBSCannot cause IDSIs used. Now to analyze how the structure 1 increases the transconductance of the input stage, the input stage in the structure 1 is analyzed separately, as shown in fig. 2, and the input differential pair has two gate-substrate cross-connected PMOS transistors M1 and M2 forming a positive feedback structure, and no additional current is introduced here, and the PMOS transistors M3 and M4 can be considered as active loads. Assuming that the width-to-length ratios (W/L) of the PMOS transistors M1 and M2 are the same, and the width-to-length ratios (W/L) of the PMOS transistors M3 and M4 are the same, the differential output current can be expressed as:
since the currents flowing through the PMOS transistors M1 and M3 are the same, and the currents flowing through the PMOS transistors M2 and M4 are the same, the differential current I0＝I1-I2It can also be expressed as:
bringing formula (5) into formula (4) can result:
from the formula (6), the differential current I0Ruler independent of input differential pairThe transconductance of the input differential pair can be expressed as:
wherein η is gmb/gmAs can be seen from equation (7), the effective transconductance of the differential input structure shown in fig. 2 is improved by (n +1)/(n-1) times as compared with the common substrate input structure. It is very important to note that as the process feature size decreases, albeit by gmb/gmThe value of (n +1)/(n-1) decreases, but the value of (n +1)/(n-1) increases, which indicates that the effective transconductance of the input stage structure shown in fig. 2 increases with decreasing feature size, which is a significant advantage of the input stage structure shown in fig. 2. Therefore, the input transconductance of the conventional substrate input transconductance amplifier shown in fig. 1 is large, and is very suitable for low power voltage applications. However, the inventors of the present application have found that the input transconductance of the transconductance amplifier of the structure 1 shown in fig. 1 is still small in some applications.
Referring to the structure 2 shown in fig. 3, a transconductance-enhanced substrate-input transconductance amplifier is proposed, in which an RC network is added on the basis of the structure 1 shown in fig. 1, a half-side circuit is analyzed, an input signal is connected to one plate of a capacitor C1, the other plate of the capacitor C1 is connected to a resistor R1, and is also connected to the gate of a PMOS input transistor M3, and the other end of the resistor R1 is connected to a bias voltage VCM. Assuming that C1, C2, R1, R2, R, if both R and C take large values, the RC network forms an ideal high-pass filter, and the input ac small signal is coupled to the gates of PMOS transistors M3 and M4, which can further increase the effective transconductance of the input stage compared to the structure 1 shown in fig. 1; meanwhile, static power consumption is not consumed, and as can be seen from the analysis of the ac small signal, the effective transconductance of the structure 2 shown in fig. 3 can be represented as follows:
comparing the formula (7) and the formula (8), it can be found that the structure 2 shown in fig. 3 obviously improves the effective transconductance of the input stage on the basis of the conventional substrate input transconductance amplifier, thereby further improving the gain of the transconductance amplifier without consuming static power consumption. It should be noted, however, that the structure 2 shown in fig. 3 couples the input signal to the gate of the corresponding PMOS transistor through the high-pass filter, and this working principle is premised on the condition that the value of RC is large, otherwise the signal coupled to the gate of the corresponding PMOS transistor is attenuated, and the increase of transconductance is not obvious. The structure 2 shown in fig. 3 is carefully designed in a 0.18 μm CMOS process, and the dc gain curve along with the change of the RC value is shown in fig. 4, and it can be seen from fig. 4 that as the RC decreases, the dc gain of the transconductance amplifier also decreases. Even if the RC value is 1ohmF, it is not practical to make the capacitor inside the chip, so that only one port of the chip can be added, and the capacitor is made outside the chip, which increases the cost on one hand, and increases the parasitic capacitance of the gate of the PMOS transistor on the other hand, so that it is very difficult to implement the structure 2 shown in fig. 3. Meanwhile, the inventor of the present application also finds that, in the structure 1 and the structure 2, the unit gain bandwidth is increased due to the increase of the equivalent transconductance of the transconductance amplifier, but the position of the first non-dominant pole is not changed, which may cause the phase margin of the transconductance amplifier to be reduced and the stability of the transconductance amplifier to be affected.
Disclosure of Invention
The invention provides a transconductance amplifier with a novel substrate input structure, aiming at the technical problems that in the prior art, the structural design cost is increased, the unit gain bandwidth is increased due to the increase of the equivalent transconductance of the transconductance amplifier, but the position of a first non-dominant pole is not changed, the phase margin of the transconductance amplifier is reduced, and the stability of the transconductance amplifier is influenced.
In order to achieve the purpose, the invention adopts the following technical scheme:
a transconductance amplifier with a substrate input structure comprises a substrate input positive feedback input stage structure consisting of PMOS tubes M1, M2, M3 and M4, a self-bias active load structure consisting of NMOS tubes M5, M6, M7, M8, PMOS tubes M9 and M10, a constant current source and a transconductance amplifier compensation capacitor CCAnd a load capacitance CL; wherein,
the sources of the PMOS tubes M1 and M2 are connected with a power supply voltage vdd through a constant current source, the gate of the PMOS tube M1 is connected with the source of the M4, the gate of the PMOS tube M2 is connected with the source of the M3, the substrates of the PMOS tubes M2 and M3 and the gate of the M3 are connected with one path of differential signal VIN, the substrates of the PMOS tubes M1 and M4 and the gate of the M4 are connected with the other path of differential signal VIP, the drain of the PMOS tube M3 is connected with the source of the M7 and the drain of the M5, the drain of the PMOS tube M4 is connected with the source of the M4 and the drain of the M4, the sources of the NMOS tubes M4 and M4 are grounded, the drain of the NMOS tube M4 is connected with the drain of the M4 and the gates of the M4, the M4 and the M4, the drain of the NMOS tube M4, the drain of the PMOS tube M4, one end, the connection node is the output end Vout of the transconductance amplifier, the sources of the PMOS tubes M9 and M10 are connected with the power voltage vdd, the other end of the compensation capacitor Cc is connected with the drain of the M4, and the other end of the load capacitor CL is grounded.
The transconductance amplifier of the substrate input structure provided by the invention respectively connects the substrate of the PMOS tubes M3 and M4 in the input stage structure with the gates thereof, so that the gain between the substrate and the gate of the PMOS tubes M3 and M4 is 1, thereby directly adding input signals on the gates of the PMOS tubes M3 and M4, and the equivalent transconductance provided by the connection mode is stillThe connection mode and the structure are very simple, the non-ideal parasitic effect is reduced to the minimum, the idea of improving the input stage transconductance in the structure 2 can be realized, an RC network does not need to be introduced, the design cost of the circuit is greatly reduced, the circuit is very easy to realize, and the static power consumption is avoided. On the other hand, the compensation capacitor provided by the invention pushes the first non-dominant pole of the transconductance amplifier to a higher frequency, so that the unit gain bandwidth of the transconductance amplifier is increased,and a proper phase margin is kept, and the stability of the transconductance amplifier is enhanced.
Furthermore, the capacitance value of the compensation capacitor Cc is 2-4 pF.
Further, the common-mode voltage of the differential signal VIN and VIP is 0.1vdd to 0.5 vdd.
Drawings
Fig. 1 is a schematic diagram of a conventional substrate input transconductance amplifier.
Fig. 2 is a schematic diagram of a conventional substrate input transconductance amplifier input stage.
Fig. 3 is a schematic diagram of a transconductance-enhanced substrate-input transconductance amplifier.
Fig. 4 is a schematic diagram of a variation curve of the dc gain of the transconductance-enhanced transconductance amplifier with RC.
Fig. 5 is a schematic diagram of a transconductance amplifier of a substrate input structure provided by the present invention.
Fig. 6 is a schematic diagram of the equivalent transconductance Gm of the three structures of fig. 1, fig. 3 and fig. 5 varying with gmb/Gm.
Fig. 7 is a schematic diagram of the variation of the dc gain with the common-mode voltage VCM in the three structures of fig. 1, 3 and 5.
Fig. 8 is a comparison graph of simulation results of the alternating current characteristics of the three structures shown in fig. 1, 3 and 5.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further explained below by combining the specific drawings.
Referring to fig. 5, the present invention provides a transconductance amplifier with a substrate input structure, which includes a substrate input formed by PMOS transistors M1, M2, M3 and M4A positive feedback input stage structure, a self-bias active load structure consisting of NMOS transistors M5, M6, M7 and M8 and PMOS transistors M9 and M10, a constant current source, a transconductance amplifier compensation capacitor CCAnd a load capacitance CL; wherein, the sources of the PMOS tubes M1 and M2 are connected with a power voltage vdd through a constant current source 2Ib, the gates of the PMOS tubes M1 are connected with the source of the M4, the gate of the PMOS tube M2 is connected with the source of the M3, the substrates of the PMOS tubes M2 and M2 are connected with a differential signal VIN, the substrates of the PMOS tubes M2 and the gate of the M2 are connected with another differential signal VIP, the drain of the PMOS tube M2 is connected with the source of the M2 and the drain of the M2, the drain of the NMOS tube M2 is connected with the source of the M2 and the drain of the M2, the sources of the NMOS tube M2 and M2 are grounded, the drain of the NMOS tube M2 is connected with the drain of the M2 and the drains of the M2, the drain of the NMOS tube M2, one end of the compensation capacitor Ccc and one end of the load capacitor Ccc are connected with each other end of the PMOS tube M2, the drain of the PMOS tube M2 is connected with the drain of the PMOS tube M2, the drain of the compensation capacitor Ccc, the drain, the other end of the load capacitance CL is grounded.
The transconductance amplifier of the substrate input structure provided by the invention respectively connects the substrate of the PMOS tubes M3 and M4 in the input stage structure with the gates thereof, so that the gain between the substrate and the gate of the PMOS tubes M3 and M4 is 1, thereby directly adding input signals on the gates of the PMOS tubes M3 and M4, and the equivalent transconductance provided by the connection mode is stillThe connection mode and the structure are very simple, the non-ideal parasitic effect is reduced to the minimum, the idea of improving the input stage transconductance in the structure 2 can be realized, an RC network does not need to be introduced, the design cost of the circuit is greatly reduced, the circuit is very easy to realize, and the static power consumption is avoided. On the other hand, the compensation capacitor provided by the invention pushes the first non-dominant pole of the transconductance amplifier to a higher frequency, so that the unit gain bandwidth of the transconductance amplifier is increased, a proper phase margin is kept, and the stability of the transconductance amplifier is enhanced.
As a preferred embodiment, the capacitance value of the compensation capacitor Cc is 2-4 pF, so that a good compensation effect can be realized under the condition of not occupying too large chip area.
As a preferred embodiment, the common-mode voltage of the differential signals VIN and VIP is 0.1 vdd-0.5 vdd, so that the chip can operate normally in the largest common-mode voltage range.
As a specific embodiment, in order to further verify the above advantages of the present invention, three structures shown in fig. 1, 3 and 5 are carefully designed under a 0.18 μm CMOS process, and the three structures use the same input/output tube and load tube dimensions, in this application, the compensation capacitor Cc takes 2pF, the load capacitors all take 15pF, the supply voltage vdd takes 0.5V, the input signal common mode voltage VCM takes 0.1V, and the RC in the structure 2 takes 1018 ohmF.
Transconductance enhancement coefficients of three structures are dependent on gmb/gm(the larger this ratio, the larger the gain) is shown in fig. 6, and the direct current gain (DC gain) with the common mode voltage VCM is shown in fig. 7; in the trend graphs shown in fig. 6 and 7, "projected" represents the result of the trend in the present invention, "2" represents the result of the trend in the structure of fig. 2, and "1" represents the result of the trend in the structure of fig. 1. As can be seen from fig. 6, the transconductance enhancement factor of the present invention is the same as structure 2 under ideal conditions; as can be seen from fig. 7, in the case of the common-mode voltage VCM variation, the dc gain of the present invention is the same as that of the structure 2 under the ideal condition, but the structure 2 is very costly to implement, and the present invention is very simple to implement; compared with the structure 1, the transconductance enhancement coefficient of the invention is obviously improved; compared with the structure 1, the direct current gain of the invention is also obviously improved. Fig. 8 is a comparison graph of the ac characteristic simulation results of the three structures, in which the solid line represents the ac characteristic simulation result of the present invention, the dotted line represents the ac characteristic simulation result of the structure of fig. 2, and the central line represents the ac characteristic simulation result of the structure of fig. 1. As can be seen from fig. 8, transconductance is amplified due to the compensation capacitor of the present inventionThe first non-dominant pole of the amplifier pushes higher frequencies, so the present invention obtains a larger Phase margin (Phase margin) compared to the structures 1 and 2, in other words, the present invention can provide a larger Unity-gain bandwidth (Unity-gain bandwidth) under the condition of obtaining the same Phase margin. In summary, the present invention enables a transconductance amplifier to achieve a better figure of merit (FOM) than the two conventional structures. The simulation results of the three basic parameters of the structure are shown in the following table 1.
Table 1:
Parameter structure 1 Structure 2 The invention
Power supply(V) 0.5 0.5 0.5
Technology(μm) 0.18 0.18 0.18
Capacitive load(pF) 15 15 15
Unity-gain bandwidth(MHz) 0.61 1.15 1.22
Phase margin(°) 60 40 55
DC gain(dB) 62.2 69.9 69.9
Power consumption(μW) 1.8 1.8 1.8
FOM(dB.MHz/μW) 21 44 47
As can be seen from Table 1, under the same simulation conditions, the Unity-gain bandwidth (Unity-gain bandwidth) of the invention is improved by nearly one time compared with the structure 1; compared with the structure 2, the Unity-gain bandwidth (Unity-gain bandwidth) is also improved, and the Phase margin (Phase margin) is obviously improved. In summary, the figure of merit (FOM) of the present invention is greatly improved compared to structures 1 and 2.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures made by using the contents of the present specification and the drawings can be directly or indirectly applied to other related technical fields, and are within the scope of the present invention.

Claims (3)

1. A transconductance amplifier with a substrate input structure is characterized by comprising a substrate input positive feedback input stage structure consisting of PMOS (P-channel metal oxide semiconductor) tubes M1, M2, M3 and M4, a self-bias active load structure consisting of NMOS (N-channel metal oxide semiconductor) tubes M5, M6, M7, M8, PMOS (P-channel metal oxide semiconductor) tubes M9 and M10, a constant current source and a transconductance amplifier compensation capacitor CCAnd a load capacitance CL; wherein,
the sources of the PMOS tubes M1 and M2 are connected with a power supply voltage vdd through a constant current source, the gate of the PMOS tube M1 is connected with the source of the M4, the gate of the PMOS tube M2 is connected with the source of the M3, the substrates of the PMOS tubes M2 and M3 and the gate of the M3 are connected with one path of differential signal VIN, the substrates of the PMOS tubes M1 and M4 and the gate of the M4 are connected with the other path of differential signal VIP, the drain of the PMOS tube M3 is connected with the source of the M7 and the drain of the M5, the drain of the PMOS tube M4 is connected with the source of the M4 and the drain of the M4, the sources of the NMOS tubes M4 and M4 are grounded, the drain of the NMOS tube M4 is connected with the drain of the M4 and the gates of the M4, the M4 and the M4, the drain of the NMOS tube M4, the drain of the PMOS tube M4, one end, the connection node is the output end Vout of the transconductance amplifier, the sources of the PMOS tubes M9 and M10 are connected with the power voltage vdd, the other end of the compensation capacitor Cc is connected with the drain of the M4, and the other end of the load capacitor CL is grounded.
2. The transconductance amplifier of a substrate input structure of claim 1, wherein the capacitance value of the compensation capacitor Cc is 2-4 pF.
3. The transconductance amplifier of substrate-input architecture as claimed in claim 1, wherein the common mode voltage of the differential signals VIN and VIP is 0.1vdd to 0.5 vdd.
CN201610039247.3A 2016-01-21 2016-01-21 A kind of trsanscondutance amplifier of substrate input structure Active CN105720935B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610039247.3A CN105720935B (en) 2016-01-21 2016-01-21 A kind of trsanscondutance amplifier of substrate input structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610039247.3A CN105720935B (en) 2016-01-21 2016-01-21 A kind of trsanscondutance amplifier of substrate input structure

Publications (2)

Publication Number Publication Date
CN105720935A CN105720935A (en) 2016-06-29
CN105720935B true CN105720935B (en) 2018-01-09

Family

ID=56153645

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610039247.3A Active CN105720935B (en) 2016-01-21 2016-01-21 A kind of trsanscondutance amplifier of substrate input structure

Country Status (1)

Country Link
CN (1) CN105720935B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106788279B (en) * 2016-12-01 2020-02-14 北京航空航天大学 Low-sensitivity substrate input amplifier
CN106921349B (en) * 2017-03-02 2020-10-09 中国电子科技集团公司第二十四研究所 Amplifier based on inverter structure
CN109872736B (en) * 2017-12-04 2021-03-05 长鑫存储技术有限公司 Buffer circuit, clock tree, memory and application specific integrated circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101420206A (en) * 2007-10-23 2009-04-29 株式会社理光 Operation amplifier
CN102394582A (en) * 2011-10-14 2012-03-28 西安电子科技大学 Substrate drive low voltage operational amplifier circuit
CN103684299A (en) * 2013-12-31 2014-03-26 苏州市职业大学 Low-voltage low-power consumption bulk-driven operational amplifier

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2896051B1 (en) * 2006-01-09 2008-04-18 St Microelectronics Sa SERIES VOLTAGE VOLTAGE REGULATOR WITH LOW VOLTAGE INSERTION

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101420206A (en) * 2007-10-23 2009-04-29 株式会社理光 Operation amplifier
CN102394582A (en) * 2011-10-14 2012-03-28 西安电子科技大学 Substrate drive low voltage operational amplifier circuit
CN103684299A (en) * 2013-12-31 2014-03-26 苏州市职业大学 Low-voltage low-power consumption bulk-driven operational amplifier

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于EKV衬底驱动MOSFETs的超低功耗运算跨导放大器设计;柳美莲;《万方学位论文数据库》;20070523;全文 *

Also Published As

Publication number Publication date
CN105720935A (en) 2016-06-29

Similar Documents

Publication Publication Date Title
CN105720936B (en) A kind of trsanscondutance amplifier based on automatic biasing cascode structure
CN111176358B (en) Low-power-consumption low-dropout linear voltage regulator
CN105720927B (en) A kind of frequency compensated trsanscondutance amplifier
CN105141265B (en) A kind of operation transconductance amplifier of gain lifting
CN107104641B (en) Neural signal single-ended amplifier capable of simultaneously realizing low power consumption and low noise
US8576007B2 (en) High speed amplifier
CN105720935B (en) A kind of trsanscondutance amplifier of substrate input structure
CN107092295A (en) A kind of high Slew Rate fast transient response LDO circuit
CN105227142A (en) A kind of low pressure Foldable cascade trsanscondutance amplifier
CN111478671A (en) Novel low-noise amplifier applied to Sub-GHz frequency band
CN106026954B (en) Operational Amplifier Frequency Compensation circuit
CN110798203A (en) High-linearity unit-gain voltage buffer under nano-scale CMOS (complementary metal oxide semiconductor) process
Safari et al. A simple low voltage, high output impedance resistor based current mirror with extremely low input and output voltage requirements
JP7005022B2 (en) Amplifier
CN111384940B (en) High-linearity wide-swing CMOS voltage follower
CN106921349B (en) Amplifier based on inverter structure
CN110649903A (en) Differential amplifier with high common-mode dynamic range and constant PVT
CN113809998A (en) Folding type cascode operational amplifier and electronic equipment
CN110798163B (en) Wide-swing unit gain voltage buffer
CN210724703U (en) Wide-swing unit-gain voltage buffer
US20130015918A1 (en) High speed amplifier
CN111865243A (en) Variable gain amplifier suitable for biomedical signal acquisition analog front end
CN109416552B (en) Low dropout linear regulator
CN115378384B (en) Variable gain amplifier with three-stack structure
JP6230903B2 (en) Low noise amplifier

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant