CN104053306A - PCB device bit number design and wrongly marked position inspection method - Google Patents

PCB device bit number design and wrongly marked position inspection method Download PDF

Info

Publication number
CN104053306A
CN104053306A CN201410269487.3A CN201410269487A CN104053306A CN 104053306 A CN104053306 A CN 104053306A CN 201410269487 A CN201410269487 A CN 201410269487A CN 104053306 A CN104053306 A CN 104053306A
Authority
CN
China
Prior art keywords
item
pcb
design
lines
correct
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410269487.3A
Other languages
Chinese (zh)
Inventor
杜光芹
翟西斌
于治楼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inspur Group Co Ltd
Original Assignee
Inspur Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inspur Group Co Ltd filed Critical Inspur Group Co Ltd
Priority to CN201410269487.3A priority Critical patent/CN104053306A/en
Publication of CN104053306A publication Critical patent/CN104053306A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

The invention discloses a PCB device bit number design and wrongly marked position inspection method, and belongs to the technical field of EDA. The design method includes the steps that one layer is reserved in a PCB for bit number design, wherein the layer comprises device edge shapes and device bit numbers, and the bit number positions correspond to the device shape positions in a one-to-one mode; lines with a width of 6 are used for the bit numbers, and lines with a width of 1 are used for the device shapes. Compared with the prior art, the PCB device bit number design and wrongly marked position inspection method has the advantages of being reasonable in design, convenient to operate and the like, corresponding devices can be found when inspection board cards are debugged, wrongly marking can be avoided, the situation that non-corresponding inspection is missed due to man-made reasons is avoided, PCD design efficiency is improved, the problem that the bit numbers cannot be placed due to the fact that the board cards are too dense is solved, and powerful guarantees are provided for debugging, producing and testing board cards later.

Description

In a kind of PCB, device item designs and mislabels position inspecting method
 
Technical field
The present invention relates to EDA technical field, specifically in a kind of PCB, device item designs and mislabels position inspecting method.
Background technology
EDA technology is exactly taking computer as instrument, designer is on eda software platform, with Hardware Description Language VHDL complete design file, then by automatically completion logic compiling of computer, abbreviation, cut apart, comprehensively, optimization, layout, wiring and emulation, until for work such as adaptation compiling, logical mappings and the program downloads of specific objective chip.The appearance of EDA technology, has greatly improved efficiency and the operability of circuit design, has alleviated designer's labour intensity.
Pcb board is printed circuit board, claim again printed circuit board (PCB), printed substrate, be called for short wiring board, the normal english abbreviation PCB(Printed circuit board that uses) or write PWB(Printed wire board), taking insulation board as base material, be cut into certain size, on it, at least has a conductive pattern, and cloth porose (as component hole, fastener hole, plated-through hole etc.), be used for replacing the chassis of in the past installing electronic devices and components, and realize interconnecting between electronic devices and components.Because this plate is to adopt electron printing to make, therefore be called as " printing " circuit board.
Along with pcb board is towards high-accuracy future development, device is more and more less, plank design is more and more less, space is more and more less, practical function is more and more, item can not be adjusted and be shown on plank, and is easy to the corresponding mistake of mark, therefore in the urgent need to improving our corresponding method for designing of platform.
Summary of the invention
Technical assignment of the present invention is to provide device item in a kind of PCB and designs and mislabel position inspecting method.
Technical assignment of the present invention is realized in the following manner, in this PCB, device item method for designing step is as follows: in PCB, reserve an aspect and design item, this layer comprises device edge shape, device item, and item position and device shape position are corresponding one by one; The line that item is 6 with width, the line that device shape is 1 with width.
Described item lines and the color of device shape lines can freely arrange.
Described item lines are different with the color of device shape lines.
In PCB, to mislabel position inspecting method step as follows for device item: when inspection when item and device shape are mated when correct without prompting, displaying symbol "×" in the middle of edge shape in the time that coupling is incorrect, corresponding output item error checking table, in the time that coupling is correct, check table prompting all coupling is correct; In the time having matching error to occur, the corresponding output of the check table item information of makeing mistakes; Then according to prompting amendment error message, after amendment, rerun device item error checking table, until all correct.
Described symbol "×" size and color can freely arrange.
Described symbol "×" size and color are different.
In a kind of PCB of the present invention, device item designs and mislabels position inspecting method compared to the prior art, there is the features such as reasonable in design, easy to operate, while utilizing the method can meet bug check board, find corresponding device, can also avoid mark to make mistakes, avoid artificial origin to miss some not correspondence provings, thereby improve PCB design efficiency, and solved due to the too close problem that cannot put item of board, for follow-up debugging, production, test board provide the barrier of trying hard to keep.
Brief description of the drawings
Accompanying drawing 1 is the schematic flow sheet that in a kind of PCB, device item designed and mislabeled position inspecting method.
Embodiment
Embodiment 1:
In PCB, reserve an aspect and design item, this layer comprises device edge shape, device item, and item position and device shape position are corresponding one by one; The line that item is 6 with width, the line that device shape is 1 with width.When inspection when item and device shape are mated when correct without prompting, displaying symbol "×" in the middle of edge shape in the time that coupling is incorrect, corresponding output item error checking table, in the time that coupling is correct, check table prompting all coupling is correct; In the time having matching error to occur, the corresponding output of the check table item information of makeing mistakes; Then according to prompting amendment error message, after amendment, rerun device item error checking table, until all correct.
Embodiment 2:
In PCB, reserve an aspect and design item, this layer comprises device edge shape, device item, and item position and device shape position are corresponding one by one; The line that item is 6 with width, the line that device shape is 1 with width, the color of item lines and device shape lines can freely arrange.When inspection when item and device shape are mated when correct without prompting, displaying symbol "×" in the middle of edge shape in the time that coupling is incorrect, symbol "×" size and color can freely arrange, corresponding output item error checking table, in the time that coupling is correct, check table prompting all coupling is correct; In the time having matching error to occur, the corresponding output of the check table item information of makeing mistakes; Then according to prompting amendment error message, after amendment, rerun device item error checking table, until all correct.
Embodiment 3:
In PCB, reserve an aspect and design item, this layer comprises device edge shape, device item, and item position and device shape position are corresponding one by one; The line that item is 6 with width, the line that device shape is 1 with width, item lines are different with the color of device shape lines.When inspection when item and device shape are mated when correct without prompting, displaying symbol "×" in the middle of edge shape in the time that coupling is incorrect, symbol "×" size and color are different, corresponding output item error checking table, in the time that coupling is correct, check table prompting all coupling is correct; In the time having matching error to occur, the corresponding output of the check table item information of makeing mistakes; Then according to prompting amendment error message, after amendment, rerun device item error checking table, until all correct.
By embodiment above, described those skilled in the art can be easy to realize the present invention.But should be appreciated that the present invention is not limited to above-mentioned several embodiments.On the basis of disclosed execution mode, described those skilled in the art can the different technical characterictic of combination in any, thereby realizes different technical schemes.

Claims (6)

1. a device item method for designing in PCB, is characterized in that, this method for designing step is as follows: in PCB, reserve an aspect and design item, this layer comprises device edge shape, device item, and item position and device shape position are corresponding one by one; The line that item is 6 with width, the line that device shape is 1 with width.
2. in a kind of PCB according to claim 1, device item designs and mislabels position inspecting method, it is characterized in that, described item lines and the color of device shape lines can freely arrange.
3. in a kind of PCB according to claim 2, device item designs and mislabels position inspecting method, it is characterized in that, described item lines are different with the color of device shape lines.
4. in a PCB, device item mislabels position inspecting method, it is characterized in that, it is as follows that this mislabels position inspecting method step: when inspection when item and device shape are mated when correct without prompting, displaying symbol "×" in the middle of edge shape in the time that coupling is incorrect, corresponding output item error checking table, in the time that coupling is correct, check table prompting all coupling is correct; In the time having matching error to occur, the corresponding output of the check table item information of makeing mistakes; Then according to prompting amendment error message, after amendment, rerun device item error checking table, until all correct.
5. in a kind of PCB according to claim 4, device item mislabels position inspecting method, it is characterized in that, described symbol "×" size and color can freely arrange.
6. in a kind of PCB according to claim 5, device item mislabels position inspecting method, it is characterized in that, described symbol "×" size and color are different.
CN201410269487.3A 2014-06-17 2014-06-17 PCB device bit number design and wrongly marked position inspection method Pending CN104053306A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410269487.3A CN104053306A (en) 2014-06-17 2014-06-17 PCB device bit number design and wrongly marked position inspection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410269487.3A CN104053306A (en) 2014-06-17 2014-06-17 PCB device bit number design and wrongly marked position inspection method

Publications (1)

Publication Number Publication Date
CN104053306A true CN104053306A (en) 2014-09-17

Family

ID=51505555

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410269487.3A Pending CN104053306A (en) 2014-06-17 2014-06-17 PCB device bit number design and wrongly marked position inspection method

Country Status (1)

Country Link
CN (1) CN104053306A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104615830A (en) * 2015-02-10 2015-05-13 浪潮集团有限公司 Component attaching method and device based on PCB design
CN104809310A (en) * 2015-05-14 2015-07-29 武汉新芯集成电路制造有限公司 Replacement method of IP function modules
CN104883819A (en) * 2015-04-29 2015-09-02 广东威创视讯科技股份有限公司 PCB silkscreen processing method and system
CN105447236A (en) * 2015-11-16 2016-03-30 浪潮集团有限公司 Device bit number resetting method in PCB
CN107194094A (en) * 2017-05-27 2017-09-22 郑州云海信息技术有限公司 A kind of quick method that Color scheme is set in PCB design
CN107679264A (en) * 2017-08-17 2018-02-09 郑州云海信息技术有限公司 A kind of method that auxiliary examination position number misplaces in PCB design
CN108153963A (en) * 2017-12-21 2018-06-12 郑州云海信息技术有限公司 A kind of method that connector connection level number is checked in PCB design

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100341387C (en) * 2003-05-21 2007-10-03 华为技术有限公司 Method for automatic generating device mark in printed circuit board design
CN101458724A (en) * 2007-12-14 2009-06-17 英业达股份有限公司 Method for modifying layout and system thereof
CN101959370A (en) * 2010-10-12 2011-01-26 浪潮电子信息产业股份有限公司 Method for preventing marking position numbers of devices in wrong positions in PCB
US20120137266A1 (en) * 2010-11-30 2012-05-31 Inventec Corporation Method for Setting Width of Trace On Printed Circuit Board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100341387C (en) * 2003-05-21 2007-10-03 华为技术有限公司 Method for automatic generating device mark in printed circuit board design
CN101458724A (en) * 2007-12-14 2009-06-17 英业达股份有限公司 Method for modifying layout and system thereof
CN101959370A (en) * 2010-10-12 2011-01-26 浪潮电子信息产业股份有限公司 Method for preventing marking position numbers of devices in wrong positions in PCB
US20120137266A1 (en) * 2010-11-30 2012-05-31 Inventec Corporation Method for Setting Width of Trace On Printed Circuit Board

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104615830A (en) * 2015-02-10 2015-05-13 浪潮集团有限公司 Component attaching method and device based on PCB design
CN104883819A (en) * 2015-04-29 2015-09-02 广东威创视讯科技股份有限公司 PCB silkscreen processing method and system
CN104883819B (en) * 2015-04-29 2018-08-07 广东威创视讯科技股份有限公司 PCB silk-screen processing method and system
CN104809310A (en) * 2015-05-14 2015-07-29 武汉新芯集成电路制造有限公司 Replacement method of IP function modules
CN105447236A (en) * 2015-11-16 2016-03-30 浪潮集团有限公司 Device bit number resetting method in PCB
CN107194094A (en) * 2017-05-27 2017-09-22 郑州云海信息技术有限公司 A kind of quick method that Color scheme is set in PCB design
CN107679264A (en) * 2017-08-17 2018-02-09 郑州云海信息技术有限公司 A kind of method that auxiliary examination position number misplaces in PCB design
CN108153963A (en) * 2017-12-21 2018-06-12 郑州云海信息技术有限公司 A kind of method that connector connection level number is checked in PCB design

Similar Documents

Publication Publication Date Title
CN104053306A (en) PCB device bit number design and wrongly marked position inspection method
US9791851B2 (en) Quick processing system and method for SMT equipment
JP2019532377A (en) Printed circuit board metal mask manufacturing method and printed circuit board metal mask manufacturing system
TW200609782A (en) Physical design system and method
CN1979503A (en) Circuit-board laying-out method
CN110222381B (en) Method, system, medium and terminal for generating dynamic installation guide file for PCB assembly
CN104021251A (en) PCB check method and device
CN109543308B (en) Method for verifying design rule check script
JP2008310573A (en) Display method for cad drawing
KR101008585B1 (en) Teaching data generation apparatus and its method for pcb inspection
CN105224719A (en) A kind of method realizing same page part and sort out fast
CN101751490A (en) Method for testing distribution of drill holes
CN111625879B (en) Method capable of rapidly grabbing component Group on PCB
CN203434131U (en) Chip positioning module
CN105160082B (en) The recycling and verification method of electronic circuit
CN203814042U (en) Novel developing / etching / stripping machine
TW201339873A (en) System and method for checking layout of an integrated circuit
CN105260569A (en) Method of automatically punching ground holes based on CadenceAllegro
CN108121841B (en) Method for quickly marking PCBA (printed circuit board assembly) mounting device
CN104182587A (en) Method and device for generating PCB manufacturing sheet information
CN111209717B (en) Method for respectively outputting surface layer device coordinates
CN102789509B (en) A kind of mark does not weld the method and system of device
JP4862899B2 (en) Device simulation model generation apparatus and device simulation model generation method
CN101196943A (en) Test point error-checking method
US11900033B2 (en) Methods and systems for printed circuit board component placement and approval

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20140917

WD01 Invention patent application deemed withdrawn after publication