CN105447236A - Device bit number resetting method in PCB - Google Patents
Device bit number resetting method in PCB Download PDFInfo
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- CN105447236A CN105447236A CN201510783141.XA CN201510783141A CN105447236A CN 105447236 A CN105447236 A CN 105447236A CN 201510783141 A CN201510783141 A CN 201510783141A CN 105447236 A CN105447236 A CN 105447236A
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- pcb
- item
- bit number
- discontinuous
- components
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The present invention discloses a device bit number resetting method in a PCB, and relates to the field of EDA technologies. Specifically, a device bit number can be reset without changing a PCB and a principle logic relationship. A great bit number and a discontinuous bit number of the PCB may be adjusted, to reduce board space occupied by device bit number screen print. Collating a bit number sequence is beneficial to BOM collation, and reduces the board space occupied by device bit number screen print. Collating a bit number sequence is beneficial to BOM collation, and makes a PCB board more attractive and practical.
Description
Technical field
The present invention relates to EDA technical field, specifically device item remapping method in a kind of PCB.
Background technology
The development of electronic information technology, the complexity of PCB design is increasing, and the device on pcb board gets more and more, and the reason such as correcting, often can cause board device item discontinuous in addition, the appearance of the large item of part.In principle, device item revises hell to pay one by one, but also can cause doing over again of part PCB, strengthens the workload of principle design and PCB design, postpones development progress.Do not revise and large item silk-screen can be caused to take board space, be unfavorable for that BOM device arranges, board unsightly.How can also become the problem that Layout slip-stick artist is more and more concerned about by high-speed high-quality Design PCB.
Summary of the invention
The present invention is directed to the weak point of current needs and prior art development, device item remapping method in a kind of PCB is provided.
Device item remapping method in a kind of PCB of the present invention, the technical scheme solving the problems of the technologies described above employing is as follows: device item remapping method in described PCB, under the prerequisite not changing PCB and principle logical relation, carry out sequence to components and parts item in PCB to arrange, the large item occurred in PCB and discontinuous item are adjusted, remove the discontinuous item in PCB and large digital item, device BOM is shown more directly perceived, save pcb board space.
Preferably, in described PCB, the concrete steps of device item remapping method comprise: one, in PCB, components and parts are classified according to item: resistance class R, capacitance kind C etc.; Two, all needs checks that the components and parts type of adjustment performs adjustment according to algorithm successively; Three, mark operation before schematic diagram, complete the completely the same of PCB and schematic diagram, other all properties are constant; Four, adjust complete, to remove in PCB discontinuous item and need not item greatly.
Preferably, resistance class is started to the components and parts of item with R, check from R1, R1, R2, R3 ... Ri, Ri+1, Ri+2 ... Rj, Rj+1, Rj+2 ... R is maximum, if do not have Ri in checking, then Ri+1 changes Ri into, Ri+2 changes Ri+1 into, and Rj changes Rj-1 into, and Rj+1 changes Rj into ... the like, until do not have discontinuous item to occur stopping.
Device item remapping method in a kind of PCB of the present invention, the beneficial effect compared with prior art had is: the present invention, under the prerequisite not changing PCB and principle logical relation, arrange by carrying out sequence to components and parts item in PCB, the large item occurred in PCB and discontinuous item are adjusted, item adjustment can be completed rapidly, remove some the large items caused in the process such as discontinuous item and exploitation correcting, be conducive to device BOM to arrange, device BOM is shown more directly perceived, PCB saves space, more attractive in appearance and meet design requirement.
Figure of description
Accompanying drawing 1: the process flow diagram of device item remapping method in described PCB.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, device item remapping method in a kind of PCB of kind of the present invention is further described.
The present invention proposes device item remapping method in a kind of PCB, can under the prerequisite not changing PCB and principle logical relation, reset device item, can adjust the large item occurred in PCB and discontinuous item, save board space shared by device item silk-screen, arrange item order, device BOM is shown more directly perceived, be conducive to device BOM to arrange, and be conducive to pcb board saving space, make pcb board card more both artistic and practical.
Embodiment:
Device item remapping method in a kind of PCB described in the present embodiment, under the prerequisite not changing PCB and principle logical relation, carry out sequence to components and parts item in PCB to arrange, the large item occurred in PCB and discontinuous item are adjusted, remove the discontinuous item in PCB and large digital item, device BOM is shown more directly perceived, PCB saves space, more attractive in appearance with meet design requirement.
Device item remapping method in PCB described in the present embodiment, as shown in Figure 1, in this PCB, the concrete steps of device item remapping method comprise: one, in PCB, components and parts are classified according to item: resistance class R, capacitance kind C, chip class U etc.; Two, resistance class item is according to algorithm inspection adjustment, and capacitance kind item is according to algorithm inspection adjustment, and all needs checks that the components and parts type of adjustment performs adjustment according to algorithm successively; Three, mark operation before schematic diagram, complete the completely the same of PCB and schematic diagram, other all properties are constant; Four, adjust complete, to remove in PCB discontinuous item and need not item greatly.
Below with specific implementation process, device item remapping method in PCB described in the present embodiment is described:
1), in PCB device item is classified according to classification, generally classifies with item beginning letter, such as resistance class R, capacitance kind C, inductor L, etc.;
2), to resistance class R components and parts check one by one, such as: components and parts resistance class being started to item with R, check from R1, R1, R2, R3 ... Ri, Ri+1, Ri+2 ... Rj, Rj+1, Rj+2 ... R is maximum, if do not have Ri in checking, then Ri+1 changes Ri into, Ri+2 changes Ri+1 into, and Rj changes Rj-1 into, and Rj+1 changes Rj into ... the like, until do not have discontinuous item to occur stopping;
3), successively carry out inspection adjustment to other class devices in PCB, as electric capacity, inductance, diode, triode, magnetic bead, MOS, connector, chip etc., each classification device all carries out inspection adjustment according to this algorithm;
4), the adjustment of PCB device classification complete after, carry out PCB and operate to the front mark of schematic diagram, complete schematic diagram after front mark and PCB is synchronous;
5), in adjustment process, only change item, in PCB, all lines and other attributes all can not change, and all discontinuous items and large item are obtained for adjustment.
Above-mentioned embodiment is only concrete case of the present invention; scope of patent protection of the present invention includes but not limited to above-mentioned embodiment; any claims according to the invention and any person of an ordinary skill in the technical field to its suitable change done or replacement, all should fall into scope of patent protection of the present invention.
Claims (3)
1. device item remapping method in a PCB, it is characterized in that, under the prerequisite not changing PCB and principle logical relation, carry out sequence to components and parts item in PCB to arrange, the large item occurred in PCB and discontinuous item are adjusted, remove the discontinuous item in PCB and large digital item, device BOM is shown more directly perceived, save pcb board space.
2. device item remapping method in a kind of PCB according to claim 1, it is characterized in that, concrete steps comprise: one, in PCB, components and parts are classified according to item: resistance class R, capacitance kind C etc.; Two, all needs checks that the components and parts type of adjustment performs adjustment according to algorithm successively; Three, mark operation before schematic diagram, complete the completely the same of PCB and schematic diagram, other all properties are constant; Four, adjust complete, to remove in PCB discontinuous item and need not item greatly.
3. device item remapping method in a kind of PCB according to claim 2, is characterized in that, resistance class is started to the components and parts of item with R, check from R1, R1, R2, R3 ... Ri, Ri+1, Ri+2 ... Rj, Rj+1, Rj+2 ... R is maximum, if do not have Ri in checking, then Ri+1 changes Ri into, and Ri+2 changes Ri+1 into, and Rj changes Rj-1 into, Rj+1 changes Rj into, the like, until do not have discontinuous item to occur stopping.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510783141.XA CN105447236A (en) | 2015-11-16 | 2015-11-16 | Device bit number resetting method in PCB |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510783141.XA CN105447236A (en) | 2015-11-16 | 2015-11-16 | Device bit number resetting method in PCB |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105447236A true CN105447236A (en) | 2016-03-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510783141.XA Pending CN105447236A (en) | 2015-11-16 | 2015-11-16 | Device bit number resetting method in PCB |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105447236A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5796750A (en) * | 1994-04-22 | 1998-08-18 | Lattice Semiconductor Corporation | Method for programming a programmable logic device in an automatic tester |
| CN104053306A (en) * | 2014-06-17 | 2014-09-17 | 浪潮集团有限公司 | PCB device bit number design and wrongly marked position inspection method |
| CN104091161A (en) * | 2014-07-15 | 2014-10-08 | 山东超越数控电子有限公司 | Schematic circuit diagram netlist comparison method |
-
2015
- 2015-11-16 CN CN201510783141.XA patent/CN105447236A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5796750A (en) * | 1994-04-22 | 1998-08-18 | Lattice Semiconductor Corporation | Method for programming a programmable logic device in an automatic tester |
| CN104053306A (en) * | 2014-06-17 | 2014-09-17 | 浪潮集团有限公司 | PCB device bit number design and wrongly marked position inspection method |
| CN104091161A (en) * | 2014-07-15 | 2014-10-08 | 山东超越数控电子有限公司 | Schematic circuit diagram netlist comparison method |
Non-Patent Citations (2)
| Title |
|---|
| JK.ZHANG: "软件工程师的硬件之旅——1:在Cadence中反标元件", 《HTTP://BLOG.SINA.COM.CN/S/BLOG_6CE18C380100NQJM.HTML》 * |
| MEILINS: "在PCB 重新编号 更新到原理图-位置号和SCH同步,会扰乱布局的解决办法", 《HTTP://WWW.51HEI.COM/BBS/DPJ-39176-1.HTML》 * |
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| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160330 |
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| RJ01 | Rejection of invention patent application after publication |