CN103887253A - 使用齿状铜片的dbc板 - Google Patents

使用齿状铜片的dbc板 Download PDF

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Publication number
CN103887253A
CN103887253A CN201210570371.4A CN201210570371A CN103887253A CN 103887253 A CN103887253 A CN 103887253A CN 201210570371 A CN201210570371 A CN 201210570371A CN 103887253 A CN103887253 A CN 103887253A
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China
Prior art keywords
copper sheet
module
copper piece
copper
dentate
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CN201210570371.4A
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English (en)
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盛况
王柳敏
汪涛
郭清
谢刚
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Zhejiang University ZJU
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Zhejiang University ZJU
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本发明涉及一种DBC板覆铜片的新型结构设计,公开了一种用矩形齿状铜片取代密合矩形铜片的方法。这种设计为铜片在吸收热量后发生的膨胀或形变提供足够的空间,利于散热,保证模块的可靠性。

Description

使用齿状铜片的DBC板
技术领域
本发明涉及功率电力领域。本发明涉及一种功率器件模块的结构,改变了铜片的形状。本发明适用于硅基器件和碳化硅基器件。
背景技术
以绝缘栅双极型晶体管和金属氧化物场效应晶体管为主的功率模块,具有输出功率大并且发热量大等特点,有必要关注它的散热能力。而散热会导致铜片等材料的变形翘曲等,这会破坏模块的正常运行,所以需要考虑这些问题的解决,以确保模块的可靠运行。
功率器件模块是由半导体芯片(硅材料)(1),陶瓷(4),铜板(3、5),铝线(10)等多种材料通过压接,焊接方式组合而成的。显然,模块中不同材料对外部环境的反应各不相同,特别是由于热膨胀系数的差异,不同材料对冷热变化的形变差异很大,带来了一系列可靠性问题。
目前,对于功率模块散热能力的改善主要从改变模块组成材料类型以及改变模块各层材料厚度入手。而改变材料形状等方法还很少见。
传统的铜片是铺在陶瓷(4)的上端和下端,分为上铜片(3)和下铜片(5),通常都为矩形形状,这样的形状会导致在芯片散热时,铜片没有任何膨胀的空间,最后只能弯曲扩展,发生形变,影响散热,影响模块的正常工作。
发明内容
本发明针对传统的铜片形状对热应力的应对缺陷,以及不同散热条件带来的器件特性差异,提供一种新型的铜片设计方案,改变传统的矩形铜片为矩形齿状铜片,从而为铜片在吸收热量后发生的膨胀或形变提供足够的空间,保证模块的可靠性。
本发明的技术方案如下:
绝缘栅双极晶体管(IGBT)或金属氧化物场效应晶体管(MOSFET)功率模块主要由衬底(9),直接敷铜层,芯片(1)及层与层之间的焊锡(2、6)组成。作为连接陶瓷(4)和芯片(1),和连接陶瓷和衬底的材料,铜片(3、5)的设计是至关重要的,本发明提出利用矩形齿状铜片(13、14)来代替传统的矩形铜片,来提高铜片的热应力。
附图说明
图1为本发明涉及的功率器件模块的堆叠结构。
图2为传统的铜片结构设计示意图。
图3为本发明实施例的铜片设计示意图。
具体实施方式
下面结合附图与实施例对本发明作进一步详细描述:
实施例
图1所示为传统IGBT模块的堆叠结构示意图,主要由半导体芯片(硅材料)(1),陶瓷(4),铜板(3、5),铝线(10)等多种材料通过压接,焊接方式组合而成的。其中上铜片(3)和下铜片(5)均为密合的矩形形状。图3所示为本例提出的铜片设计方案。与常规的功率模块不同,本例提出的功率模块使用矩形铜片结构,为铜片的散热和形变提供了充足的空间,又不影响它和芯片与陶瓷件的连接,从提高铜片热应力的角度保证了模块工作的可靠性。

Claims (4)

1.一种新型功率器件模块结构,该模块采用传统的DBC堆叠次序和材料,对铜片的形状进行改变。
2.根据权利要求1所述的功率器件模块结构,其特征在于:所述的模块堆叠结构的上铜片和下铜片采用锯齿状。
3.根据权利要求2所述的铜片结构,其特征在于:铜片的锯齿间隔分布均匀,且根据散热机制设定宽度和高度。
4.根据权利要求3所述的铜片结构,其特征在于:铜片的形状为矩形锯齿,芯片之于上铜片上面。
CN201210570371.4A 2012-12-20 2012-12-20 使用齿状铜片的dbc板 Pending CN103887253A (zh)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107768326A (zh) * 2017-10-12 2018-03-06 中国科学院微电子研究所 一种碳化硅功率器件封装结构
CN108133889A (zh) * 2017-12-11 2018-06-08 上海申和热磁电子有限公司 一种双面覆铜陶瓷基板两面同时烧结的方法
WO2021244290A1 (zh) * 2020-06-05 2021-12-09 华为技术有限公司 一种光模块散热组件以及通信设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192340A (ja) * 1990-11-22 1992-07-10 Toshiba Corp 半導体用回路基板
JP2008135595A (ja) * 2006-11-29 2008-06-12 Toyota Central R&D Labs Inc パワーモジュール
CN102713020A (zh) * 2010-01-22 2012-10-03 古河电气工业株式会社 表面处理铜箔,其制造方法以及覆铜层压印刷电路板

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192340A (ja) * 1990-11-22 1992-07-10 Toshiba Corp 半導体用回路基板
JP2008135595A (ja) * 2006-11-29 2008-06-12 Toyota Central R&D Labs Inc パワーモジュール
CN102713020A (zh) * 2010-01-22 2012-10-03 古河电气工业株式会社 表面处理铜箔,其制造方法以及覆铜层压印刷电路板

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107768326A (zh) * 2017-10-12 2018-03-06 中国科学院微电子研究所 一种碳化硅功率器件封装结构
CN107768326B (zh) * 2017-10-12 2019-09-27 中国科学院微电子研究所 一种碳化硅功率器件封装结构
CN108133889A (zh) * 2017-12-11 2018-06-08 上海申和热磁电子有限公司 一种双面覆铜陶瓷基板两面同时烧结的方法
WO2021244290A1 (zh) * 2020-06-05 2021-12-09 华为技术有限公司 一种光模块散热组件以及通信设备

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Application publication date: 20140625