There is golden oxygen half diode element and the method for making thereof of terminal structure
Technical field
The present invention relates to a kind of golden oxygen half diode element with terminal structure, particularly relate to and a kind ofly there is lower leakage current and have large oppositely withstand voltage golden oxygen half diode element.
Background technology
Schottky diode is the unipolarity element using electronics as carrier, its characteristic is that speed is fast and forward conduction voltage drop value (VF) is low, but reverse biased leakage current is large (the Schottky energy barrier value causing with metal work function and doping content of semiconductor is relevant), and because the unipolarity element using electronics as carrier, there is no the compound factor of minority carrier, reverse recovery time is shorter.And P-N diode is a kind of two-carrier element, conduct electricity flow is large.But the forward conduction voltage drop value (VF) of element is generally high compared with Schottky diode, and because the effect of electric hole carrier makes P-N diode reaction speed slower, reverse recovery time is longer.
For the advantage of comprehensive Schottky diode and P-N diode, a kind of framework of gate control diode, utilize grid and the source electrode equipotential of plane formula metal-oxide half field effect transistor, be set as anode.And the diode that brilliant back of the body drain electrode is set as negative electrode is suggested.This element has and is equal to mutually with Schottky diode or lower forward conduction voltage drop value (VF).The performance of reverse biased leakage current approaches P-N diode, is low compared with Schottky diode.Reverse recovery time and Schottky diode at high temperature are close.The interface of element is can tolerable temperature higher compared with Schottky diode.In application, be compared with the element of Schottky diode more excellent performance.
About gate control diode device, its representative prior art can be consulted the United States Patent (USP) of 2003, and the component structure that No. 6624030 patent name RECTIFIER DEVICE HAVING A LATERALLY GRADEDP-N JUNCTION FOR A CHANNEL REGION discloses is representative.Refer to shown in Figure 1A ~ L, its manufacture method mainly comprises step: first, as shown in Figure 1A, provide N+ substrate 20 and the N-type epitaxial loayer 22 of having grown, the field oxide of growing up thereon (Field Oxide) 50.Then as shown in Figure 1B, carry out micro-shadow engineering and etching engineering form photoresist layer 52 on field oxide 50 after, to remove part field oxide 50, then carry out the implantation of the first implanted ions layer boron ion.Afterwards, as shown in Figure 1 C, after photoresistance is removed, the heat of carrying out the first implanted ions layer boron ion drives in, and forms the P type layer 30 at the P type Ceng28Yu center at edge.Then carry out the implantation of the second implanted ions layer boron fluoride ion.Then, as shown in Fig. 1 D and E, carry out the second micro-shadow engineering and etching engineering, covered by photoresistance 54 in component ambient, to remove the field oxide 50 of element central area.As shown in Fig. 1 F, growth grid oxic horizon 56, grid compound crystal silicon layer 58 and silicon nitride layer 60, and carry out the implantation of arsenic ion.Then as shown in Figure 1 G, the oxide layer 62 of coating one chemical vapour deposition (CVD), and carry out thereon the 3rd micro-shadow engineering, leave the photoresist layer 64 of gate pattern.Then,, as shown in Fig. 1 H, to the oxide layer 62 of chemical vapour deposition (CVD), carry out Wet-type etching.Shown in Fig. 1 I, substrate is carried out to a dry-etching to remove the silicon nitride layer 60 of part, then carry out the implantation of one the 3rd implanted ions layer boron ion, to form region 66.Then as shown in Fig. 1 J, after removing photoresist layer 64, carry out the implantation of one the 4th implanted ions layer boron ion, to form P type coating layer (P-type Pocket) 36.As shown in Fig. 1 K, substrate is carried out to a Wet-type etching, to remove oxide layer 62, and then substrate is carried out to a dry-etching to remove a part of grid compound crystal silicon layer 58.Then, carry out an arsenic ion and implant engineering, to form the implantation region 24 of a N+, as shown in Fig. 1 L, silicon nitride layer 60 is removed in the mode of wet etching, then substrate is carried out the implantation of arsenic ion.The engineering part of element completes in this, follow-up upper surface metal level successively, and micro-shadow engineering and etching engineering etc., to complete the front end engineering of wafer.
The gate control diode of being made by above-mentioned engineering method, its grid compound crystal silicon layer 58 has larger parasitic capacitance, and reaction speed is slower.And the forward conduction voltage drop value (Vf) in high-voltage product is higher.
Summary of the invention
In order to overcome prior art problem, an object of the present invention is conducive to disperse electric field and improves oppositely withstand voltage golden oxygen half diode element with terminal structure for providing a kind of.
According to one embodiment of the invention, the invention provides a kind of golden oxygen half diode element with terminal structure, comprise:
One substrate has at least one the first conductivity type epitaxial loayer, and this first conductivity type epitaxial loayer has multiple platform area;
Multiple shallow trench areas are respectively around those platform area;
Multiple the second conductive-type semiconductor areas, position is outside those platform area in shallow trench area;
Multiple grid oxic horizons lay respectively at the upper of those platform area;
Multiple polysilicon layers difference position is on those grid oxic horizons;
Multiple screen oxide are distinguished position on those polysilicon layers, and cover the part upper surface of those polysilicon layers, wherein this gate oxidation bed thickness of the thickness of this shielding field oxide;
One terminal structure comprises:
One groove, is formed on this first conductivity type epitaxial loayer;
At least one oxide layer, is positioned at this groove; And
Sidewall polycrystalline silicon layer, position is in this oxide layer of this trenched side-wall; And
One metal composite layer, covers those second conductive-type semiconductor areas, this polysilicon layer, this screen oxide and this oxide layer and this sidewall polycrystalline silicon layer in this groove at least.
Because the thickness of screen oxide is thick compared with the thickness of grid oxic horizon, therefore can reduce parasitic capacitance; Moreover oxide layer and sidewall polycrystalline silicon layer can be conducive to disperse surface field in groove, therefore can improve the oppositely withstand voltage of this gold oxygen half diode element.The P type semiconductor district that is centered around this platform area shallow trench area around, owing to having increased metal contact area, therefore reduces forward conduction voltage drop value (Vf).
Moreover, according to another embodiment of the present invention, the invention provides a kind of golden oxygen half diode element method for making with terminal structure, comprise:
(a) provide a substrate to there is at least one the first conductivity type epitaxial loayer, in this first conductivity type epitaxial loayer, there is a groove, the element area that wherein this groove one side is this gold oxygen half diode element, and the opposite side of this groove is a terminal area of this gold oxygen half diode element, wherein in this groove, at least there is an oxide layer;
(b) sequentially grow up on resulting structures a grid oxic horizon, a polysilicon layer and a screen oxide;
(c) utilize photoresistance and etching, on this element area, form multiple platforms, there is shallow trench area in platform outside, and on this trenched side-wall, form sidewall polycrystalline silicon layer;
(d) in shallow trench area, carry out implanted ions to form the second conductive-type semiconductor area; And
(e) on this element area and this groove, form a metal composite layer.
Due in the golden oxygen with the terminal structure half diode element method for making made by above-mentioned method for making, on grid oxic horizon and polysilicon layer, there is a screen oxide, therefore can reduce parasitic capacitance; Moreover CVD oxide layer and sidewall polycrystalline silicon layer can be conducive to disperse surface field, therefore can improve the oppositely withstand voltage of this gold oxygen half diode element.The P type semiconductor district that is centered around this platform area shallow trench area around, owing to having increased metal contact area, therefore reduces forward conduction voltage drop value (Vf).
Brief description of the drawings
The present invention is by following accompanying drawing and explanation, the understanding with more deep:
The gate control diode device manufacture method schematic diagram that Figure 1A to Fig. 1 L discloses for No. 6624030 for United States Patent (USP);
Fig. 2 A to Fig. 2 S is the making schematic flow sheet of golden oxygen half diode element (MOS diode) with terminal structure of the present invention.
Reference numeral
20:N+ substrate 22:N-type epitaxial loayer
24: arsenic ion implantation region 28,30: the first implanted ions layers
50: field oxide 52,54,64: photoresist layer
56: grid oxic horizon 58: grid compound crystal silicon layer
60: silicon nitride layer 62: the oxide layer of chemical vapour deposition (CVD)
66: the three implanted ions layer 20A: substrate
201: high-dopant concentration N-type silicon substrate (N+ substrate)
202: low doping concentration N-type epitaxial loayer (N-type epitaxial loayer)
203: 210: the first mask layers (field oxide) of platform
2110,3300,3800,4000: after exposure without photoresistance region
2111,3301,3801,4001: after exposure, have a photoresistance region
30A: breach 31: groove
310: oxide layer 320:CVD oxide layer
350: grid oxic horizon 360: polysilicon layer
360 ': sidewall polycrystalline silicon layer 370: screen oxide
390: shallow trench area 395:P type semiconductor region
40: metal composite layer 401: the first metal layer
402: the second metal levels
Embodiment
Refer to Fig. 2 A to Fig. 2 S, it develops a making schematic flow sheet with golden oxygen half diode (MOS diode) element of terminal structure for improving the defect of prior art means for the present invention.
From figure, we can clearly be seen that, first, provide a substrate 20A(as shown in Figure 2 A), this substrate 20A is a high-dopant concentration N-type silicon substrate 201(N+ silicon substrate) and a low doping concentration N-type epitaxial loayer 202(N-epitaxial loayer) formed.Thick in the low doping concentration N-type epitaxial loayer 202 higher-doped concentration N-type silicon substrates 201 shown in this figure, but must know that this figure is only signal explanation instantiation of the present invention, in actual element, low doping concentration N-type epitaxial loayer 202 should compare the thin of high-dopant concentration N-type silicon substrate 201 actually.
As shown in Figure 2 B, in the upper one first mask layer 210(field oxide that forms of this substrate 20A, also can be described as field oxide structure by an oxidation engineering); Then on this first mask layer 210, form one first photoresist layer 211(as shown in Figure 2 C).On this first photoresist layer 211, defining one with micro-shadow engineering subsequently has photoresistance graph area 2111, and without photoresistance district 2110(as shown in Figure 2 D).According to there being photoresistance graph area 2111 to be etched with a breach 30A(who is formed in the first mask layer 210 also corresponding to the exposed portions serve without photoresistance district 2110 to this first mask layer 210), and the left side of this breach 30A is the element area (device region) of corresponding golden oxygen half diode element of the present invention, and this breach 30A itself and right side thereof are the terminal area (termination region) of corresponding golden oxygen half diode of the present invention.Must know the left side of above-mentioned explanation and right side only for convenience of explanation at this, but not be for restriction of the present invention.
According to this photoresistance figure, this low doping concentration N-type epitaxial loayer 202 is carried out to etching more as shown in Figure 2 E subsequently, and in this substrate 20A, form a groove 31 after removing remaining this photoresistance graph area 2111.Subsequently as shown in Figure 2 F, at upper growth one deck thermal oxide layer 310 of resulting structures, due to the thinner thickness of this thermal oxide layer 310, be therefore only illustrated in the structure in groove 31, and notice also has this thermal oxide layer 310 on the surface of the first mask layer 210, be only not to illustrate.On resulting structures, grow up one deck chemical vapour deposition (CVD) thick compared with thermal oxide layer 310 (chemical vapor deposition, CVD) oxide layer 320(more subsequently as shown in Figure 2 G), this thermal oxide layer 310 is covered.
Growing up after CVD oxide layer 320, then on the whole surface of resulting structures, forming one second photoresist layer (not shown).On this second photoresist layer with micro-shadow engineering definition go out one have photoresistance graph area 3301 with without photoresistance district 3300(as shown in Fig. 2 H), wherein this has photoresistance graph area 3301 to cover the terminal area that comprises this groove 31, to expose the part corresponding to element area.Carry out subsequently an etching step, to remove in the first mask layer 210 without photoresistance district 3300, thermal oxide layer (not shown) and CVD oxide layer 320, and then removed photoresistance graph area 3301(as shown in Fig. 2 I).
Subsequently as shown in Fig. 2 J, with grow up one deck grid oxic horizon 350 and form a polysilicon layer 360 of thermal oxidation mode, wherein because the thinner thickness of grid oxic horizon 350, be not therefore specially illustrated in the grid oxic horizon 350 of terminal area in resulting structures.One deck field oxide 370 of growing up on resulting structures more subsequently, using as a screen oxide (shielding oxide layer) 370(as shown in Fig. 2 K), and coated this polysilicon layer 360; Wherein the thickness of this screen oxide 370 is thick compared with the thickness of grid oxic horizon 350, and for example its thickness can be (but not being defined as) 1000 dusts.Then on resulting structures, form again one the 3rd photoresist layer (not shown).On the 3rd photoresist layer, define one have photoresistance graph area 3801 with without photoresistance district 3800(as shown in Fig. 2 L).
As shown in Fig. 2 M, utilize this to have photoresistance graph area 3801 to make shade and carry out iso wet etching (isotropic wet etching), to remove screen oxide 370 parts that do not had photoresistance graph area 3801 to cover subsequently.As shown in Fig. 2 M, due to the anisotropic cause of wet etching, can there iing the screen oxide 370 under photoresistance graph area 3801 to form incision district (not label).Utilize subsequently dry ecthing (dry etching) to corrode the polysilicon layer 360 and grid oxic horizon 350 on resulting structures.And on groove 31 sidewalls, stay part sidewall polycrystalline silicon layer 360 ' (as shown in Fig. 2 N).On resulting structures, carry out subsequently a dry ecthing, to carry out etching for low doping concentration N-type epitaxial loayer 202, and this dry ecthing only can not affect at the CVD of terminal area oxide layer 320 and the polysilicon layer 360 in groove for silicon epitaxy layer etching again again.Borrow above-mentioned dry ecthing engineering, can on the low doping concentration N-type epitaxial loayer 202 that has photoresistance graph area 3801 both sides, form shallow trench area 390(as shown in Figure 2 O).Carry out subsequently implanted ions (for example boron ion), to form P type semiconductor district 395(as shown in Fig. 2 P on the low doping concentration N-type epitaxial loayer 202 under shallow trench area 390), because the low doping concentration N-type epitaxial loayer 202 in terminal area is coated with the first mask layer 210 and CVD oxide layer 320, therefore can not form ion implantation region at the low doping concentration N-type epitaxial loayer 202 at this place.
As shown in Fig. 2 Q, forming behind P type semiconductor district 395, remove photoresistance graph area 3801 and on resulting structures, formed a complex metal layer 40, this complex metal layer 40 comprises a first metal layer 401 and one second metal level 402, wherein the material of the first metal layer 401 is titanium or titanium nitride, and the material of the second metal level 402 is aluminum metal or other metal.Moreover this first metal layer 401 forms prior to this second metal level 402, and after forming, this first metal layer 401 can carry out a Rapid Nitriding engineering (RapidThermal Nitridation, be called for short RTN), and then this first metal layer 401 can be fully engaged in contacted structure.
Then on resulting structures, form one the 4th photoresist layer (not shown), and on the 4th photoresist layer, define one have photoresistance graph area 4001 with without photoresistance district 4000(as shown in Fig. 2 R), wherein this terminal area part that has photoresistance graph area 4001 packing element regions and at least comprise groove 31.Then utilize and have photoresistance graph area 4001 to carry out metal etch step as shade, do not had the coated the first metal layer of photoresistance graph area 4,001 401 and one second metal level 402 to remove, and remove this photoresist layer (as shown in Fig. 2 S).
As shown in Fig. 2 S, be golden oxygen half diode element with terminal structure according to engineering made of the present invention, this gold oxygen half diode element is included in the element area in dotted line left side and the terminal area on dotted line right side.This element area mainly comprises a substrate 20A(and has high-dopant concentration N-type silicon substrate 201 and low doping concentration N-type epitaxial loayer 202), wherein this low doping concentration N-type epitaxial loayer 202 there are multiple platform area 203(can be in the lump referring to Fig. 2 O, only illustrate herein one with do illustrate); In the P type semiconductor district 395 of 203 both sides, platform area; At least one grid oxic horizon 350 is positioned on the surface of platform area 203; 360 of at least one polysilicon layers are on this grid oxic horizon 350; 370 of at least one screen oxide on this polysilicon layer 360 the part upper surface of this polysilicon layer 360 (and only cover); One metal composite layer 40(comprises the first metal layer 401 and the second metal level 402) position at this P type semiconductor district 395, this polysilicon layer 360(not by field oxide 370 cover parts) and this screen oxide 370 on.Can form the source electrode of this golden oxygen half diode element in the P type semiconductor district 395 of 203 both sides, platform area, this metal composite layer 40 links source electrode and the grid of golden oxygen half element, can be used as the anode of this gold oxygen half diode element, and can form corresponding negative electrode (not with icon) at substrate 20A.
Moreover, mainly comprise this substrate 20A(in the terminal area on dotted line right side and also there is high-dopant concentration N-type silicon substrate 201 and low doping concentration N-type epitaxial loayer 202); One is formed at groove on this low doping concentration N-type epitaxial loayer 202 (not label, can referring to the element of Fig. 2 E 31); At the field oxide structure 210 in groove outside; Position is in groove and at the CVD oxide layer 320 of field oxide structure 210 upper surfaces and the sidewall polycrystalline silicon layer 360 ' on trenched side-wall; And metal composite layer 40(comprises the first metal layer 401 and the second metal level 402) in part CVD oxide layer 320 in the CVD oxide layer 320 of position in this groove, outside the upper and groove of sidewall polycrystalline silicon layer 360 '.Apply reverse voltage on this gold oxygen half diode element time, because this groove structure can effectively disperse surface field, therefore can improve the oppositely withstand voltage of this gold oxygen half diode element.
In sum; although the present invention discloses as above with preferred embodiment; but it is not in order to limit the present invention; any personnel that are familiar with correlation technique; without departing from the spirit and scope of the present invention; can do various changes and modification, therefore protection scope of the present invention should be defined and is as the criterion by appending claims.