CN103872143B - There is golden oxygen half diode element and the preparation method thereof of terminal structure - Google Patents

There is golden oxygen half diode element and the preparation method thereof of terminal structure Download PDF

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CN103872143B
CN103872143B CN201210547909.XA CN201210547909A CN103872143B CN 103872143 B CN103872143 B CN 103872143B CN 201210547909 A CN201210547909 A CN 201210547909A CN 103872143 B CN103872143 B CN 103872143B
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layer
diode element
terminal structure
oxygen half
area
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CN103872143A (en
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赵国梁
陈美玲
高隆庆
郭鸿鑫
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PFC DEVICE HOLDING LIMITED
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/405Resistive arrangements, e.g. resistive or semi-insulating field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes

Abstract

The present invention provides a kind of golden oxygen half diode element with terminal structure and preparation method thereof, and this element comprises: a substrate, has multiple platform area;And on N-type epitaxy layer surface, be one to be eclipsed the P-type semiconductor district carving a shallow trench area, it is centered around around this platform area, adds metal contact area, reduces forward conduction voltage drop value (Vf);One grid oxic horizon, is positioned on the surface of this platform area;One polysilicon layer, position is on this grid oxic horizon;One screen oxide, position mid portion on this polysilicon layer of part.This terminal structure comprises a groove;At least one oxide layer, is positioned at this groove;Sidewall polycrystalline silicon layer, position is in this oxide layer of this trenched side-wall.The thickness of screen oxide is thick compared with the thickness of grid oxic horizon, therefore can reduce parasitic capacitance;Oxide layer and sidewall polycrystalline silicon layer in groove can beneficially disperse surface field, therefore can improve the most pressure of this gold oxygen half diode element.

Description

There is golden oxygen half diode element and the preparation method thereof of terminal structure
Technical field
The present invention relates to a kind of golden oxygen half diode element with terminal structure, particularly relate to a kind of have relatively low Leakage current and have golden oxygen half diode element the most pressure relatively greatly.
Background technology
Schottky diode is the unipolarity element using electronics as carrier, and its characteristic is that speed is fast and forward conduction voltage drop Value (VF) is low, but the biggest (the Schottky energy caused with metal work function and doping content of semiconductor of reverse biased leakage current Barrier value is relevant), and because using electronics as the unipolarity element of carrier, there is no the factor that minority carrier is compound, during reverse reverting Between shorter.And P-N diode, for a kind of two-carrier element, the conduction magnitude of current is big.But the forward conduction voltage drop value (VF) of element As relatively Schottky diode high, and because the effect of electricity hole carrier makes P-N diode response speed relatively slow, reverse recovery time is relatively Long.
For the advantage of comprehensive Schottky diode Yu P-N diode, the framework of a kind of gate control diode, utilize plane formula gold The grid of oxygen half field effect transistor and source electrode isoelectric level, be set as anode.And crystalline substance back of the body drain electrode is set as that the diode of negative electrode is carried Out.This element has and is equal to mutually with Schottky diode or lower forward conduction voltage drop value (VF).Reverse biased leakage current Performance close to P-N diode, relatively Schottky diode is low.Reverse recovery time and Schottky diode phase at high temperature Closely.It is higher that the interface of element can tolerate temperature the most relatively Schottky diode.Application is more excellent compared with Schottky diode performance Good element.
About gate control diode device, its representative prior art see the United States Patent (USP) of 2003, No. 6624030 Patent name RECTIFIER DEVICE HAVING A LATERALLY GRADED P-N JUNCTION FOR A CHANNEL Component structure disclosed in REGION is representative.Referring to shown in Figure 1A~L, its manufacture method mainly includes step: first, as Shown in Figure 1A, it is provided that N+ substrate 20 and the N-type epitaxial layer 22 grown, field oxide of growing up thereon (Field Oxide) 50.The most as shown in Figure 1B, lithographic engineering and etching engineering are carried out after forming photoresist layer 52 on field oxide 50, to remove portion Branch oxide layer 50, then carries out first and layer implantation of boron ion is ion implanted.Afterwards, as shown in Figure 1 C, after photoresistance is removed, Carry out first layer heat of boron ion is ion implanted to drive in, form the P-type layer 28 at edge and the P-type layer 30 at center.Then is carried out Two are ion implanted a layer implantation for boron fluoride ion.Then, as shown in Fig. 1 D and E, the second lithographic engineering and etching engineering are carried out, in Component ambient is covered by photoresist layer 54, to remove the field oxide 50 in element central region.As shown in fig. 1f, long gate oxygen is become Change layer 56, grid compound crystal silicon layer 58 and silicon nitride layer 60, and carry out the implantation of arsenic ion.The most as shown in Figure 1 G, coating one is changed Learn the oxide layer 62 of vapour deposition, and carry out the 3rd lithographic engineering thereon, leave the photoresist layer 64 of gate pattern.Then, as Shown in Fig. 1 H, the oxide layer 62 to chemical gaseous phase deposition, carry out Wet-type etching.In shown in Fig. 1 I, substrate is carried out a dry type erosion Carve to remove the silicon nitride layer 60 of part, then carry out one the 3rd and layer implantation of boron ion is ion implanted, to form region 66.Connect As shown in figure ij, after removing removing photoresistance layer 64, carry out one the 4th and layer implantation of boron ion is ion implanted, to form p-type bag Coating (P-type Pocket) 36.As shown in figure ik, substrate is carried out a Wet-type etching, to remove oxide layer 62, the most right Substrate carries out a dry-etching to remove the grid compound crystal silicon layer 58 of a part.Then, carry out an arsenic ion and implant engineering, with shape Become the implantation region 24 of a N+, as can be seen in figure il, silicon nitride layer 60 removed in the way of wet etching, then substrate is carried out arsenic from The implantation of son.The engineering part of element completes in this, follow-up upper surface metal level the most successively, lithographic engineering and etching engineering etc., To complete the front end engineering of wafer.
The gate control diode made by above-mentioned engineering method, its grid compound crystal silicon layer 58 has bigger parasitic capacitance, reaction Speed is slower.And it is higher in the forward conduction voltage drop value (Vf) of high-voltage product.
Summary of the invention
In order to overcome prior art problem, a purpose of the present invention can beneficially be disperseed electric field for providing one and improve anti- To pressure golden oxygen half diode element with terminal structure.
According to one embodiment of the invention, the present invention provides a kind of golden oxygen half diode element with terminal structure, bag Contain:
One substrate has at least one first conductivity type epitaxial layer, and this first conductivity type epitaxial layer has multiple platform area;
Multiple shallow trench areas are respectively around those platform area;
Multiple second conductive-type semiconductor areas, position is in those outboard shallow trenches regions, platform area;
Multiple grid oxic horizons lay respectively at the upper of those platform area;
Multiple polysilicon layers position respectively is on those grid oxic horizons;
Multiple screen oxide respectively position is on those polysilicon layers, and covers the portion of upper surface of those polysilicon layers, The wherein thickness of this shielding field oxide relatively this gate oxidation thickness;
One terminal structure comprises:
One groove, is formed on this first conductivity type epitaxial layer;
At least one oxide layer, is positioned at this groove;And
Sidewall polycrystalline silicon layer, position is in this oxide layer of this trenched side-wall;And
One metal composite layer, covers those second conductive-type semiconductor areas, this polysilicon layer, this screen oxide and extremely This oxide layer in this groove few and this sidewall polycrystalline silicon layer.
Owing to the thickness of screen oxide is thick compared with the thickness of grid oxic horizon, parasitic capacitance therefore can be reduced;Furthermore, ditch In groove, oxide layer and sidewall polycrystalline silicon layer can beneficially disperse surface field, therefore can improve this gold oxygen half diode element The most pressure.The P-type semiconductor district of the shallow trench area being centered around around this platform area, owing to adding metal contact area, Therefore forward conduction voltage drop value (Vf) is reduced.
Furthermore, according to another embodiment of the present invention, the present invention provides a kind of golden oxygen half diode with terminal structure Element preparation method, comprises:
A () provides a substrate to have at least one first conductivity type epitaxial layer, have a ditch in this first conductivity type epitaxial layer Groove, wherein this groove side is an element area of this gold oxygen half diode element, and the opposite side of this groove is this gold oxygen half One terminal area of diode element, the most at least has an oxide layer;
B () is sequentially grown up a grid oxic horizon, a polysilicon layer and a screen oxide on resulting structures;
C () utilizes photoresistance and etching, form multiple platform, have shallow trench region outside platform on this element area Territory, and on this trenched side-wall, form sidewall polycrystalline silicon layer;
D () carries out being ion implanted to form the second conductive-type semiconductor area in shallow trench area;And
E () forms a metal composite layer on this element area and this groove.
Due to by the golden oxygen half diode element preparation method with terminal structure made by above-mentioned preparation method, at grid oxygen Change layer and polysilicon layer on there is a screen oxide, therefore can reduce parasitic capacitance;Furthermore, CVD oxide layer and sidewall Polysilicon layer can beneficially disperse surface field, therefore can improve the most pressure of this gold oxygen half diode element.It is centered around The P-type semiconductor district of the shallow trench area around this platform area, owing to adding metal contact area, therefore reduces forward conduction Voltage drop value (Vf).
Accompanying drawing explanation
The present invention by drawings below and explanation, with deeper into understanding:
Figure 1A to Fig. 1 L is the gate control diode device manufacture method schematic diagram that U.S. Patent No. 6624030 is disclosed;
Fig. 2 A to Fig. 2 S is the making stream of golden oxygen half diode element (MOS diode) with terminal structure of the present invention Journey schematic diagram.
Reference
20:N+ substrate 22:N-type epitaxial layer
24: arsenic ion implantation region 28,30:P type layer
50: field oxide 52,54,64: photoresist layer
56: grid oxic horizon 58: grid compound crystal silicon layer
60: silicon nitride layer 62: the oxide layer of chemical gaseous phase deposition
66: region 20A: substrate
201: high-dopant concentration N-type silicon substrate (N+ substrate)
202: low doping concentration N-type epitaxy layer (N-type epitaxial layer)
203: platform 210: the first mask layer (field oxide)
2110,3300,3800,4000: without photoresistance district
2111,3301,3801,4001: have photoresistance district
30A: breach 31: groove
310: thermal oxide layer 320:CVD oxide layer
350: grid oxic horizon 360: polysilicon layer
360 ': sidewall polycrystalline silicon layer 370: screen oxide
390: shallow trench area 395:P type semiconductor region
40: metal composite layer 401: the first metal layer
402: the second metal levels
Detailed description of the invention
Referring to Fig. 2 A to Fig. 2 S, it is developed one by the present invention by the defect improving prior art means and is had terminal The Making programme schematic diagram of golden oxygen half diode (MOS diode) element of structure.
From figure, we are it can be clearly seen that first, it is provided that a substrate 20A (as shown in Figure 2 A), this substrate 20A are one High-dopant concentration N-type silicon substrate 201 (N+ silicon substrate) is constituted with a low doping concentration N-type epitaxy layer 202 (N-epitaxial layer).In The thickness of the low doping concentration N-type epitaxy layer 202 higher-doped concentration N-type silicon substrate 201 shown in this figure, but notice this Figure is only the instantiation of the schematically illustrate present invention, and in actual element, low doping concentration N-type epitaxy layer 202 is actually The thin of high-dopant concentration N-type silicon substrate 201 should be compared.
As shown in Figure 2 B, by an oxidation engineering formed on this substrate 20A one first mask layer 210 (field oxide, also Can be described as field oxide structure);Then on this first mask layer 210, form one first photoresist layer 211 (as shown in Figure 2 C).With After on this first photoresist layer 211, define one with lithographic engineering and have photoresistance district 2111, with without photoresistance district 2110 (such as Fig. 2 D institute Show).The breach being formed in the first mask layer 210 according to there being photoresistance district 2111 that this first mask layer 210 is etched 30A (namely corresponding to the exposed portion without photoresistance district 2110), and the golden oxygen half two that the left side of this breach 30A is the corresponding present invention The element area (device region) of pole tube elements, and the golden oxygen half that this breach 30A itself and right side thereof are the corresponding present invention The terminal area (termination region) of diode.In the left side of this notice described above and the only side of explanation, right side Just, rather than be the restriction for the present invention.
According to this photoresistance figure, this low doping concentration N-type epitaxy layer 202 is etched the most as shown in Figure 2 E again, and goes In this substrate 20A, a groove 31 is formed after having photoresistance district 2111 except remaining this.The most as shown in Figure 2 F, at resulting structures One layer of thermal oxide layer 310 of upper growth, due to the thinner thickness of this thermal oxide layer 310, be the most only shown in the knot in groove 31 Structure, and notice also has this thermal oxide layer 310 on the surface of the first mask layer 210, is only not to illustrate.Subsequently in institute One layer of relatively thermal oxide layer 310 thickness of growing up again in structure chemical gaseous phase deposition (chemical vapor deposition, CVD) oxide layer 320 (as shown in Figure 2 G), covers this thermal oxide layer 310.
After CVD oxide layer 320 of having grown up, on the whole surface of resulting structures, form one second photoresist layer (do not scheme Show).On this second photoresist layer, go out one with lithographic engineering definition have photoresistance district 3301 and without photoresistance district 3300 (as illustrated in figure 2h), Wherein this has photoresistance district 3301 to cover the terminal area comprising this groove 31, to expose the part corresponding to element area.Subsequently Carry out an etching step, to remove in the first mask layer 210, thermal oxide layer (not shown) and the CVD oxidation without photoresistance district 3300 Layer 320, and then removed photoresistance district 3301 (as shown in figure 2i).
The most as shown in fig. 2j, in resulting structures with thermal oxide mode grow up one layer of grid oxic horizon 350 and formed more than one Crystal silicon layer 360, wherein because the thinner thickness of grid oxic horizon 350, is the most specially shown in the grid oxygen of terminal area Change layer 350.Grow up on resulting structures subsequently one layer of field oxide, using as a screen oxide (shielding oxide Layer) 370 (as shown in figure 2k), and it is coated with this polysilicon layer 360;The wherein thickness of this screen oxide 370 relatively gate oxidation The thickness of layer 350 be thickness, and such as its thickness can be (but being not limited to) 1000 angstroms.Then on resulting structures, form one the 3rd Photoresist layer (not shown).On the 3rd photoresist layer, define one have photoresistance district 3801 and without photoresistance district 3800 (such as Fig. 2 L institute Show).
The most as shown in figure 2m, utilize this to have photoresistance district 3801 to make shade and carry out iso wet etching (isotropic Wet etching), to remove screen oxide 370 part not had photoresistance district 3801 to cover.As shown in figure 2m, due to wet The anisotropic reason of etching, the screen oxide 370 under having photoresistance district 3801 can form incision district (non-label).Profit subsequently The polysilicon layer 360 on resulting structures and grid oxic horizon 350 is corroded with dry ecthing (dry etching).And in groove 31 The sidewall polycrystalline silicon layer 360 ' (as shown in figure 2n) of part is left on sidewall.A dry corrosion is carried out subsequently again on resulting structures Carving, to be etched for low doping concentration N-type epitaxy layer 202, and this dry ecthing etches without shadow only for silicon epitaxy layer Ring at the CVD oxide layer 320 of terminal area and the polysilicon layer 360 in groove.By means of above-mentioned dry ecthing engineering, can there iing light Shallow trench area 390 (as shown in Figure 2 O) is formed in the low doping concentration N-type epitaxy layer 202 of resistance both sides, district 3801.Carry out subsequently (such as boron ion) is ion implanted, partly leads with formation p-type in the low doping concentration N-type epitaxy layer 202 under shallow trench area 390 Body district 395 (as shown in figure 2p), owing to being coated with the first mask layer 210 in the low doping concentration N-type epitaxy layer 202 of terminal area And CVD oxide layer 320, low doping concentration N-type epitaxy layer 202 the most in this place will not form ion implantation region.
As shown in fig. 2q, after forming P-type semiconductor district 395, remove photoresistance district 3801 and formed on resulting structures One complex metal layer 40, this complex metal layer 40 comprises the first metal layer 401 and one second metal level 402, wherein first gold medal The material belonging to layer 401 is titanium or titanium nitride, and the material of the second metal level 402 is aluminum metal or other metal.Furthermore this is years old One metal level 401 is formed prior to this second metal level 402, and can carry out a Rapid Nitriding after this first metal layer 401 is formed Engineering (Rapid Thermal Nitridation, be called for short RTN), so make this first metal layer 401 can be fully engaged with in In the structure contacted.
Then on resulting structures, form one the 4th photoresist layer (not shown), and on the 4th photoresist layer, define one have Photoresistance district 4001 is with without photoresistance district 4000 (as shown in Fig. 2 R), and wherein this has packing element region, photoresistance district 4001 and includes at least The terminal area part of groove 31.Followed by there being photoresistance district 4001 to carry out metal etching step as shade, with remove not by There are the first metal layer 401 and one second metal level 402 that photoresistance district 4001 is coated with, and remove this photoresist layer (as shown in Fig. 2 S).
As shown in Fig. 2 S, for according to golden oxygen half diode element with terminal structure made by engineering of the present invention, it is somebody's turn to do Gold oxygen half diode element is included in the element area on the left of dotted line and the terminal area on the right side of dotted line.This element area is main Comprise a substrate 20A (there is high-dopant concentration N-type silicon substrate 201 and low doping concentration N-type epitaxy layer 202), wherein this low-mix Miscellaneous concentration N-type epitaxial layer 202 has multiple platform area 203 (can see Fig. 2 O in the lump, be shown here only to make to illustrate);? The P-type semiconductor district 395 of both sides, platform area 203;At least one grid oxic horizon 350 is positioned on the surface of platform area 203;At least one Polysilicon layer 360 is on this grid oxic horizon 350;At least one screen oxide 370 on this polysilicon layer 360 (and only Cover the portion of upper surface of this polysilicon layer 360);One metal composite layer 40 (comprises the first metal layer 401 and the second metal level 402) position in this P-type semiconductor district 395, this polysilicon layer 360 (not by field oxide covering part) and this screen oxide 370 On.The source electrode of this gold oxygen half diode element, this metal composite layer can be formed in the P-type semiconductor district 395 of both sides, platform area 203 40 source electrode linking gold oxygen half element and grids, as the anode of this gold oxygen half diode element, and can be able to be formed at substrate 20A Corresponding negative electrode (not with icon).
Furthermore, the terminal area on the right side of dotted line mainly comprises this substrate 20A and (also has high-dopant concentration N-type silicon substrate 201 and low doping concentration N-type epitaxy layer 202);One groove being formed in this low doping concentration N-type epitaxy layer 202 (non-label, Can be found in the element 31 of Fig. 2 E);Field oxide structure 210 outside groove;Position is in groove and at field oxide structure 210 The CVD oxide layer 320 of upper surface and the sidewall polycrystalline silicon layer 360 ' on trenched side-wall;And metal composite layer 40 (comprises first Metal level 401 and the second metal level 402) in the CVD oxide layer 320 in this groove of the position, sidewall polycrystalline silicon layer 360 ' is upper and ditch In part CVD oxide layer 320 outside groove.When this gold oxygen half diode element applies backward voltage, owing to this groove is tied Structure can effectively disperse surface field, therefore can improve the most pressure of this gold oxygen half diode element.
In sum, although the present invention discloses as above with preferred embodiment, but it is not limited to the present invention, appoint What is familiar with the personnel of correlation technique, without departing from the spirit and scope of the present invention, can make various change and modification, therefore this Bright protection domain should be defined by appending claims and is as the criterion.

Claims (16)

1. golden oxygen half diode element with terminal structure, it is characterised in that comprise:
One substrate, has at least one first conductivity type epitaxial layer, and this first conductivity type epitaxial layer has multiple platform area;
Multiple shallow trench areas, respectively around each platform of those platform area;
Multiple second conductive-type semiconductor areas, position is in those outboard shallow trenches regions, platform area;
Multiple grid oxic horizons, lay respectively on those platform area;
Multiple polysilicon layers, position is on those grid oxic horizons respectively;
Multiple screen oxide, position is on those polysilicon layers respectively, and covers the portion of upper surface of those polysilicon layers, wherein The thickness of this screen oxide relatively this gate oxidation thickness;
One terminal structure, comprises:
One groove, is formed on this first conductivity type epitaxial layer;
At least one oxide layer, is positioned at this groove;And
Sidewall polycrystalline silicon layer, position is in this oxide layer of this trenched side-wall;And
One metal composite layer, covers those second conductive-type semiconductor areas, this polysilicon layer, this screen oxide and at least should This oxide layer in groove and this sidewall polycrystalline silicon layer.
Golden oxygen half diode element with terminal structure the most according to claim 1, it is characterised in that this first conduction Type is N-type;Second conductivity type is p-type.
Golden oxygen half diode element with terminal structure the most according to claim 1, it is characterised in that this metal composite Layer comprises a first metal layer and one second metal level.
Golden oxygen half diode element with terminal structure the most according to claim 3, it is characterised in that this first metal Layer is titanium or titanium nitride.
Golden oxygen half diode element with terminal structure the most according to claim 3, it is characterised in that this second metal Layer is aluminum.
Golden oxygen half diode element with terminal structure the most according to claim 1, it is characterised in that also comprise one Oxide layer structure, on this first conductivity type epitaxial layer being positioned in terminal structure, and outside this groove.
Golden oxygen half diode element with terminal structure the most according to claim 4, it is characterised in that at this first gold medal After belonging to layer formation, then carry out a Rapid Nitriding project treatment.
8. a golden oxygen half diode element preparation method with terminal structure, it is characterised in that comprise:
A () provides a substrate, this substrate has at least one first conductivity type epitaxial layer, has one in this first conductivity type epitaxial layer Groove, wherein this groove side is an element area of this gold oxygen half diode element, and the opposite side of this groove is this gold oxygen One terminal area of half diode element, the most at least has an oxide layer;
B () sequentially grows a grid oxic horizon, a polysilicon layer and a screen oxide on resulting structures;
C () utilizes photoresistance and etching, form multiple platform on this element area, has and put down around those outside those platforms The shallow trench area of each platform in platform, and on this trenched side-wall, form sidewall polycrystalline silicon layer;
D () carries out being ion implanted to form the second conductive-type semiconductor area in this shallow trench area;And
E () forms a metal composite layer on this element area and this groove.
The golden oxygen half diode element preparation method with terminal structure the most according to claim 8, it is characterised in that step C () also comprises:
(c1) photoresistance and isotropic etching are used, to remove the screen oxide not covered by photoresistance.
The golden oxygen half diode element preparation method with terminal structure the most according to claim 9, it is characterised in that in step Suddenly also comprise after (c1):
(c2) use photoresistance and the anisotropic etching for polysilicon layer Yu grid oxic horizon, do not covered by photoresistance to remove Polysilicon layer and grid oxic horizon.
The 11. golden oxygen half diode element preparation methods with terminal structure according to claim 10, it is characterised in that in step Suddenly also comprise after (c2):
(c3) photoresistance and the anisotropic etching for the first conductivity type epitaxial layer are used, to lose on the first conductivity type epitaxial layer Carve this shallow trench area, to define those platforms.
The 12. golden oxygen half diode element preparation methods with terminal structure according to claim 8, it is characterised in that this is years old One conductivity type is N-type;Second conductivity type is p-type.
The 13. golden oxygen half diode element preparation methods with terminal structure according to claim 8, it is characterised in that this gold Belong to composite bed and comprise a first metal layer and one second metal level.
The 14. golden oxygen half diode element preparation methods with terminal structure according to claim 13, it is characterised in that this is years old One metal level is titanium or titanium nitride, and this second metal level is aluminum.
The 15. golden oxygen half diode element preparation methods with terminal structure according to claim 14, it is characterised in that at this After the first metal layer is formed, then carry out a Rapid Nitriding project treatment.
The 16. golden oxygen half diode element preparation methods with terminal structure according to claim 8, it is characterised in that this screen Cover thickness relatively this gate oxidation thickness of oxide layer.
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