CN103811545A - Power device for improving morphology of diffusion region and manufacture method thereof - Google Patents
Power device for improving morphology of diffusion region and manufacture method thereof Download PDFInfo
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- CN103811545A CN103811545A CN201210438533.9A CN201210438533A CN103811545A CN 103811545 A CN103811545 A CN 103811545A CN 201210438533 A CN201210438533 A CN 201210438533A CN 103811545 A CN103811545 A CN 103811545A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1037—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure and non-planar channel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
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Abstract
The invention provides a power device for improving morphology of a diffusion region and a manufacture method thereof. The power device comprises a substrate, an epitaxial layer, a buried layer, and a source region. The buried layer between the source region and the epitaxial layer is a conducting channel region. A prediffusion region is formed in the epitaxial layer close to the conducting channel region. The power device further comprises a gate dielectric layer, a gate electrode, a dielectric layer, a front metal layer, a back diffusion region, and a back metal layer. According to the power device for improving morphology of the diffusion region, the prediffusion region enables the buried layer to be smoothly expanded towards the epitaxial layer so as to improve the morphology of the diffusion region at the edge of the channel, and optimize the electric field distribution of the power device under high temperature and high voltage. Therefore, the electric leakage level of the power device under high temperature and high voltage is reduced; and the thermal reliability of power devices such as MOSFET, IGBT, and the like can be substantially improved. The power device satisfies operating requirements in high temperature and large power environments. The manufacturing process of the power device is completely compatible with that of a conventional power device. The power device is simple in structure, convenient in manufacture, and has improved production efficiency and rate of finished products.
Description
Technical field
The invention belongs to essential electronic element field, relate to the preparation of semiconductor device, particularly a kind of diffusion zone that injects one deck shallow-layer low concentration after gate oxide is finished improves power device and the manufacture method thereof of diffusion zone pattern.
Background technology
At present, the positive technique of power MOSFET and IGBT mainly comprises the steps: that device to prepare on N-type substrate describes as example, on N-type substrate, first define active area by photoetching technique, then the gate oxide of growing, the N-type of reinjecting impurity improves device J-FET effect, then deposit spathic silicon, by lithographic definition and etch figure, and inject P type ion and drive in formation P-diffusion region in the region that there is no polysilicon and gate oxide, in P-diffusion region respectively with lithographic definition and inject P type ion and N-type ion form HeN+ district of P+ district, then the boron-phosphorosilicate glass of growing is in the above used as grid electrode front, the separator of drain electrode, then define contact hole and etch away separator with photoetching, AlSi layer define connecting line and grid with photoetching in deposit, drain metal layer, after etching metal, do again outmost surface passivation layer, last lithographic definition goes out to encapsulate contact hole.
In above prior art, because there is the N-type region that one deck is denseer than substrate on the top layer of P-diffusion zone, in P type diffusion, because concentration problems causes surperficial P type doping to be not easy horizontal proliferation, to cause the pattern in territory, p type island region be not very desirable, thereby cause device easily to cause surface leakage in reliability testing process and lost efficacy.Existing improvement method has the impurity concentration in P-BODY district of increasing to make the P type concentration of PN junction both sides be greater than N-type concentration, thereby improves the pattern after the diffusion of P type.Also has a kind of method that improves thermal reliability, the separator arranging between grid region and emitter is silicon nitride and mixes phosphorous nitride silicon composition laminated film, although this method can improve the thermal stability of device, fundamentally do not solve that device near surface diffusion zone pattern is undesirable, complex centre is many, the large problem of leaking electricity.
Summary of the invention
The present invention is intended at least solve the technical problem existing in prior art, has proposed to special innovation a kind of power device and manufacture method thereof of improving diffusion zone pattern.
In order to realize above-mentioned purpose of the present invention, according to a first aspect of the invention, the invention provides a kind of power device that improves diffusion zone pattern, comprise the epitaxial loayer of substrate and upper formation thereof, the doping type of described epitaxial loayer is identical with the doping type of described substrate; In described epitaxial loayer, be formed with buried regions, the upper surface of described buried regions and the upper surface of epitaxial loayer are positioned at same plane, and the doping type of described buried regions is contrary with the doping type of described epitaxial loayer; In described buried regions, be formed with source region, the upper surface in described source region and the upper surface of described epitaxial loayer are positioned at same plane, and the doping type in described source region is identical with the doping type of described epitaxial loayer; In described epitaxial loayer, be formed with prediffusion district, described prediffusion district is connected with described buried regions, and the upper surface in described prediffusion district and the upper surface of described epitaxial loayer be positioned at same plane, and the doping type in described prediffusion district is identical with the doping type of described buried regions; On the upper surface of described epitaxial loayer, be formed with gate dielectric layer and grid, described gate dielectric layer and grid cover on the part in buried regions and described source region; On described grid and epitaxial loayer, be formed with dielectric layer and front metal layer; Under described substrate, be formed with back side diffusion district; And be formed with metal layer on back under described back side diffusion district.
The present invention adopts prediffusion district, buried regions is expanded gently to epitaxial loayer, the present invention has improved the pattern of trench edges diffusion zone, particularly in N-type epitaxial loayer, prepare the situation of P-type conduction raceway groove, owing to adopting prediffusion district that the P type carrier concentration of channel surface is improved, be conducive to the diffusion of diffusion region P type doping, finally make the pattern of p type diffusion region extend gently to N-type epitaxial loayer, thereby optimize the Electric Field Distribution of device under HTHP, thereby reduce the levels of leakage of device under HTHP, can significantly improve power MOSFET, the thermal reliability of IGBT constant power device.Be applicable to requirements of one's work under high temperature, high-power environment.
In a preferred embodiment of the present invention, in described buried regions, include the conducting channel district being connected with described source region and inject diffusion region, described conducting channel district is positioned between source region and described prediffusion district and the upper surface in conducting channel district and the upper surface of described epitaxial loayer are positioned at same plane, described injection diffusion region is positioned at the below in source region, and described conducting channel district is identical with the doping type of described buried regions with the doping type of described injection diffusion region.
In another kind of preferred embodiment of the present invention, described conducting channel district is connected with described prediffusion district.
Conducting channel of the present invention district is connected with prediffusion district, improve the carrier concentration of conducting channel area edge, reduce doping particle resistance extending transversely in buried regions, thereby the doping particle in it can be to laterally mild expansion of epitaxial loayer in forming process to make buried regions, improve the pattern of trench edges diffusion zone, optimize the Electric Field Distribution of device under HTHP, reduced the levels of leakage of device under HTHP.
In a preferred embodiment of the present invention, the degree of depth in described conducting channel district is less than the degree of depth sum in described injection diffusion region and source region.
In another kind of preferred embodiment of the present invention, described conducting channel district is light dope, and described injection diffusion region is heavy doping.
The degree of depth sum that the present invention passes through to control the degree of depth in conducting channel district and injects diffusion region and source region, and by buried regions is carried out to inhomogeneous doping, can reduce the conducting resistance of device, improve the withstand voltage level of device.
In a preferred embodiment of the present invention, described prediffusion district diminishes gradually along the width of epitaxial loayer depth direction.
In another kind of preferred embodiment of the present invention, described prediffusion district is wedge along the section of the epitaxial loayer degree of depth.
The present invention is at the upper surface place of epitaxial loayer, this prediffusion district is wider, along with deeply inner to epitaxial loayer, the width in prediffusion district diminishes gradually, thereby make prediffusion district higher the closer to the carrier concentration of epi-layer surface, the closer to epi-layer surface, in buried regions, the resistance extending transversely of doping particle reduces more obvious.
In a preferred embodiment of the present invention, the degree of depth in described prediffusion district is 0-5000A, and the concentration in described prediffusion district is E10-E13.
In another kind of preferred embodiment of the present invention, described dielectric layer is formed by silicon dioxide and boron-phosphorosilicate glass.
Dielectric layer of the present invention can improve the functional reliability of device, is applicable to the needs under high temperature, high-power environment.
In order to realize above-mentioned purpose of the present invention, according to a second aspect of the invention, the invention provides a kind of manufacture method of the power device that improves diffusion zone pattern, it comprises the steps:
S1: substrate is provided and forms epitaxial loayer on described substrate, the doping type of described epitaxial loayer is identical with the doping type of described substrate;
S2: form gate dielectric layer and grid on described epitaxial loayer;
S3: form prediffusion district and buried regions in described epitaxial loayer, the doping type of described buried regions is contrary with the doping type of described epitaxial loayer, the doping type in described prediffusion district is identical with the doping type of described buried regions, wherein, described prediffusion district is positioned between described epitaxial loayer and described buried regions and is positioned under gate dielectric layer, the upper surface in described prediffusion district and the upper surface of described epitaxial loayer are positioned at same plane, and the upper surface of described buried regions and the upper surface of epitaxial loayer are positioned at same plane;
S4: be formed with source region in described buried regions, the doping type in described source region is identical with the doping type of described epitaxial loayer, wherein, the upper surface in described source region and the upper surface of described epitaxial loayer are positioned at same plane;
S5: form dielectric layer on described grid and source region, and form front metal layer on described dielectric layer, described front metal layer is connected with described source region by described contact hole;
S6: form back side diffusion district under described substrate, described back side diffusion district is heavy doping;
S7: be formed with metal layer on back under described back side diffusion district.
Manufacture method of the present invention makes the device of making have good thermal stability by prediffusion district, can significantly improve the thermal reliability of MOSFET, IGBT constant power device, and manufacture process and existing power device technique are completely compatible, there is the distinguishing features such as simple in structure, easily manufactured, improved production efficiency and rate of finished products.
In a preferred embodiment of the present invention, in the time that described buried regions comprises conducting channel district and injects diffusion region, described step S51 specifically comprises the following steps:
Light dope is all carried out in the region that forms buried regions in described epitaxial loayer;
Heavy doping is carried out in injection diffusion region at described buried regions.
The present invention, by buried regions is carried out to inhomogeneous doping, can reduce the conducting resistance of device, improves the withstand voltage level of device.
In another kind of preferred embodiment of the present invention, described step S3 specifically comprises the following steps:
S31: form prediffusion district in the epitaxial loayer under gate dielectric layer;
S51: form buried regions in epitaxial loayer.
In another preferred embodiment of the present invention, described step S3 specifically comprises the following steps:
S51: form buried regions in epitaxial loayer;
S31: form prediffusion district in the epitaxial loayer under gate dielectric layer.
The present invention can form prediffusion district before buried regions, also can after buried regions, form prediffusion district, the flexibility that has improved preparation process.
Additional aspect of the present invention and advantage in the following description part provide, and part will become obviously from the following description, or recognize by practice of the present invention.
Accompanying drawing explanation
Above-mentioned and/or additional aspect of the present invention and advantage accompanying drawing below combination is understood becoming the description of embodiment obviously and easily, wherein:
Fig. 1 is the structural representation that the present invention improves a kind of preferred implementation of the power device of diffusion zone pattern;
Fig. 2-Fig. 8 is the processing step schematic diagram that improves the power device of diffusion zone pattern shown in Fig. 1.Reference numeral:
1 substrate; 2 epitaxial loayers; 3 prediffusion districts; 4 conducting channel districts; 5 inject diffusion region; 6 source regions; 7 gate dielectric layers; 8 grids; 9 silicon dioxide layers; 10 boron-phosphorosilicate glass layers; 11 front metal layers; 12 back side diffusion districts; 13 metal layer on back.
Embodiment
Describe embodiments of the invention below in detail, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has the element of identical or similar functions from start to finish.Be exemplary below by the embodiment being described with reference to the drawings, only for explaining the present invention, and can not be interpreted as limitation of the present invention.
In description of the invention, it will be appreciated that, term " longitudinally ", " laterally ", " on ", orientation or the position relationship of the indication such as D score, 'fornt', 'back', " left side ", " right side ", " vertically ", " level ", " top ", " end " " interior ", " outward " be based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, rather than indicate or imply that the device of indication or element must have specific orientation, construct and operation with specific orientation, therefore can not be interpreted as limitation of the present invention.
In description of the invention, unless otherwise prescribed and limit, it should be noted that, term " installation ", " being connected ", " connection " should be interpreted broadly, for example, can be mechanical connection or electrical connection, also can be the connection of two element internals, can be to be directly connected, and also can indirectly be connected by intermediary, for the ordinary skill in the art, can understand as the case may be the concrete meaning of above-mentioned term.
Fig. 1 is the structural representation that the present invention improves a kind of preferred implementation of the power device of diffusion zone pattern, is only the size that has provided each region of signal in figure, and concrete size can design according to the requirement of device parameters.As seen from the figure, this power device that improves diffusion zone pattern comprises substrate 1, this substrate 1 can be any backing material of preparing power MOSFET or IGBT, can be specifically but be not limited to SOI, silicon, germanium, GaAs, in the present embodiment, preferably adopt silicon, this substrate 1 is light dope, and its doping type is N-type, on this substrate 1, is formed with epitaxial loayer 2, the doping type of this epitaxial loayer 2 is identical with the doping type of substrate 1, and the doping type of this epitaxial loayer 2 is N-type.In epitaxial loayer 2, be formed with buried regions, the doping type of buried regions is contrary with the doping type of epitaxial loayer 2, and this buried regions is the doping of P type, and this buried regions comprises conducting channel district 4 and injection diffusion region 5, and epitaxial loayer 2 partly exposes with respect to buried regions.In a kind of preferred implementation of the present invention, this buried regions is Uniform Doped, and in another preferred implementation of the present invention, this buried regions is non-uniform doping, and the conducting channel district 4 of buried regions is light dope, injects diffusion region 5 for heavy doping.In buried regions, be formed with source region 6, the doping type in source region 6 is identical with the doping type of epitaxial loayer 2, this source region 6 is exposed to the upper surface of epitaxial loayer 2, this source region 6 is heavy doping, the doping type in source region 6 is identical with the doping type of epitaxial loayer 2, and the doping type in source region 6 is contrary with the doping type of buried regions, in the present embodiment, the doping type in this source region 6 is N-type, and the buried regions between source region 6 and epitaxial loayer 2 is conducting channel district 4.
Particularly, in epitaxial loayer 2, be formed with prediffusion district 3, this prediffusion district 3 is connected with buried regions, and the upper surface of the upper surface in prediffusion district 3 and epitaxial loayer 2 is positioned at same plane, and the doping type in this prediffusion district 3 is identical with the doping type of buried regions, the doping type that is prediffusion district 3 is contrary with the doping type of epitaxial loayer 2, concrete, this prediffusion district 3 is the doping of P type, its upper surface from epitaxial loayer 2 is deep into epitaxial loayer 2 inside, its thickness is 0-5000A, and its concentration is E10-E13.It should be noted that, in an embodiment of the present invention, prediffusion district 3 can form prior to buried regions, also can be later than buried regions and form.
Particularly, conducting channel district 4 and injection diffusion region 5 are formed between epitaxial loayer 2 and source region 6, and injection diffusion region 5 is positioned under source region 6.So, this prediffusion district 3 is positioned at the epitaxial loayer 2 being connected with conducting channel district 4, and this prediffusion district 3 can be connected with conducting channel district 4, also can not be connected with conducting channel district 4.As shown in Figure 1, the degree of depth in described conducting channel district 4 is less than the degree of depth sum in described injection diffusion region 5 and source region 6.
Due to the surface the closer to buried regions, the resistance extending transversely of doping particle is larger, in the present embodiment, prediffusion district 3 diminishes gradually along the width of epitaxial loayer 2 depth directions, and at the upper surface place of epitaxial loayer 2, this prediffusion district 3 is wider, along with deeply inner to epitaxial loayer 2, the width in prediffusion district 3 narrows gradually, and under preferable case, prediffusion district 3 is wedge along the section of epitaxial loayer depth direction.Due to the upper surface place at epitaxial loayer 2, this prediffusion district 3 is wider, and along with deeply inner to epitaxial loayer, the width in prediffusion district 3 narrows gradually, thereby make prediffusion district 3 higher the closer to the carrier concentration on epitaxial loayer 2 surfaces, in buried regions, the resistance extending transversely of doping particle reduces more obvious.By adopting the prediffusion district 3 identical with buried regions doping type, improve the carrier concentration of conducting channel area edge, reduce doping particle resistance extending transversely in buried regions, thereby the doping particle in it can be to laterally mild expansion of epitaxial loayer in forming process to make buried regions, improve the pattern of trench edges diffusion zone, optimize the Electric Field Distribution of device under HTHP, reduced the levels of leakage of device under HTHP.Can also be formed with isolated area epitaxial loayer 2 is interior, for the isolation between power device, this isolated area and prediffusion district 3 lay respectively at the both sides of buried regions, and it can be connected with buried regions, also can not be connected with buried regions.This isolated area can Wei Changyang district or deep trench isolation district, in the present embodiment, preferably adopts Chang Yang district to isolate.
In the present embodiment, on the part in buried regions and source region 6, be formed with gate dielectric layer 7, in the other preferred implementation of the present invention, conducting channel district 4 and between epitaxial loayer 2 and the part in source region 6 on be formed with gate dielectric layer 7, in the other preferred implementation of the present invention, also can only on conducting channel district 4, form gate dielectric layer 7, on this gate medium 7, be formed with grid 8, on the epitaxial loayer 2 on grid 8 and not covered by grid 8 and gate dielectric layer 7, be coated with one deck dielectric layer, on this dielectric layer, there is the contact hole connecting to source region, in this contact hole, be filled with front metal layer 11, this front metal layer 11 is connected with source region 6 by contact hole.Gate dielectric layer 7 can be to prepare any gate dielectric material using in transistor, can be but be not limited to high K dielectric, silicon dioxide, in the present embodiment, preferably adopts silicon dioxide.Grid 8 can be but be not limited to polysilicon gate or metal gates, in the present embodiment, preferably adopt polysilicon gate.Dielectric layer can for but be not limited to oxide, the nitride of silicon, the nitrogen oxide of silicon, the boron-phosphorosilicate glass of silicon, in the present embodiment, preferably adopt layer of silicon dioxide layer 9 and one deck boron-phosphorosilicate glass layer 10 jointly to form.Under substrate 1, be formed with back side diffusion district 12, back side diffusion district 12 is heavy doping, doping type can be identical with the doping type of substrate 1, also can be contrary with the doping type of substrate 1, when the doping type in back side diffusion district 12 identical with the doping type of substrate 1, while being N-type doping, it is MOSFET device; When the doping type in back side diffusion district 12 contrary with the doping type of substrate 1, while being the doping of P type, for I GBT device, under diffusion region 12, be formed with metal layer on back 13 overleaf, in a kind of preferred implementation of the present invention, this metal layer on back 13 comprises three-layer metal, is followed successively by titanium, nickel, gold or titanium, nickel, silver.
The invention allows for a kind of manufacture method of the power device that improves diffusion zone pattern, Fig. 2-Fig. 8 is the processing step schematic diagram that improves the power device of diffusion zone pattern shown in Fig. 1, and described method comprises the steps:
S11: substrate 1 is provided and forms epitaxial loayer 2 on substrate 1, this epitaxial loayer 2 is identical with the doping type of substrate 1;
S21: form gate dielectric layer 7 on epitaxial loayer 2;
S31: the interior formation prediffusion of epitaxial loayer 2 district 3 under gate dielectric layer 7, this prediffusion district 3 is contrary with the doping type of substrate 1;
S41: form grid 8 on gate dielectric layer 7;
S51: at the interior formation buried regions of epitaxial loayer 2, the doping type of buried regions is contrary with the doping type of epitaxial loayer 2, the doping type that is buried regions is identical with the doping type in prediffusion district 3, buried regions comprises conducting channel district 4 and injects diffusion region 5, wherein, prediffusion district 3 is between epitaxial loayer 2 and buried regions, and epitaxial loayer partly exposes with respect to buried regions.
S61: be formed with source region 6 in buried regions, this source region 6 is heavy doping, and the doping type of its doping type is identical with the doping type of epitaxial loayer 2, wherein, conducting channel district 4 and injection diffusion region 5 are formed between epitaxial loayer 2 and source region 6, and injection diffusion region 5 is positioned under source region 6.
S71: form dielectric layer on grid 8 and source region 6, there is the contact hole connecting to source region 6 on dielectric layer;
S81: form front metal layer 11 on dielectric layer, this front metal layer 11 is connected with source region 6 by contact hole;
S91: form back side diffusion district 12 under substrate 1, this back side diffusion district 12 is heavy doping;
S101: be formed with metal layer on back 13 under diffusion region 12 overleaf.
In step S11: as shown in Figure 2, substrate 1 is provided, this substrate 1 can be any backing material of preparing power MOSFET or IGBT, can be specifically but be not limited to SOI, silicon, germanium, GaAs, in the present embodiment, preferably adopt silicon, this substrate 1 is light dope, on this substrate 1, be formed with epitaxial loayer 2, this epitaxial loayer 2 is identical with the doping type of substrate 1, can be N-type, the method that forms this epitaxial loayer 2 can be but be not limited to chemical vapor deposition, can also be formed with isolated area epitaxial loayer 2 is interior, this isolated area can Wei Changyang district or deep trench isolation district, in the present embodiment, preferably adopt Chang Yang district to isolate.
In step S21: as shown in Figure 3, on epitaxial loayer 1, form gate dielectric layer 7, this gate dielectric layer 7 can be to prepare any gate dielectric material using in transistor, can be but be not limited to high K dielectric, silicon dioxide, in the present embodiment, preferably adopt silicon dioxide, the concrete grammar that forms gate dielectric layer can be but be not limited to chemical vapor deposition.In one embodiment of the invention, also can in this step, form grid 8, or, in other embodiments of the invention, also can in step S4, form.
In step S31, as shown in Figure 4, the interior formation prediffusion of epitaxial loayer 2 district 3 under gate dielectric layer 7, the doping type in this prediffusion district 3 is contrary with the doping type of epitaxial loayer 2, Ji Gai prediffusion district 3 is the doping of P type, and the upper surface of the upper surface in prediffusion district 3 and epitaxial loayer 2 is positioned at same plane, its upper surface from epitaxial loayer 2 is deep into epitaxial loayer inside, its degree of depth is 0-5000A, its concentration is E10-E13, and the concrete grammar that forms prediffusion district is photoetching, carries out Implantation in the situation that mask is sheltered, and diffusion, the method for annealing.
In step S41, as shown in Figure 5, on gate dielectric layer 7, form grid 8, this grid 8 can be but be not limited to polysilicon gate or metal gates, in the present embodiment, preferably adopt polysilicon gate, the concrete grammar that forms grid can be but be not limited to chemical vapor deposition.
In step S51, as shown in Figure 6, at the interior formation buried regions of epitaxial loayer 2, this buried regions is connected with prediffusion district 3, the doping type in this prediffusion district 3 is identical with the doping type of buried regions, buried regions is the doping of P type, this buried regions comprises conducting channel district 4 and injects diffusion region 5, in a kind of preferred implementation of the present invention, this buried regions is Uniform Doped, in another preferred implementation of the present invention, this buried regions is non-uniform doping, the conducting channel district 4 of buried regions is light dope, inject diffusion region 5 for heavy doping, the step that forms the buried regions of this non-uniform doping is: first, light dope is all carried out in the region that forms buried regions in epitaxial loayer, doping type is P type, then, carry out heavy doping in the injection diffusion region 5 of buried regions, doping type is P type.The method that forms buried regions is specially photoetching, carries out Implantation in the situation that mask is sheltered, and diffusion, the method for annealing.
In step S61, as shown in Figure 7, in buried regions, be formed with source region 6, this source region 6 is exposed to the upper surface of epitaxial loayer 2, this source region 6 is heavy doping, and its doping type is N-type, and the concrete grammar that forms source region 6 is photoetching, in the situation that sheltering, mask carries out Implantation, and diffusion, the method for annealing.
In step S71, as shown in Figure 8, form dielectric layer at grid 8 and on the epitaxial loayer 2 not covered by grid 8 and gate dielectric layer 7, on this dielectric layer, there is the contact hole connecting to source region, this dielectric layer can for but be not limited to oxide, the nitride of silicon, the nitrogen oxide of silicon, the boron-phosphorosilicate glass of silicon, in the present embodiment, preferably adopt silicon dioxide layer 9 and boron-phosphorosilicate glass layer 10.In step S81, on dielectric layer, form front metal layer 11, this front metal layer 11 is connected with source region 6 by contact hole.In the present embodiment, on front metal layer 11, can also form passivation layer, the material of this passivation layer is specifically as follows but is not limited to silicon dioxide.
In step S91 and step S101, under substrate 1, form back side diffusion district 12, this back side diffusion district 12 is heavy doping, its doping type can be identical with the doping type of substrate 1, also can be contrary with the doping type of substrate 1, in the time that the doping type in back side diffusion district 12 is identical with the doping type of substrate 1, for MOSFET device, in the time that the doping type in back side diffusion district 12 is contrary with the doping type of substrate 1, for I GBT device, the concrete grammar that forms back side diffusion district is photoetching, in the situation that sheltering, mask carries out Implantation, and diffusion, the method of annealing.Under diffusion region 12, be formed with metal layer on back 1 overleaf, this metal layer on back 13 comprises three-layer metal, is followed successively by titanium, nickel, gold or titanium, nickel, silver.When having carried out, after the 8th step, obtaining the device architecture shown in Fig. 1.
In the present embodiment, step S21 and step S41 can carry out between step S61 and step S71, can be first in the interior formation prediffusion of epitaxial loayer 2 district 3, and the doping type in this prediffusion district 3 is contrary with the doping type of substrate 1, is P type; Then at the interior formation buried regions of epitaxial loayer 2, this buried regions is connected with prediffusion district 3, and the doping type of buried regions is contrary with the doping type of substrate, is P type; In buried regions, be formed with subsequently source region 6, this source region 6 is heavy doping, and its doping type is identical with the doping type of substrate 1, is N-type; Again, on epitaxial loayer 2, form gate dielectric layer 7, on gate dielectric layer 7, form grid 8.
In the other preferred implementation of the present invention, before also step S41 can being moved on to step S31, form after gate dielectric layer 7 and grid 8, then form prediffusion district 3.
In the other preferred implementation of the present invention, can also step S31 and step S51 between exchange, first in epitaxial loayer 2, form buried regions, afterwards in the interior formation prediffusion of epitaxial loayer 2 district 3.
Manufacturing method according to the invention, in a kind of preferred implementation of the present invention, the preparation method who improves the IGBT of diffusion zone pattern is: first, on lightly doped N-shaped silicon substrate 1, form N-shaped epitaxial loayer 2 by epitaxial growth method, in present embodiment, to make DRAM cell as example on N-shaped substrate, for the device of preparing on p-type substrate, according to contrary doping type doping.Then, on N-shaped epitaxial loayer, utilize CVD (Chemical Vapor Deposition) method deposit silicon dioxide as gate dielectric layer 7 according to predetermined device architecture, utilize subsequently the polysilicon of CVD (Chemical Vapor Deposition) method deposit N-shaped impurity doping, form the grid 8 of device by chemical etching technique; Subsequently, photoetching on N-shaped epitaxial loayer, injection p-type impurity, and diffuse to form P-type thin layer through high-temperature heat treatment, i.e. prediffusion layer 3, in the present embodiment, injection source can adopt B11 or BF2, and implantation dosage is in E12 magnitude, and input energy is 10～50Kev; Again, adopt successively ion injection method to inject respectively P-from the both sides of grid and inject P+ according to predetermined structure, and forming P-conducting channel district 4 and P+ injection diffusion region 5 through high-temperature heat treatment; Then, inject N+ impurity, form source region 6; At the surface deposition dielectric layer of power device, comprise silicon dioxide layer 9 and boron-phosphorosilicate glass layer 10, and according to predetermined structure photoetching, etch metal contact hole, subsequently, at the surface deposition metal level of power device, and form front metal layer 11 according to predetermined structure photoetching etching; Then, by device thinning back side, in the situation that sheltering, mask carries out Implantation p-type impurity, and diffusion, annealing, forms back side diffusion district 12; Finally, deposit titanium, nickel, gold are formed with metal layer on back 13 under diffusion region 12 overleaf.Present embodiment, by adopting p-type prediffusion district 3, improves the p-type doping content of channel surface, and the horizontal proliferation of more favourable and P-buried regions, finally makes P-buried regions to the horizontal expansion of N-shaped epitaxial loayer, has improved diffusion pattern.
In manufacture method of the present invention, make the device of making have good thermally-stabilised by diffusion region
Property, can significantly improve the thermal reliability of MOSFET, IGBT constant power device, and manufacture process and existing power device technique completely compatible, there is the distinguishing features such as simple in structure, easily manufactured, improved production efficiency and rate of finished products.
In the description of this specification, the description of reference term " embodiment ", " some embodiment ", " example ", " concrete example " or " some examples " etc. means to be contained at least one embodiment of the present invention or example in conjunction with specific features, structure, material or the feature of this embodiment or example description.In this manual, the schematic statement of above-mentioned term is not necessarily referred to identical embodiment or example.And specific features, structure, material or the feature of description can be with suitable mode combination in any one or more embodiment or example.
Although illustrated and described embodiments of the invention, those having ordinary skill in the art will appreciate that: in the situation that not departing from principle of the present invention and aim, can carry out multiple variation, modification, replacement and modification to these embodiment, scope of the present invention is limited by claim and equivalent thereof.
Claims (13)
1. a power device that improves diffusion zone pattern, is characterized in that, comprising:
The epitaxial loayer of substrate and upper formation thereof, the doping type of described epitaxial loayer is identical with the doping type of described substrate;
In described epitaxial loayer, be formed with buried regions, the upper surface of described buried regions and the upper surface of epitaxial loayer are positioned at same plane, and the doping type of described buried regions is contrary with the doping type of described epitaxial loayer;
In described buried regions, be formed with source region, the upper surface in described source region and the upper surface of described epitaxial loayer are positioned at same plane, and the doping type in described source region is identical with the doping type of described epitaxial loayer;
In described epitaxial loayer, be formed with prediffusion district, described prediffusion district is connected with described buried regions, and the upper surface in described prediffusion district and the upper surface of described epitaxial loayer be positioned at same plane, and the doping type in described prediffusion district is identical with the doping type of described buried regions;
On the upper surface of described epitaxial loayer, be formed with gate dielectric layer and grid, described gate dielectric layer and grid cover on the part in buried regions and described source region;
On described grid and epitaxial loayer, be formed with dielectric layer and front metal layer;
Under described substrate, be formed with back side diffusion district; And
Under described back side diffusion district, be formed with metal layer on back.
2. the power device that improves diffusion zone pattern as claimed in claim 1, it is characterized in that, in described buried regions, include the conducting channel district being connected with described source region and inject diffusion region, described conducting channel district is positioned between source region and described prediffusion district and the upper surface in conducting channel district and the upper surface of described epitaxial loayer are positioned at same plane, described injection diffusion region is positioned at the below in source region, and described conducting channel district is identical with the doping type of described buried regions with the doping type of described injection diffusion region.
3. the power device that improves diffusion zone pattern as claimed in claim 2, is characterized in that, described conducting channel district is connected with described prediffusion district.
4. the power device that improves diffusion zone pattern as claimed in claim 2, is characterized in that, the degree of depth in described conducting channel district is less than the degree of depth sum in described injection diffusion region and source region.
5. the power device that improves diffusion zone pattern as claimed in claim 2, is characterized in that, described conducting channel district is light dope, and described injection diffusion region is heavy doping.
6. the power device that improves diffusion zone pattern as described in claim 1-5 any one, is characterized in that, described prediffusion district diminishes gradually along the width of epitaxial loayer depth direction.
7. the power device that improves diffusion zone pattern as claimed in claim 6, is characterized in that, described prediffusion district is wedge along the section of the epitaxial loayer degree of depth.
8. the power device that improves diffusion zone pattern as claimed in claim 6, is characterized in that, the degree of depth in described prediffusion district is 0-5000A, and the concentration in described prediffusion district is E10-E13.
9. the power device that improves diffusion zone pattern as claimed in claim 1, is characterized in that, described dielectric layer comprises silicon dioxide layer and boron-phosphorosilicate glass layer.
10. a manufacture method of improving the power device of diffusion zone pattern, is characterized in that, comprises the steps:
S1: substrate is provided and forms epitaxial loayer on described substrate, the doping type of described epitaxial loayer is identical with the doping type of described substrate;
S2: form gate dielectric layer and grid on described epitaxial loayer;
S3: form prediffusion district and buried regions in described epitaxial loayer, the doping type of described buried regions is contrary with the doping type of described epitaxial loayer, the doping type in described prediffusion district is identical with the doping type of described buried regions, wherein, described prediffusion district is positioned between described epitaxial loayer and described buried regions and is positioned under gate dielectric layer, the upper surface in described prediffusion district and the upper surface of described epitaxial loayer are positioned at same plane, and the upper surface of described buried regions and the upper surface of epitaxial loayer are positioned at same plane;
S4: be formed with source region in described buried regions, the doping type in described source region is identical with the doping type of described epitaxial loayer, wherein, the upper surface in described source region and the upper surface of described epitaxial loayer are positioned at same plane;
S5: form dielectric layer on described grid and source region, and form front metal layer on described dielectric layer, described front metal layer is connected with described source region by described contact hole;
S6: form back side diffusion district under described substrate, described back side diffusion district is heavy doping;
S7: be formed with metal layer on back under described back side diffusion district.
The manufacture method of 11. power devices that improve diffusion zone pattern as claimed in claim 10, is characterized in that, described step S3 specifically comprises the following steps:
S31: form prediffusion district in the epitaxial loayer under gate dielectric layer;
S51: form buried regions in epitaxial loayer.
The manufacture method of 12. power devices that improve diffusion zone pattern as claimed in claim 10, is characterized in that, described step S3 specifically comprises the following steps:
S51: form buried regions in epitaxial loayer;
S31: form prediffusion district in the epitaxial loayer under gate dielectric layer.
The manufacture method of 13. power devices that improve diffusion zone pattern as described in claim 11 or 12, is characterized in that, in the time that described buried regions comprises conducting channel district and injects diffusion region, described step S51 specifically comprises the following steps:
Light dope is all carried out in the region that forms buried regions in described epitaxial loayer;
Heavy doping is carried out in injection diffusion region at described buried regions.
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| CN109119483A (en) * | 2018-11-05 | 2019-01-01 | 深圳市鹏朗贸易有限责任公司 | A kind of transistor and preparation method thereof |
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