CN103811502A - 阵列基板、阵列基板的制备方法、显示装置 - Google Patents

阵列基板、阵列基板的制备方法、显示装置 Download PDF

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CN103811502A
CN103811502A CN201410052964.0A CN201410052964A CN103811502A CN 103811502 A CN103811502 A CN 103811502A CN 201410052964 A CN201410052964 A CN 201410052964A CN 103811502 A CN103811502 A CN 103811502A
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drain electrode
active layer
electrode
source electrode
array base
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姜晓辉
郭建
张家祥
田宗民
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Abstract

本发明公开了一种阵列基板、阵列基板的制备方法、显示装置,阵列基板包括设置在基底上的栅电极、栅极绝缘层、有源层、源电极和漏电极以及像素电极,有源层具有导电区域、被源电极和漏电极覆盖的覆盖区域和包围于所述覆盖区域外侧的暴露区域,像素电极搭接在漏电极、有源层的暴露区域以及栅极绝缘层的上表面上。可知,由于有源层的暴露区域的存在,沉积像素电极层薄膜时,在漏电极的坡度角较大的区域,像素电极层薄膜可以落在有源层的暴露区域上,避免了由于重力下滑导致的在漏电极的坡度角较大的区域出现像素电极断裂的情况,有效促进了像素电极和漏电极的搭接。

Description

阵列基板、阵列基板的制备方法、显示装置
技术领域
本发明涉及显示技术领域,特别涉及一种阵列基板及其制备方法,以及采用该阵列基板的显示装置。
背景技术
各向异性亦称为非均匀性,是指物体的全部或部分物理化学性质随方向的不同而各自表现出一定的差异的特性,理想的刻蚀工艺需要具备的一个重要特点就是良好的各向异性刻蚀,即只有垂直刻蚀,没有横向刻蚀。这样才能保证精确地在被刻蚀的薄膜上刻蚀出与抗蚀剂膜上完全一致的几何图形。
请参考图1,图1为现有技术一种阵列基板的结构示意图。
如图1所示,现有技术中的阵列基板包括依次设置在基底1上的栅电极2、栅极绝缘层3(GI)、有源层4、欧姆接触层5、源电极61以及漏电极62,像素电极7(ITO)搭接在漏电极62和栅极绝缘层3的上表面。
一般情况下,其制备方法为:在基底1首先形成栅电极2;然后形成栅极绝缘层3、有源层4以及欧姆接触层5;接着形成源电极61和漏电极62;最后形成像素电极7。
在上述形成源电极61和漏电极62的过程中,采用湿法刻蚀工艺,湿法刻蚀虽然操作简便,对设备要求低,但是其化学反应的各向异性较差,横向刻蚀导致薄膜上的图形的线宽比抗蚀剂膜上的线宽小,因此,精确控制性较差。
现有技术中,在源电极61和漏电极62的制备过程中,由于湿法刻蚀的各向异性较差以及精确控制性较差,因此,在刻蚀完成后漏电极62侧面形成的坡度角a较大,坡度角a的范围为80°~90°;同时,由于源漏电极金属层厚度范围为
Figure BDA0000466614370000021
,而像素电极金属层较薄,厚度范围为
Figure BDA0000466614370000022
,因此,在沉积像素电极金属层时,在上述坡度角a的侧面会由于重力作用而产生下滑,导致在此处的像素电极金属层较薄甚至出现断裂,很容易造成形成的像素电极7和漏电极62搭接不良,严重影响产品质量。
因此,如何提供一种阵列基板的制备方法,能够促进像素电极和漏电极搭接,是本领域技术人员亟需解决的技术问题。
发明内容
本发明所要解决的技术问题是提供一种阵列基板的制备方法,能够促进像素电极和漏电极搭接。
解决本发明技术问题所采用的技术方案是:
一种阵列基板,包括设置在基底上的栅电极、栅极绝缘层、有源层、源电极和漏电极以及像素电极;所述有源层具有导电区域、被所述源电极和漏电极覆盖的覆盖区域以及包围于所述覆盖区域外侧的暴露区域;像素电极搭接在所述漏电极、所述有源层的暴露区域以及所述栅极绝缘层的上表面上。
优选地,上述阵列基板中,所述有源层的暴露区域的宽度范围为0.5μm~1.0μm。
优选地,上述阵列基板中,还包括位于所述有源层与所述源电极和漏电极之间的欧姆接触层,所述欧姆接触层位于所述源电极和所述漏电极对应的区域。
优选地,上述阵列基板中,所述有源层的覆盖区域的厚度大于所述有源层的暴露区域的厚度。
本发明还公开了一种阵列基板的制备方法,包括:在基底上形成包括栅电极的图形、栅极绝缘层、包括有源层的图形;还包括:
步骤1:通过构图工艺形成源电极和漏电极,使所述有源层的图形具有导电区域、被所述源电极和漏电极覆盖的覆盖区域以及包围于所述覆盖区域外侧的暴露区域;
步骤2:在所述漏电极、所述有源层的暴露区域以及所述栅极绝缘层的上表面上形成像素电极。
优选地,上述制备方法中,所述步骤1包括:
步骤101:在所述有源层的图形上方涂覆一层源漏电极层薄膜,并在所述源漏电极层薄膜上涂覆光刻胶,曝光、显影后对源漏电极层薄膜进行刻蚀以形成源电极和漏电极的图形;
步骤102:对位于所述源电极和漏电极上保留的光刻胶的边缘进行处理,暴露出所述光刻胶外边缘下方的源电极和漏电极;
步骤103:对步骤102中暴露出的所述源电极和漏电极进行刻蚀,暴露出所述源电极和漏电极外边缘下方的有源层,形成所述有源层的暴露区域;
步骤104:剥离所述源电极和漏电极上的光刻胶。
优选地,上述制备方法中,所述步骤102包括:采用六氟化硫和氧气对所述光刻胶进行轰击,使得所述光刻胶收缩,暴露出所述光刻胶边缘下方的源电极和漏电极。
优选地,上述制备方法中,所述六氟化硫的含量范围为30~50sccm,所述氧气的含量范围为1500~2500sccm,轰击功率范围为4500~5500W,处理时间范围为30~40s。
优选地,上述制备方法中,所述步骤103包括:采用氯气和氧气对暴露出的所述源电极和漏电极进行刻蚀。
优选地,上述制备方法中,所述氯气的含量范围为800~1000sccm,所述氧气的含量范围为1600~2000sccm,轰击功率范围为3500~4500W,压力范围为30~40mT,处理时间范围为35~85s。
优选地,上述制备方法中,还包括:通过构图工艺在所述有源层与所述源电极和漏电极之间形成包括欧姆接触层的图形,所述欧姆接触层位于所述源电极和所述漏电极对应的区域。
优选地,上述制备方法中,所述步骤1还包括采用六氟化硫、氯气和氦气对所述欧姆接触层进行刻蚀,去掉所述有源层导电区域对应的欧姆接触层,保留所述源电极和漏电极对应的区域下方的欧姆接触层;同时,所述有源层的暴露区域也被部分刻蚀,使得所述有源层的覆盖区域的厚度大于所述有源层的暴露区域的厚度。
本发明还公开了一种显示装置,包括阵列基板,所述阵列基板为上述的阵列基板。
本发明的有益效果是:
本发明提供的阵列基板,包括设置在基底上的栅电极、栅极绝缘层、有源层,有源层具有导电区域、被源电极和漏电极覆盖的覆盖区域和包围于所述覆盖区域外侧的暴露区域,像素电极搭接在漏电极、有源层的暴露区域以及栅极绝缘层的上表面上。可知,由于有源层的暴露区域的存在,沉积像素电极层薄膜时,在漏电极的坡度角较大的区域,像素电极层薄膜可以落在有源层的暴露区域上,避免了由于重力下滑导致的在漏电极的坡度角较大的区域出现像素电极断裂的情况,有效促进了像素电极和漏电极的搭接。
本发明还提供了一种阵列基板的制备方法,能够制备上述的阵列基板,从而能够有效促进像素电极和漏电极的搭接。
本发明还提供了一种具有上述阵列基板的显示装置,由于采用上述阵列基板,使得显示装置的显示效果更好,产品良率更高。
附图说明
图1为现有技术一种阵列基板的结构示意图;
图2为本发明实施例提供的阵列基板的结构示意图;
图3为本发明实施例提供的阵列基板的制备方法中刻蚀形成源电极和漏电极后的示意图;
图4为本发明实施例提供的阵列基板的制备方法中对光刻胶的边缘处理后的示意图;
图5为本发明实施例提供的阵列基板的制备方法中对源电极和漏电极的外边缘刻蚀后的示意图;
图6为本发明实施例提供的阵列基板的制备方法中对欧姆接触层刻蚀后的示意图。
上图中附图标记和部件名称的对应关系为:
1基底;2栅电极;3栅极绝缘层;4有源层;5欧姆接触层;61源电极;62漏电极;7像素电极;8光刻胶。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明作进一步详细描述。
请参考图2,图2为本发明实施例提供的阵列基板的结构示意图。
如图2所示,本发明实施例提供的阵列基板,包括设置在基底1上的栅电极2、栅极绝缘层3、有源层4、源电极61和漏电极62以及像素电极7,有源层4具有导电区域、被源电极61和漏电极62覆盖的覆盖区域以及包围于该覆盖区域外侧的暴露区域,像素电极7搭接在漏电极62、有源层4的暴露区域以及栅极绝缘层3的上表面上。可知,由于有源层4的暴露区域的存在,沉积像素电极金属层时,在漏电极62的坡度角较大的区域,像素电极金属层可以落在有源层4的暴露区域上,由于有源层4的暴露区域基本为一水平平面,且对漏电极62的坡度角具有一定的减缓的作用,避免了由于重力下滑导致的在漏电极62的坡度角较大的区域出现像素电极7断裂的情况,有效促进了像素电极7和漏电极62的搭接。需要说明的是,所述有源层的导电区域是指的沟道区域,即有源层上位于源电极和漏电极之间的区域,是不被源电极和漏电极覆盖的。
具体地,上述有源层的暴露区域的宽度L的范围为0.5μm~1.0μm,即如图2所示,有源层的暴露区域的外边缘与有源层的覆盖区域的外边缘的距离范围为0.5μm~1.0μm,在这个范围内,均可以有效促进像素电极7和漏电极62的搭接。
为了促进有源层4与源电极61和漏电极62的欧姆接触性能,本发明提供的阵列基板中,还包括位于上述有源层4与源电极61和漏电极62之间的欧姆接触层5,具体地,该欧姆接触层5位于源电极61和漏电极62对应的区域。
为了进一步优化上述技术方案,本发明一种实施例中,有源层4中,有源层4的覆盖区域的厚度大于上述暴露区域的厚度,即形成一个台阶,这样,在沉积像素电极金属层时,在漏电极62的坡度角较大的区域,像素电极金属层可以落在这个台阶上,对漏电极62侧面的坡度有一个缓冲,从而进一步促进了像素电极7和漏电极62的搭接。
本发明还提供了一种阵列基板的制备方法,包括:在基底1上形成包括栅电极2的图形、栅极绝缘层3、包括有源层4的图形;还包括:
步骤1:通过构图工艺形成源电极和漏电极,使有源层的图形具有导电区域、被源电极和漏电极覆盖的覆盖区域以及包围于覆盖区域外侧的暴露区域;
步骤2:在所述漏电极、有源层的暴露区域以及栅极绝缘层的上表面上形成像素电极。
通过本发明提供的阵列基板的制备方法,制备出的阵列基板为上述的阵列基板,由于上述阵列基板具有上述技术效果,采用本发明提供的阵列基板的制备方法制备出的阵列基板也应具有相同的技术效果,即通过本发明提供的阵列基板的制备方法制备出的阵列基板,由于有源层4的暴露区域的存在,沉积像素电极层薄膜时,在漏电极62的坡度角较大的区域,像素电极层薄膜可以落在有源层4的暴露区域上,由于有源层4的暴露区域基本为一水平平面,且对漏电极62的坡度角具有一定的减缓的作用,避免了由于重力下滑导致的在漏电极62的坡度角较大的区域出现像素电极7断裂的情况,有效促进了像素电极7和漏电极62的搭接。
在阐述具体制备方法之前,应该理解,在本发明中,构图工艺,可只包括光刻工艺,或,包括光刻工艺以及刻蚀步骤,同时还可以包括打印、喷墨等其他用于形成预定图形的工艺;光刻工艺,是指包括成膜、曝光、显影等工艺过程的利用光刻胶、掩模板、曝光机等形成图形的工艺。可根据本发明中所形成的阵列基板的结构选择相应的构图工艺。
请参考图3-图5,其中,图3为本发明实施例提供的阵列基板的制备方法中刻蚀形成源电极和漏电极的图形后的示意图;图4为本发明实施例提供的阵列基板的制备方法中对光刻胶的边缘处理后的示意图;图5为本发明实施例提供的阵列基板的制备方法中对源电极和漏电极的边缘刻蚀后的示意图。
本领域技术人员可知,在基底1上形成包括源电极61和漏电极62包括以下工艺:在源漏电极层上涂覆光刻胶,对光刻胶进行曝光显影,形成如图3所示的光刻胶8图形,而后采用湿法刻蚀形成源电极61和漏电极62。
具体地,上述步骤1还包括以下步骤:
步骤101:在所述有源层的图形上方涂覆一层源漏电极层薄膜,并在所述源漏电极层薄膜上涂覆光刻胶,曝光、显影后对源漏电极层薄膜进行刻蚀以形成源电极和漏电极;
步骤102:如图4所示,对位于源电极61和漏电极62上保留的光刻胶8的边缘进行处理,暴露出光刻胶8外边缘下方的源电极61和漏电极62。
具体的,该步骤具体采用六氟化硫和氧气对光刻胶8进行轰击,使得光刻胶8收缩,从而暴露出光刻胶8边缘下方的源电极61和漏电极62。由于光刻胶8的主要成分为酚醛树脂,通入氧气,光刻胶8的表面容易被氧化,使得处理后的光刻胶8收缩,且光刻胶8被氧化的过程为各向同性的过程,即在垂直和水平方向上的收缩速率相同,从而,呈现出如图4所示的形状。需要说明的是,图3所示的光刻胶8的图形,在有源层4的导电区域上方,光刻胶8的图形凸出于源电极和漏电极的区域,这是由于湿法刻蚀源电极和漏电极时的各向异性所致,而在上述对光刻胶8的进一步处理过程中,图3中所示的光刻胶8中的内外两个边缘均收缩,但由于光刻胶8的内侧光刻胶本来就是是凸出于源电极和漏电极的,因此不会暴露出光刻胶内边缘下方的源电极和漏电极。同时由于氧气的存在,有源层4导电区域上表面被氧化,形成较薄的氧化膜,阻挡了六氟化硫气体对有源层4的刻蚀;源电极61和漏电极62由于有光刻胶8的保护,阻挡了六氟化硫气体对源电极61和漏电极62的刻蚀。
具体地,上述工艺中,六氟化硫的含量范围为30~50sccm,氧气的含量范围为1500~2500sccm,功率范围为4500~5500W,处理时间范围为30~40s。
步骤103:如图5所示,对步骤102中暴露出的源电极61和漏电极62进行刻蚀,暴露出源电极61和漏电极62外边缘下方的有源层4,形成上述有源层4的暴露区域。
该步骤具体采用氯气和氧气对暴露的源电极61和漏电极62进行干法刻蚀。从而暴露出源电极61和漏电极62下方的有源层4,形成上述有源层4的暴露区域。根据干法刻蚀的原理,不同材质的膜层在进行刻蚀时,选用合适的气体能够控制刻蚀过程的选择比,即能够有效控制不同材质的膜层刻蚀时的速率比。在本方案中,采用氯气和氧气进行刻蚀,源电极61和漏电极62的金属层比有源层4的选择比大,因此,如图5所示,在源电极61和漏电极62被刻蚀掉时,位于下方的有源层4不会被刻蚀。
具体地,上述工艺中,氯气的含量范围为800~1000sccm,氧气的含量范围为1600~2000sccm,功率范围为3500~4500W,压力范围为30~40mT,处理时间范围为35~85s。
步骤104:剥离所述源电极和漏电极上的光刻胶,以便后续在漏电极、所述有源层的暴露区域以及所述栅极绝缘层的上表面上形成像素电极。
本发明提供的阵列基板的制备方法,还包括通过构图工艺在上述有源层4与源电极61和漏电极62之间形成包括欧姆接触层5的图形,所述欧姆接触层位于所述源电极和所述漏电极对应的区域从而促进了有源层4与源电极61和漏电极62的欧姆接触性能。
请参考图6,图6为本发明实施例提供的阵列基板的制备方法中对欧姆接触层刻蚀后的示意图。
由于上述在基底上形成了包括欧姆接触层5的图形,因此,本发明中,在上述步骤1中还包括对欧姆接触层5的刻蚀,具体为在步骤103之后,采用六氟化硫、氯气和氦气对欧姆接触层5进行刻蚀,将源电极61和漏电极62之间的欧姆接触层5去除,即去掉有源层4导电区域对应的欧姆接触层,保留源电极61和漏电极62对应的区域下方的欧姆接触层;由于有源层的材料可以为非晶硅或多晶硅,因此在对欧姆接触层进行刻蚀时,有源层4的暴露区域也被部分刻蚀,使得有源层4的导电区域以及源电极61和漏电极62对应位置的区域的厚度要大于有源层4暴露区域的厚度,如图6所示,形成一台阶。
本发明还公开了一种显示装置,包括阵列基板,且该阵列基板采用上述的阵列基板。其中,显示装置可以为:液晶面板、电子纸、OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
由于上述阵列基板具有上述技术效果,使得采用上述阵列基板的显示装置的显示效果更好,产品的良率更高。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。

Claims (13)

1.一种阵列基板,包括设置在基底上的栅电极、栅极绝缘层、有源层、源电极和漏电极以及像素电极;其特征在于,所述有源层具有导电区域、被所述源电极和漏电极覆盖的覆盖区域和包围于所述覆盖区域外侧的暴露区域;像素电极搭接在所述漏电极、所述有源层的暴露区域以及所述栅极绝缘层的上表面上。
2.根据权利要求1所述的阵列基板,其特征在于,所述有源层的暴露区域的宽度范围为0.5μm~1.0μm。
3.根据权利要求1或2所述的阵列基板,其特征在于,还包括位于所述有源层与所述源电极和漏电极之间的欧姆接触层,所述欧姆接触层位于所述源电极和所述漏电极对应的区域。
4.根据权利要求1或2所述的阵列基板,其特征在于,所述有源层的覆盖区域的厚度大于所述有源层的暴露区域的厚度。
5.一种阵列基板的制备方法,包括:在基底上形成包括栅电极的图形、栅极绝缘层、包括有源层的图形;其特征在于,还包括:
步骤1:通过构图工艺形成源电极和漏电极,使所述有源层具有导电区域、被所述源电极和漏电极覆盖的覆盖区域以及包围于所述覆盖区域外侧的暴露区域;
步骤2:在所述漏电极、所述有源层的暴露区域以及所述栅极绝缘层的上表面上形成像素电极。
6.根据权利要求5所述的制备方法,其特征在于,所述步骤1包括:
步骤101:在所述有源层的图形上方涂覆一层源漏电极层薄膜,并在所述源漏电极层薄膜上涂覆光刻胶,曝光、显影后对源漏电极层薄膜进行刻蚀以形成源电极和漏电极;
步骤102:对位于所述源电极和漏电极上保留的光刻胶进行处理,暴露出所述光刻胶外边缘下方的源电极和漏电极;
步骤103:对步骤102中暴露出的所述源电极和漏电极进行刻蚀,暴露出所述源电极和漏电极外边缘下方的有源层,形成所述有源层的暴露区域;
步骤104:剥离所述源电极和漏电极上的光刻胶。
7.根据权利要求6所述的制备方法,其特征在于,所述步骤102包括:采用六氟化硫和氧气对所述光刻胶进行轰击,使得所述光刻胶收缩,暴露出所述光刻胶外边缘下方的源电极和漏电极。
8.根据权利要求7所述的制备方法,其特征在于,所述六氟化硫的含量范围为30~50sccm,所述氧气的含量范围为1500~2500sccm,轰击功率范围为4500~5500W,处理时间范围为30~40s。
9.根据权利要求6所述的制备方法,其特征在于,所述步骤103包括:采用氯气和氧气对暴露出的所述源电极和漏电极进行刻蚀。
10.根据权利要求9所述的制备方法,其特征在于,所述氯气的含量范围为800~1000sccm,所述氧气的含量范围为1600~2000sccm,轰击功率范围为3500~4500W,压力范围为30~40mT,处理时间范围为35~85s。
11.根据权利要求5所述的制备方法,其特征在于,还包括:通过构图工艺在所述有源层与所述源电极和漏电极之间形成包括欧姆接触层的图形,所述欧姆接触层位于所述源电极和所述漏电极对应的区域。
12.根据权利要求11所述的制备方法,其特征在于,所述步骤1还包括采用六氟化硫、氯气和氦气对所述欧姆接触层进行刻蚀,去掉所述有源层导电区域对应的欧姆接触层,保留所述源电极和漏电极对应的区域下方的欧姆接触层;同时,所述有源层的暴露区域也被部分刻蚀,使得所述有源层的覆盖区域的厚度大于所述有源层的暴露区域的厚度。
13.一种显示装置,包括阵列基板,其特征在于,所述阵列基板为权利要求1-4任一项所述的阵列基板。
CN201410052964.0A 2014-02-17 2014-02-17 阵列基板、阵列基板的制备方法、显示装置 Pending CN103811502A (zh)

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