CN1037642C - Phosphorus diffusing technique for silicon planer process - Google Patents

Phosphorus diffusing technique for silicon planer process Download PDF

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Publication number
CN1037642C
CN1037642C CN 91102309 CN91102309A CN1037642C CN 1037642 C CN1037642 C CN 1037642C CN 91102309 CN91102309 CN 91102309 CN 91102309 A CN91102309 A CN 91102309A CN 1037642 C CN1037642 C CN 1037642C
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China
Prior art keywords
silicon
phosphorus
diffusion
temperature
deposited
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Expired - Fee Related
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CN 91102309
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Chinese (zh)
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CN1065951A (en
Inventor
陈炳若
何民才
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Wuhan University WHU
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Wuhan University WHU
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Priority to CN 91102309 priority Critical patent/CN1037642C/en
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Publication of CN1037642C publication Critical patent/CN1037642C/en
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Abstract

The present invention relates to an innovative phosphorus diffusion technique in silicon plane techniques. In the present invention, a deposition phosphorus source at low temperature is used for oxygenizing silicon wafers in oxygen and nitrogen atmosphere under proper high temperature for completing impurity redistribution, and in this way, the present invention not only has a simple technique and good reproducibility, but also can form PN junctions with good performance and enhances the yield of products.

Description

New phosphorus diffusing technique in the silicon planner technology
The present invention is an innovation to phosphorus diffusing technique in the silicon planner technology.Its operating condition is different from conventional phosphoric diffusion technology fully.
In silicon planner technology, phosphorous diffusion is a critical process, it at high temperature once forms PN junction usually, substantially finish control to Impurity Distribution and junction depth, carry out oxidation then at a lower temperature, electrical quantity to the formed PN junction in front carries out suitable adjustment, and forms needed silicon dioxide layer.(P149 of Xiamen University's " Technological Fundamentals of Semiconductor Device ")
Because above-mentioned phosphoric diffusion technology carries out under the high phosphorus concentration of high temperature, and phosphorus atoms is littler than silicon atom, diffusion process is easy to generate a lot of defectives, causes PN junction imperfect, makes the product parameters consistency poor, and rate of finished products is not high.
The present invention proposes a new phosphorus diffusing technique, thereby reach the simplification phosphoric diffusion technology, enhance product performance and rate of finished products, and improve the conforming purpose of product parameters.
Proposition of the present invention is in view of common phosphoric diffusion technology above-mentioned disadvantage to be arranged; And consider that in quite wide temperature range phosphorus impurities has approximately equalised high solid solubility (beautiful HF Wolf " Si semiconductor process data handbook P160) in silicon; A lot of phosphorus sources, particularly phosphorus oxychloride (POCl 3) liquid source do not need very high-temperature promptly to begin to decompose (P150 of Xiamen University's " Technological Fundamentals of Semiconductor Device "), and the active ingredient of diffusing, doping is provided; Consider the branch coagulation phenomena (beautiful HF Wolf " Si semiconductor process data handbook P492) of the phosphorus impurities of silicon in oxidizing process in addition, thereby the pre-deposited of phosphorous diffusion is fully possible at low temperatures.In view of the above, we have proposed a kind of new phosphorus diffusing technique, this technology is first in the very thin one deck phosphorus of silicon chip surface pre-deposited source with very low diffusion temperature and very short diffusion time, then, under higher temperature, carry out the diffusion of defining surface source, finish the distribution again and the junction depth control of impurity, can also avoid the destruction of high concentration phosphorus so effectively.
This new phosphorus diffusing technique comprises two steps of pre-deposited and main diffusion, it is characterized in that: the main diffusion of the formation of PN junction after by pre-deposited finished; The pre-deposited temperature is lower than 980 ℃, and the time is no more than 10 minutes, and the main diffusion temperature is higher than the pre-deposited temperature, and the time is no less than 30 minutes.
Superiority of the present invention shows: technology is simple, does not need repeatedly test piece, has saved raw material; TongYuan's time is short, has reduced toxicity and environmental pollution; The PN junction that forms is intact, has obviously improved the electrical characteristics of PN junction; Controllability and repeatability are all good, have improved rate of finished products; The silicon chip surface quality is good, helps next procedure.
Concrete scheme is as follows:
1. the silicon chip of technology before to phosphorous diffusion cleans and handles routinely.
2. carry out the pre-deposited of phosphorus source, no more than 10 minutes of deposition time with the furnace temperature that is lower than 980 ℃.
3. in the quartz ampoule of logical oxygen and nitrogen, carry out main diffusion, be no less than 30 minutes diffusion time with the temperature that is higher than pre-deposited.

Claims (1)

1. new phosphorus diffusing technique in the silicon planner technology, it comprises pre-deposited and two steps of main diffusion, it is characterized in that: the main diffusion of the formation of phosphorous diffusion PN junction after by pre-deposited finished; The pre-deposited temperature is lower than 980 ℃ of times and is no more than 10 minutes, and the main diffusion temperature is higher than the pre-deposited temperature, and the time is no less than 30 minutes.
CN 91102309 1991-04-13 1991-04-13 Phosphorus diffusing technique for silicon planer process Expired - Fee Related CN1037642C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 91102309 CN1037642C (en) 1991-04-13 1991-04-13 Phosphorus diffusing technique for silicon planer process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 91102309 CN1037642C (en) 1991-04-13 1991-04-13 Phosphorus diffusing technique for silicon planer process

Publications (2)

Publication Number Publication Date
CN1065951A CN1065951A (en) 1992-11-04
CN1037642C true CN1037642C (en) 1998-03-04

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Application Number Title Priority Date Filing Date
CN 91102309 Expired - Fee Related CN1037642C (en) 1991-04-13 1991-04-13 Phosphorus diffusing technique for silicon planer process

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CN (1) CN1037642C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102005501A (en) * 2010-10-15 2011-04-06 苏州阿特斯阳光电力科技有限公司 Phosphorous diffusion method for producing solar cell

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100372132C (en) * 2005-02-05 2008-02-27 江苏林洋新能源有限公司 Method for making long-serving crystal-silicon solar cell
CN101494251B (en) * 2009-03-02 2010-06-09 苏州阿特斯阳光电力科技有限公司 Phosphorus diffusion method for producing affinage metallurgy polycrystalline silicon solar battery
CN101710570B (en) * 2009-12-14 2011-05-18 天水天光半导体有限责任公司 Gluing front surface processing technology of semiconductor silicon chip after phosphorous diffusion
CN104576363B (en) * 2015-01-15 2018-08-24 株洲南车时代电气股份有限公司 A kind of production method of power rectifier pipe tube core

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102005501A (en) * 2010-10-15 2011-04-06 苏州阿特斯阳光电力科技有限公司 Phosphorous diffusion method for producing solar cell

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