CN1064766A - The method of making transistor with silicon single crystal thin section - Google Patents

The method of making transistor with silicon single crystal thin section Download PDF

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Publication number
CN1064766A
CN1064766A CN 91101561 CN91101561A CN1064766A CN 1064766 A CN1064766 A CN 1064766A CN 91101561 CN91101561 CN 91101561 CN 91101561 A CN91101561 A CN 91101561A CN 1064766 A CN1064766 A CN 1064766A
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silicon
temperature
chip
silicon chip
transistor
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CN 91101561
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CN1022653C (en
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陈福元
陈启秀
陈忠景
章婉珍
李贡社
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Zhejiang University ZJU
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Zhejiang University ZJU
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Publication of CN1022653C publication Critical patent/CN1022653C/en
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Abstract

The invention discloses a kind of method of making transistor with silicon single crystal thin section, it comprises that a. diffuses into N in advance on original single-chip +Impurity, b. the mechanical lapping of silicon chip single face, polishing, c. in 400 ℃~1200 ℃ scopes, grow or the deposition medium rete, d. the silicon chip back side be coated with the highly pure glass powder under 500 ℃~1200 ℃ temperature with two back-to-back silicon monocrystal flake sintering, e. two-sided or single side method is made transistor, and f. separates above-mentioned silicon chip with chemical corrosion method after making transistor chip.Advantage of the present invention is triple diffusion methods of having got rid of the high temperature that conventional semi-conductor industry adopted (1275 ℃) and long-time (200 hours), has energy-conservationly simultaneously, economizes silicon materials and shortens the characteristics of production cycle.

Description

The method of making transistor with silicon single crystal thin section
The present invention relates to the method for making transistor with silicon single crystal thin section, especially relate to the preparation method of silicon chip.
Since the fifties power transistor became industrial products, by the further investigation to Semiconductive Theory and technology, people constantly released semiconductor new material, new device structure and new technology, impelled power transistor to develop basis into electronic technology field rapidly.Up to now, make the used N/N of power transistor +, N/P +, P/P +And P/N +The silicon materials of conduction type adopt following method to obtain usually:
(1) growing epitaxial silicon-epitaxial growth one deck high resistivity silicon single crystal on the heavily doped silicon substrate.
The dark knot diffusion of (2) triple diffusions-on the lightly-doped silicon monocrystal chip, carry out high concentration impurities.
Because the design of power transistor has strict requirement to the resistivity and the thickness of silicon chip material, transistor fabrication then requires silicon chip must reach certain gross thickness, with the rate of finished products of guaranteeing to produce.In the method for the required silicon chip material of above-mentioned preparation power transistor, current existing problem has:
(1) silicon epitaxy method
The most suitable thin epitaxy layer growth of this method, the difficult quality that can guarantee the thick epitaxial layer of high resistivity, its production difficulty is big, the production cost height.Therefore be to adopt triple diffuse si substrates to produce hundreds of high-voltage power transistors that lie prostrate the kilovolt level at home mostly.
(2) triple diffusion methods
Transistorized manufacture process requirement silicon chip gross thickness keeps greater than 250 μ m, to avoid fragment occurring in the process of making tube core.But the power transistor of kilovolt following withstand voltage level of level but requires the thickness of high resistivity silicon single crystal layer generally not exceed 100 μ m, otherwise will have influence on other the realization of some parameter indexs of power transistor.So people take to go in the back side of the original silicon single crystal flake of high resistant High temperature diffusion the method for high concentration semiconductor impurity, the silicon conductivity of 3/4ths the back bottom area that accounts for the silicon chip gross thickness is increased greatly, make its effect of only playing the low resistivity substrate of support applications, thereby the silicon chip gross thickness of above-mentioned existence and the contradiction between the high resistivity layer effective thickness are resolved.The degree of depth of triple diffusions must reach 200 μ m for this reason, promptly need be under 1275 ℃ high temperature, and impurity spreads more than 200 hours in silicon chip continuously.As seen triple method of diffusion except special consuming electric power with when taking a lot of work, also will in the silicon body, introduce the regenerated heat microdefect, have influence on the quality of silicon chip material.In addition, on the production domesticization production line, also be difficult to be implemented in the index of dark diffusion 200 μ m in the silicon at present.Thereby have to take the way of trading off aborning, promptly on too thick resistive formation silicon materials, use the graphics chip that increases area to make hundreds of power transistors that lie prostrate kilovolt level withstand voltage level.Promptly, try to achieve the realization of device all round properties parameter to reduce the cost of silicon chip utilance and transistor rate of finished products.
The method that the purpose of this invention is to provide a kind of making transistor with silicon single crystal thin section.
Method of the present invention is as follows: at first original high resistant monocrystalline is cut into thickness and reaches silicon chip about 250 μ m, and through the laggard high temperature dispersing furnace of chemical cleaning, logical phosphorus source (POCl under 900 ℃~1200 ℃ temperature 3Or give and be coated with P 2O is in silicon chip surface) make impurity (N +) carry out pre-deposition diffusion, the time is half an hour to 4 hour.Take out silicon chip and carry out mechanical lapping, being polished to minute surface, to get the silicon chip gross thickness be 150 μ m~200 μ m.In 400 ℃~1200 ℃ scopes, grow or the deposition medium rete then in the silicon chip surface or the back side, rete is the above silicon dioxide film of 1 μ m, perhaps chemical deposition last layer thickness surpasses polysilicon, silicon nitride or the amorphous silicon film of 1 μ m under low pressure (pressure=0.7~1.2 torr) condition.Silicon dioxide low temperature depositing temperature is 700 ℃~800 ℃, and the temperature of polysilicon low-pressure chemical vapor deposition is 600 ℃~700 ℃, and the temperature of silicon nitride low pressure gas deposition is 400 ℃~850 ℃.Under 500 ℃~1200 ℃ (600 ℃~900 ℃ preferable) temperature, utilize the highly pure glass powder that is applied on the silicon chip back side to make binding agent firm burning of two mutual back-to-back silicon chips sticked together.The composition of highly pure glass powder is silicic-boric acid zinc, silicic-boric acid lead.Adopt conventional semiconductor planar technology (two-sided method or single side method) on silicon chip to make transistor chip again, then separate above-mentioned silicon chip, realize metallization at the silicon chip back side with the method for chemical corrosion.Its corrosion liquid formula is a hydrofluoric acid solution, hydrofluoric acid: hydrogen peroxide: the mixed solution of ammonium fluoride=1: 6: 10.Be packaged into transistor at last.
Embodiment:
With monocrystalline (N type, electricalresistivity=25 Ω-cm) be cut into the silicon sheet that thickness is 250 μ m, with No. 1 (NH 4OH: H 2O 2: H 2O=1: 2: 5) and No. 2 (HCl: H 2O 2: H 2O=1: 2: 8) after chemical cleaning solution cleans and washes away ionized water, in drying in oven.Silicon chip is under 1140 ℃ of temperature, and logical nitrogen (flow 500ml/min) carries phosphorus oxychloride and carries out the diffusion of impurity pre-deposition at silicon chip surface, and the time is 4 hours.Silicon chip is that 650 ℃ and pressure reach under the condition of 0.8~1.0 torr in temperature, adopts SiH 4-N 2System is the polysilicon film of 1 μ m at surface deposition last layer thickness.With the mechanical lapping of silicon chip single face and be polished to minute surface (keep thickness be 170 ± 10 μ m).Silicon chip is through chemical cleaning, and under 1000 ℃ temperature, logical nitrogen makes solid-state nitration boron carry out the diffusion of boron pre-deposition, 20 minutes time to silicon face.Be coated with skim highly pure glass powder (IP-760 type, P at the silicon chip back side 6O-Al 2O 3-B 2O 3), two silicon chips are closed back-to-back and place on the quartz boat.Silicon chip oven dry back advances sintering furnace, stops half an hour respectively under 500 ℃ and 720 ℃ of temperature, and the silicon chip burning sticks into merit.After the silicon chip chemical cleaning, under 1230 ℃ of temperature, logical oxygen diffusion 5 hours.The silicon chip surface resist coating utilizes photoetching method to erode the silicon dioxide film of transistor emitter region diffusion zone.Silicon chip is logical phosphorus (POCl under 1140 ℃ of temperature 3, N 2, O 2) do the diffusion of impurity pre-deposition, the time is 2 hours.Under 1220 ℃ of temperature, logical oxide-diffused 2 hours.Leave fairlead in the silicon chip surface photoetching, evaporate the thick aluminium lamination that reaches 2 μ m of last layer again, aluminium lamination is carved into contact conductor with photoetching process.Logical nitrogen carries out alusil alloy under 480 ℃ of temperature.Silicon chip surface applies anticorrosive by force (FSH-2 type) back-protective photoresist that a layer thickness is 10 μ m, after 30 minutes, puts silicon chip in sepatation etching liquid (HF: H 180 ℃ of drying in oven 2O 2: NH 4F=1: 6: 10) in, separates up and down mutually up to above-mentioned silicon chip.Silicon chip back spraying diamond dust hacking, back side chemical nickel plating is removed the glue-line in silicon chip front with FSH photoresist lift off liquid.The transistor characteristic, scribing, sintering chip of measuring silicon is on base and be packaged into transistor.The wherein preparation of silicon chip adhesive-highly pure glass powder: be to adopt and the silicon coefficient of expansion (α=33 * 10 -7/ ℃) close cordierite (2MgO * 2Al 2O 3* 5SiO 2, α=15 * 10 -7/ ℃) as the plumbous (PbO-B of system 2O 3-SiO 2) or (ZnO-B of zinc system 2O 3-SiO 2) packing material of glass dust, its particle diameter is 2~40 μ m, is good with φ=5~25 μ m wherein.
Advantage of the present invention is the production process of having got rid of triple diffusion machine silicon substrates of high temperature (1275 ℃) that conventional semi-conductor industry adopts and long-time (200 hours), reduce the regenerated heat microdefect of silicon chip inside, be conducive to make the power transistor of high-performance/cost ratio, have simultaneously the economize on electricity energy, economize silicon materials and the characteristics of shortening production cycle.

Claims (2)

1, a kind of method of making transistor with silicon single crystal thin section, it comprises:
A. on original single-chip, diffuse into N in advance +Impurity;
B. the mechanical lapping of silicon chip single face, polishing;
It is characterized in that
C. in 400 ℃~1200 ℃ scopes, grow or the deposition medium rete;
D. the silicon chip back side is coated with the highly pure glass powder, burns two back-to-back silicon monocrystal flakes sticking under 500 ℃~1200 ℃ temperature;
E. two-sided or single side method is made transistor;
F. separate above-mentioned silicon chip with chemical corrosion method after making transistor chip.
2, the method for a kind of making transistor with silicon single crystal thin section according to claim 1 is characterized in that,
G. the time of impurity prediffusion is half an hour~4 hour among the said a, and temperature is 900 ℃~1200 ℃;
H. silicon dioxide low temperature depositing temperature is 700 ℃~800 ℃ among the said c; The temperature of polysilicon low-pressure chemical vapor deposition is 600 ℃~700 ℃, and the temperature of silicon nitride low pressure gas deposition is 400 ℃~850 ℃;
I. among the said d, the composition of highly pure glass powder is silicic-boric acid zinc, silicic-boric acid lead, and burning sticking temperature is 600 ℃~900 ℃;
J. the prescription of chemical corrosion liquid is hydrofluoric acid solution, hydrofluoric acid among the said f: hydrogen peroxide: the mixed solution of ammonium fluoride=1: 6: 10.
CN 91101561 1991-03-13 1991-03-13 Method for making transistor with silicon single crystal thin section Expired - Fee Related CN1022653C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 91101561 CN1022653C (en) 1991-03-13 1991-03-13 Method for making transistor with silicon single crystal thin section

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Application Number Priority Date Filing Date Title
CN 91101561 CN1022653C (en) 1991-03-13 1991-03-13 Method for making transistor with silicon single crystal thin section

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CN1064766A true CN1064766A (en) 1992-09-23
CN1022653C CN1022653C (en) 1993-11-03

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270569A (en) * 2011-05-20 2011-12-07 蚌埠天光传感器有限公司 Method for forming semiconductor strained silicon wafer
CN103730358A (en) * 2014-01-17 2014-04-16 上海超硅半导体有限公司 Method for producing transistor through silicon single crystal sheets
CN107240547A (en) * 2017-07-05 2017-10-10 捷捷半导体有限公司 A kind of structure and its method for realizing the diffusion of N+ one sides

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1049002C (en) * 1995-11-14 2000-02-02 北京元朝飞翔科技贸易公司 Multipurpose metal surface caring agent and preparing process thereof
CN100400617C (en) * 2006-06-30 2008-07-09 辽宁三特石油化工有限公司 Cooling fluid of engine

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270569A (en) * 2011-05-20 2011-12-07 蚌埠天光传感器有限公司 Method for forming semiconductor strained silicon wafer
CN103730358A (en) * 2014-01-17 2014-04-16 上海超硅半导体有限公司 Method for producing transistor through silicon single crystal sheets
CN107240547A (en) * 2017-07-05 2017-10-10 捷捷半导体有限公司 A kind of structure and its method for realizing the diffusion of N+ one sides

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