CN103761942B - The numeral method of tool array display multiplexing algorithm and key control chip - Google Patents
The numeral method of tool array display multiplexing algorithm and key control chip Download PDFInfo
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- CN103761942B CN103761942B CN201410051204.8A CN201410051204A CN103761942B CN 103761942 B CN103761942 B CN 103761942B CN 201410051204 A CN201410051204 A CN 201410051204A CN 103761942 B CN103761942 B CN 103761942B
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- 238000005516 engineering process Methods 0.000 claims description 8
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Abstract
The present invention relates to LED numeral method and the key control chip of a kind of tool array display multiplexing algorithm.TW two wire serial interface module, command decoder module is provided with in described chip; Array display multiplexing control module, output latch module; Briliancy adjustment module; Key sweeps time-sequence control module, shift LD module; Key-press input judging module, key are swept storage module and are exported driver module; Be built-in with oscillatory circuit module, reset circuit module simultaneously; Tool array of the present invention shows the LED numeral method of multiplexing algorithm and presses key control special chip, completes and realize 12 8 segment numeral pipe display drivers and 4*8=32 button controlling functions in the case chip of 16 pins.
Description
Technical field
The present invention relates to LED numeral method and the key control chip of a kind of tool array display multiplexing algorithm.
Background technology
At present, LED (light emitting diode) numeral method drives and is widely used in the small household appliances such as Set Top Box, electromagnetic oven, micro-stove, electronic scale, massager, instrument and meter, the display of medicine equipment each field product.The display driver of this type of charactron adopts section, the position direct driving technologies of charactron mostly, can reach with the present invention, display 12 Digital sum pipe is driven to be example, then at least need 12 position pins+8 section pins, add power supply and ground and data communication pin, minimum need 24 pins coordinate and can realize, and too many output pin, will make wafer area increase, while packaging cost also high.Array display multiplex technique of the present invention can improve these shortcomings.
Summary of the invention
Task of the present invention improves existing LED numeral method driving and key control chip structure, there is provided a kind of tool array show multiplexing algorithm numeral method and by key control special chip, task of the present invention is achieved through the following technical solutions: be provided with TW two wire serial interface module, command decoder module in described chip; Array shows multiplexing time-sequence control module, output latch module; Briliancy adjustment module; Key sweeps time-sequence control module, shift LD module; Key-press input judging module, key are swept storage module and are exported driver module; Be built-in with oscillatory circuit module, reset circuit module etc. simultaneously.In chip, each model calling is as follows: TW two wire serial signal DIO/CLK is connected with command decoder module by TW two wire serial interface module, and the communication of intermodule is two-way communication; Command decoder module shows multiplexing time-sequence control module with briliancy adjustment module, array, key sweeps time-sequence control module, key is swept storage module and is connected; Briliancy adjustment module, after the decoder module dependent instruction that receives orders, exports briliancy grade command information and latches to output latch module; Array shows multiplexing tfi module after the decoder module dependent instruction that receives orders, and exports corresponding display and control command information and latches to output latch module; Output signal one tunnel that key sweeps time-sequence control module outputs to output latch module, and another road exports shift LD module; The output terminal of shift LD module is connected with the input end exporting driver module; Export driver module signal input take from output latch module and shift LD module, and export D1-D12 totally 12 road output displays be interfaced to the packaging pin of chip; D9-D12 tetra-road signal outputs to key-press input judging module simultaneously; The output terminal of key-press input judging module is connected to key and sweeps storage module; Key sweep storage module output terminal sweeps time-sequence control module with key, command decoder module is connected; Built-in chip type reset circuit module and oscillatory circuit module, for each module of whole system provides timing reference.
Compared with the prior art, tool array of the present invention shows the LED numeral method of multiplexing algorithm and presses key control special chip, completes and realize 12 8 segment numeral pipe display drivers and 4*8=32 button controlling functions in the case chip of 16 pins.Tool of the present invention has the following advantages:
1. the present invention adopts array to show multiplexing algorithm, exports drive interface by 12, realizes the driving display of 12 * 8 sections, optimized interface pin number.
2. the built-in 8 grades of briliancy regulating circuits of the present invention, be suitable for the application of different size numeral method, dirigibility is high
3. the present invention adopts interface keys multiplex technique, and when not increasing any pin interface, time division multiplex display driver interface carries out key scan, realizes button controlling functions.
4. the built-in pull-up resistor of the present invention, simultaneously built-in oscillation circuit module, electrify restoration circuit module, without the need to peripheral cell, further optimization system cost.
5. the present invention adopts TW two wire serial line interface (DIO CLK) mode, add indispensable power pins VDD, pin GND, only need 16 chip pins altogether.
6. two wires of the present invention
formulaserial line interface built-in level change-over circuit, can realize host computer interface level compatible communication different from 3.0 ~ 5V.
7. the present invention optimizes the sequence of peripheral pin, can realize PCB placement-and-routing and sort flexibly, improve the ease for use of machine product PCB design.
Accompanying drawing explanation
Fig. 1 is the chip structure block scheme of a kind of embodiment of the present invention;
Fig. 2 is that the chip interface of a kind of embodiment of the present invention distributes schematic diagram;
Fig. 3 is chip pin definition and the encapsulation sequence schematic diagram of a kind of embodiment of the present invention.
Embodiment
Below in conjunction with the specific embodiment of accompanying drawing, the present invention is further described.(but not being limitation of the present invention).
As shown in Figure 1, be the chip structure block scheme of a kind of embodiment of the present invention, of the present invention
TW two wire serial interface module, command decoder module is provided with in chip; Array shows multiplexing time-sequence control module, output latch module; Briliancy adjustment module; Key sweeps time-sequence control module, shift LD module; Key-press input judging module, key are swept storage module and are exported driver module; Be built-in with oscillatory circuit module, reset circuit module etc. simultaneously; TW two wire serial signal DIO/CLK passes through two wires
formulaserial interface module is connected with command decoder module, and the communication of intermodule is two-way communication; Command decoder module shows multiplexing time-sequence control module with briliancy adjustment module, array, key sweeps time-sequence control module, key is swept storage module and is connected; Briliancy adjustment module, after the decoder module dependent instruction that receives orders, exports briliancy grade command information and latches to output latch module; Array shows multiplexing tfi module after the decoder module dependent instruction that receives orders, and exports corresponding display and control command information and latches to output latch module; Output signal one tunnel that key sweeps time-sequence control module outputs to output latch module, and another road exports shift LD module; The output terminal of shift LD module is connected with the input end exporting driver module; Export driver module signal input take from output latch module and shift LD module, and export D1-D12 totally 12 road output displays be interfaced to the packaging pin of chip; D9-D12 tetra-road signal outputs to key-press input judging module simultaneously; The output terminal of key-press input judging module is connected to key and sweeps storage module; Key sweep storage module output terminal sweeps time-sequence control module with key, command decoder module is connected; Built-in chip type reset circuit module and oscillatory circuit module, for each module of whole system provides timing reference.
(LED) charactron of described tool array display multiplexing algorithm drives and key control chip, adopts array display multiplexing algorithm, 12 road display driver interfaces is divided into three groups, is respectively: D1 D2 D3 D4; D5 D6 D7 D8; D9 D10 D11 D12, and by interface configuration, be configured to a drive pattern respectively by often organizing, other remaining two groups of totally 8 interfaces then corresponding configuration section of one-tenth drive patterns, round-robin like this, then can realize 3 groups of 8 sections, * 4=12 position display drivers; In drive pattern in place, corresponding interface is input state, and in section drive pattern, corresponding interface is output state; By modifying to the PAD in java standard library, strengthening the length breadth ratio of driving tube, increasing driving force, making interface driver electric current I OL >=360mA, big current demand when meeting multidigit display multiplexing driving.
(LED) charactron of described tool array display multiplexing algorithm drives and key control chip, increase by 3 display register mode bits, with the dutycycle of configuration driven display translation voltage waveform, be respectively: 1/16,2/16,4/16,6/16,8/16,10/16,12/16,14/16 totally eight grades of dutycycles outputs, realize 8 grades of brightness regulation.
(LED) charactron of described tool array display multiplexing algorithm drives and key control chip; it is characterized in that adopting time-division multiplex technology; time-sequence control module is swept by key; key scan signal is inserted in timing; and timesharing exports between D1-D8 each interface, during key scan, D9-D12 is configured to the input end of button; and by key-press input judging module, judge effective actuation of keys; By this technology, 4*8=32 can be realized by key control.
(LED) charactron of described tool array display multiplexing algorithm drives and key control chip, it is characterized in that adopting TW two wire serial line interface, and at the built-in pull-up resistor of communication interface, pull-up resistor adopts CMOS trap resistance technique, to improve resistance precision simultaneously, reduce and mutual interference during host computer distinct interface level communication, strengthen interface level compatible.This built-in chip type reset circuit module and oscillatory circuit module simultaneously, optimizes complete machine application cost further.
For array display multiplexing algorithm of the present invention:
Traditional LED charactron drives display, and each interface is and drives one to one, and the driving with period and position is independently, therefore needs more interface pin.
The present invention adopts the driving thinking of innovation, adopts array to show multiplexing steering logic algorithm, makes each interface section of having concurrently, two kinds, position drive pattern simultaneously; By rigorous driving algorithm sequential, adopt time-division dynamic scan pattern, and improve scan clock speed, improve interface driver electric current, complete the array display of output interface and multiplexing, as follows:
As Fig. 2 interface assignment schematic diagram:
1. 12 road display driver interfaces are divided into three groups, are respectively: D1 D2 D3 D4; D5 D6 D7 D8; D9 D10 D11 D12.
2. by interface configuration, be configured to a drive pattern respectively by often organizing, other remaining two groups of totally 8 interfaces then corresponding configuration section of one-tenth drive patterns, round-robin like this, then can realize 3 groups of 8 sections, * 4=12 position display drivers.
3., in a drive pattern, corresponding interface is input state; In section drive pattern, corresponding interface is output state.
4. by modifying to the PAD in java standard library, strengthening the length breadth ratio of driving tube, increasing driving force, making interface driver electric current I OL >=360mA, big current demand when meeting multidigit display multiplexing driving.
Regulate for 8 grades of briliancy of the present invention:
The present invention is by increase by 3 display register mode bits, with the dutycycle of configuration driven display translation voltage waveform, be respectively: 1/16,2/16,4/16,6/16,8/16,10/16,12/16,14/16 totally eight grades of dutycycles outputs, realize 8 grades of brightness regulation.
Interface keys multiplex technique of the present invention
The present invention adopts time-division multiplex technology, sweeps time-sequence control module by key, and key scan signal is inserted in timing, and timesharing exports between D1-D8 each interface, during key scan, D9-D12 is configured to the input end of button, and by key-press input judging module, judge effective actuation of keys.By this technology, 4*8=32 can be realized by key control.
Communication interface and cost optimization:
Traditional LED charactron drives and usually adopts three-wire type serial communication or TW two wire serial communication mode by key control special chip, and in order to the driving force that improves interface and compatible with varying level host computer interface, need plug-in pull-up resistor or level shifting circuit, cost is high.
The present invention adopts TW two wire serial line interface, and according to practical application experience, at the built-in pull-up resistor of communication interface, pull-up resistor adopts CMOS trap resistance technique, to improve resistance precision simultaneously, reduce and mutual interference during host computer distinct interface level communication, strengthen interface level compatible.The built-in reset circuit module of the present invention and oscillatory circuit module simultaneously, optimizes complete machine application cost further
Package layout
The LED charactron of described tool array display multiplexing algorithm drives and key control chip, it is characterized in that this chip height is integrated in the 16 pin package sheets of SOP16 or DIP16, and according to placement-and-routing's needs of PCB in practical application, and most of display panel PCB single-side brass plate selection demand
described chipsignal pins and power pins keep to the side to arrange, unobstructed with the PCB layout improving key signal, and D1-D12 arranges in order simultaneously, facilitates the cloth general character of PCB circuit, to reduce the consumption of jumper element in one side PCB layout, and further Cost optimization.
As Fig. 3. chip pin definition and encapsulation sequence schematic diagram, chip height of the present invention is integrated in the 16 pin package sheets of SOP16 or DIP16, and according to placement-and-routing's needs of PCB in practical application, and most of display panel PCB single-side brass plate selection demand
described chipsignal pins and power pins keep to the side to arrange, unobstructed with the PCB layout improving key signal, and D1-D12 arranges in order simultaneously, facilitates the cloth general character of PCB circuit, to reduce the consumption of jumper element in one side PCB layout, and further Cost optimization.
The pin definitions of described chip is as following table:
| pin sequence number | title | explanation |
| 1-8 | d1-D8 | lED pipe pin drives, and connects LED anode or negative electrode; D1-D8 is also used as key scanning and exports. |
| 9-12 | d9-D12 | lED pipe pin drives, and connects LED anode or negative electrode; Also be used as button pin multiplexing, key is swept signal and is latched after the display cycle terminates |
| 14 | dIO | tW two wire serial data interface, exports serial data, from a high position at clock falling edge; At rising edge clock input serial data, from a high position.Change at CLK low-level data. |
| 15 | cLK | tW two wire serial clock interface, reads serial data at rising edge, and negative edge exports data. |
| 13 | vDD | welding system power supply 3.0 ~ 5.0V |
| 16 | gND | welding system ground |
Word is repeated: D1-D8 is that LED pipe pin drives, and connects LED anode or negative electrode; D1-D8 is also used as key scanning and exports; D9-D12 is that ED pin drives, and connects LED anode or negative electrode; Also be used as button pin multiplexing, key is swept signal and is latched after the display cycle terminates; DIO is TW two wire serial data interface, exports serial data, from a high position at clock falling edge; At rising edge clock input serial data, from a high position, change at CLK low-level data; CLK is TW two wire serial clock interface, reads serial data at rising edge, and negative edge exports data; VDD welding system power supply 3.0 ~ 5.0V, GND welding system ground.
Be more than specific embodiments of the invention, all similar changes done according to above-mentioned design, ought to belong to scope of the present invention.
Claims (7)
1. array of having display multiplexing algorithm numeral method and by key control special chip, it is characterized in that, in described chip, be provided with TW two wire serial interface module, command decoder module; Array shows multiplexing time-sequence control module, output latch module; Briliancy adjustment module; Key sweeps time-sequence control module, shift LD module; Key-press input judging module, key are swept storage module and are exported driver module; Be built-in with oscillatory circuit module, reset circuit module simultaneously; TW two wire serial signal DIO/CLK is connected with command decoder module by TW two wire serial interface module, and the communication of intermodule is two-way communication; Command decoder module shows multiplexing time-sequence control module with briliancy adjustment module, array, key sweeps time-sequence control module, key is swept storage module and is connected; Briliancy adjustment module, after the decoder module dependent instruction that receives orders, exports briliancy grade command information and latches to output latch module; Array shows multiplexing tfi module after the decoder module dependent instruction that receives orders, and exports corresponding display and control command information and latches to output latch module; Output signal one tunnel that key sweeps time-sequence control module outputs to output latch module, and another road exports shift LD module; The output terminal of shift LD module is connected with the input end exporting driver module; Export driver module signal input take from output latch module and shift LD module, and export D1-D12 totally 12 road output displays be interfaced to the packaging pin of chip; D9-D12 tetra-road signal outputs to key-press input judging module simultaneously; The output terminal of key-press input judging module is connected to key and sweeps storage module; Key sweep storage module output terminal sweeps time-sequence control module with key, command decoder module is connected; Built-in chip type reset circuit module and oscillatory circuit module, for each module of whole system provides timing reference.
2. tool array according to claim 1 shows the numeral method of multiplexing algorithm and presses key control special chip; it is characterized in that; described chip adopts array display multiplexing algorithm, 12 road display driver interfaces is divided into three groups, is respectively: D1 D2 D3 D4; D5 D6 D7 D8; D9 D10 D11 D12, and by interface configuration, be configured to a drive pattern respectively by often organizing, other remaining two groups of totally 8 interfaces then corresponding configuration section of one-tenth drive patterns, round-robin like this, then realize 3 groups of 8 sections, * 4=12 position display drivers; In drive pattern in place, corresponding interface is input state, and in section drive pattern, corresponding interface is output state; By modifying to the PAD in java standard library, strengthening the length breadth ratio of driving tube, increasing driving force, making interface driver electric current I OL >=360mA, big current demand when meeting multidigit display multiplexing driving.
3. tool array according to claim 1 shows the numeral method of multiplexing algorithm and presses key control special chip, it is characterized in that, described chip increases by 3 display register mode bits, with the dutycycle of configuration driven display translation voltage waveform, be respectively: 1/16,2/16,4/16,6/16,8/16,10/16,12/16,14/16 totally eight grades of dutycycles outputs, realize 8 grades of brightness regulation.
4. tool array according to claim 1 shows the numeral method of multiplexing algorithm and presses key control special chip; it is characterized in that; described chip adopts time-division multiplex technology; sweep time-sequence control module by key, key scan signal is inserted in timing, and timesharing exports between D1-D8 each interface; during key scan; D9-D12 is configured to the input end of button, and by key-press input judging module, judges effective actuation of keys; By this technology, realize 4*8=32 by key control.
5. tool array according to claim 1 shows the numeral method of multiplexing algorithm and presses key control special chip; it is characterized in that; described chip adopts TW two wire serial line interface; and at the built-in pull-up resistor of communication interface; pull-up resistor adopts CMOS trap resistance technique; to improve resistance precision simultaneously, reduce and mutual interference during host computer distinct interface level communication, strengthen interface level compatible; This built-in chip type reset circuit module and oscillatory circuit module simultaneously, optimizes complete machine application cost further.
6. tool array according to claim 1 shows the numeral method of multiplexing algorithm and presses key control special chip, it is characterized in that, described chip height is integrated in the 16 pin package sheets of SOP16 or DIP16, and according to placement-and-routing's needs of PCB in practical application, and most of display panel PCB single-side brass plate selection demand, the signal pins of described chip and power pins keep to the side to arrange, unobstructed with the PCB layout improving key signal, D1-D12 arranges in order simultaneously, facilitate the cloth general character of PCB circuit, to reduce the consumption of jumper element in one side PCB layout, further Cost optimization.
7. tool array according to claim 1 shows the numeral method of multiplexing algorithm and presses key control special chip, it is characterized in that, the pin D1-D8 of described chip is that LED pipe pin drives, and connects LED anode or negative electrode; D1-D8 is also used as key scanning and exports; D9-D12 is that LED pipe pin drives, and connects LED anode or negative electrode; Also be used as key-press input pin multiplexing, key is swept signal and is latched after the display cycle terminates; DIO is TW two wire serial data interface, exports serial data, from a high position at clock falling edge; At rising edge clock input serial data, from a high position, change at CLK low-level data; CLK is TW two wire serial clock interface, reads serial data at rising edge, and negative edge exports data; VDD welding system power supply 3.0 ~ 5.0V, GND welding system ground.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104050924B (en) * | 2014-06-27 | 2016-10-12 | 杭州士兰微电子股份有限公司 | LED drive chip and control method thereof and LED module |
| CN104077990B (en) * | 2014-07-02 | 2016-07-27 | 福州福大海矽微电子有限公司 | Adopt LED numeral method and the key control chip of time-division multiplex technology |
| CN104808852B (en) * | 2015-04-30 | 2017-12-01 | 福州福大海矽微电子有限公司 | Touch recognition and digital display set are into circuit and its external circuitses and access method |
| CN106683604B (en) * | 2017-03-22 | 2020-07-21 | 广东携创电机有限公司 | Multiplexing processing circuit for L ED display and key detection |
| CN106960647B (en) * | 2017-05-24 | 2020-12-01 | 海芯科技(厦门)有限公司 | Energy-saving light-emitting nixie tube display driving circuit |
| CN108920197B (en) * | 2018-06-29 | 2021-09-03 | 北京遥测技术研究所 | Loading circuit and loading method for improving serial passive loading rate of FPGA (field programmable Gate array) |
| CN108877647A (en) * | 2018-08-13 | 2018-11-23 | 深圳市奥拓电子股份有限公司 | LED control system and LED display device |
| CN111683428A (en) * | 2019-03-07 | 2020-09-18 | 西安诺瓦电子科技有限公司 | Key lamp driving method, device and system and embedded equipment |
| CN110176201B (en) * | 2019-05-23 | 2023-02-28 | 福建船政交通职业学院 | Time sequence control method and device for display and key scanning |
| CN110148370A (en) * | 2019-05-23 | 2019-08-20 | 福建船政交通职业学院 | A kind of novel scanning circuit |
| CN114631847B (en) * | 2022-05-20 | 2022-09-09 | 之江实验室 | Time-sharing multiplexing method for inhibiting crosstalk of medical ultrasonic transducer array |
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