CN103971571A - Experiment board for multi-machine system of single-chip microcomputer - Google Patents
Experiment board for multi-machine system of single-chip microcomputer Download PDFInfo
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- CN103971571A CN103971571A CN201410113457.3A CN201410113457A CN103971571A CN 103971571 A CN103971571 A CN 103971571A CN 201410113457 A CN201410113457 A CN 201410113457A CN 103971571 A CN103971571 A CN 103971571A
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- 238000002474 experimental method Methods 0.000 title claims abstract description 45
- 238000004891 communication Methods 0.000 claims abstract description 52
- 230000002093 peripheral effect Effects 0.000 claims abstract description 47
- 238000002955 isolation Methods 0.000 claims description 11
- 230000000087 stabilizing effect Effects 0.000 claims description 6
- 230000001133 acceleration Effects 0.000 claims description 3
- 230000005669 field effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 230000003993 interaction Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 239000004606 Fillers/Extenders Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000000875 corresponding effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000001483 mobilizing effect Effects 0.000 description 1
Abstract
The invention discloses a multi-machine system experiment board of a single chip microcomputer, which comprises a plurality of experiment subareas, a public serial peripheral area, a serial bus, a bus pull-up and state indicating circuit, an external communication interface area and a power circuit. Each experiment subarea is provided with a single chip microcomputer and a plurality of peripherals directly controlled by the single chip microcomputer, the public serial peripheral area comprises a plurality of public peripherals with serial interfaces, and the intercommunication and equipment sharing among the single chip microcomputers can be realized through a serial bus. The experiment board has the advantages of advanced structure, rich peripheral equipment, good interactivity, strong communication capability, wide application range, high cost performance and the like.
Description
Technical field
The invention belongs to single chip computer teaching and application and development field, relate to a kind of single-chip microcomputer multi-computer system brassboard.
Background technology
Single-chip microcomputer has the remarkable advantages such as aboundresources, flexible design, low-power consumption, cost performance height, thereby is widely applied in various smart machines and system.For adapting to the active demand of enterprise to the microcomputer development talent, each colleges and universities have generally offered single-chip microcomputer correlated curriculum, and its experiment, practice generally all adopt singlechip experimental box.
The core of singlechip experimental box is brassboard, and investigation is found, the following defect of brassboard ubiquity of existing singlechip experimental box: 1) most experiments plate is only provided with a single-chip microcomputer, and applicable surface is partially narrow; Some brassboard can be supported multiple single-chip microcomputer by card extender and IC socket, but can only use one of them at every turn; A few experiments plate supports multiple single-chip microcomputers to work simultaneously, but lacks and write to each other between each single-chip microcomputer, and equipment also cannot be shared, and therefore cost performance is lower; 2) the traditional parallel bus of more employing carries out outside expansion, has obliterated the SOC characteristic of single-chip microcomputer, causes system numerous and jumbled, and Electro Magnetic Compatibility is poor; 3) peripheral hardware kind is on the low side, and function is on the weak side, makes the friendly of quantity, level and the man-machine interaction of experimental project, interest all be subject to severely restricts; 4) be generally only provided with the minority such as RS232, USB wired communication interface, communication capabilities is on the weak side.
Above-mentioned defect causes single chip computer experiment, practical teaching seriously to lag behind engineering reality, is difficult to fully cultivate student's single-chip microcomputer application designed capacity.
Summary of the invention
Fundamental purpose of the present invention, it is the deficiency existing for prior art, the single-chip microcomputer multi-computer system brassboard that provide a kind of structure advanced person, be suitable for face width, cost performance is high, it supports multiple main flow single-chip microcomputers to work online simultaneously, peripheral hardware abundant species, man-machine interaction is good, and communication capacity is strong, and intercommunication mutually and the equipment that can realize between multiple single-chip microcomputers by universal serial bus are shared.
For achieving the above object, the present invention by the following technical solutions:
A kind of single-chip microcomputer multi-computer system brassboard, comprises in multiple experiment subregions, public serial peripheral district, universal serial bus, bus and drawing and condition indication circuit, external communication interface district, power circuit;
Signal wire in described universal serial bus comprises I
2c communication data line SDA, I
2c communication clock line SCL, half-duplex asynchronous communication data line DAT, full duplex asynchronous communication send line TXD, full duplex asynchronous communications reception line RXD;
Described each experiment subregion includes a single-chip microcomputer, multiple by the directly actuated peripheral hardware of described single-chip microcomputer, Bus isolation buffer circuit, described single-chip microcomputer connects described each peripheral hardware by its multiple universal I/O ports, Bus isolation buffer circuit comprises multiple autonomous channels, and the two ends of each passage are connected with the serial i O mouth of single-chip microcomputer and the respective signal line of universal serial bus respectively;
Described public serial peripheral district comprises the multiple public serial peripheral that can be accessed by each experiment subregion single-chip microcomputer timesharing, wherein, the public serial peripheral that has asynchronous communication interface and connect universal serial bus by it comprises TTS voice operation demonstrator, TFT LCD display, has I
2c communication interface the public serial peripheral that connects universal serial bus by it comprise serial EEPROM, real time clock, serial AD/DA, angular-rate sensor, acceleration transducer, magnetoresistive transducer;
In described bus, draw with condition indication circuit and comprise multiple branch roads that form that are connected in series by resistance and light emitting diode, the two ends of each branch road are connected with drawing in bus with the positive source of condition indication circuit and the respective signal line of universal serial bus respectively;
Described external communication interface district comprises RS232 interface unit, RS485 interface unit, usb interface unit, infrared transmitter, infrared remote receiver, and described each interface unit and infrared transmitter, infrared remote receiver are all connected with universal serial bus;
Described power circuit comprises resettable fuse, total power switch, multiple independent power source switch, plurality of paths of voltage stabilizing circuits, external dc power is divided into multichannel output after serial connection total power switch and resettable fuse, wherein a road is for drawing in public serial peripheral district, external communication interface district and bus and condition indication circuit power supply after mu balanced circuit voltage stabilizing, and other each road serial connection independent power source switch is each experiment switched-mode power supply again after mu balanced circuit voltage stabilizing.
In described each experiment subregion, have at least its singlechip chip inside of a subregion to contain wireless data communication component, have at least its peripheral hardware of subregion to comprise RFID card reader, radio-frequency (RF) transceiver, serial Flash storer.
Beneficial effect of the present invention is: by multiple experiment subregions are set, and each experiment subregion is connected by universal serial bus with public serial peripheral district, multiple single-chip microcomputers not only can be worked simultaneously, independently control the multiple peripheral hardware of subregion separately, intercommunication mutually and the equipment that also can utilize universal serial bus to realize between multiple single-chip microcomputers are shared, thereby have significantly improved plant factor and the cost performance of brassboard.Abundant peripheral hardware and communication interface resource, also expanded application design space, improved man-machine interaction and its communication ability.The present invention is the learning interest of mobilizing students better, cultivates more fully student's single-chip microcomputer application designed capacity, improves single chip computer teaching effect.
Brief description of the drawings
Fig. 1 is general structure schematic diagram of the present invention;
Fig. 2 is the first experiment partitioned hardware structural drawing;
Fig. 3 is the second experiment partitioned hardware structural drawing;
Fig. 4 is the 3rd experiment partitioned hardware structural drawing;
Fig. 5 is the 4th experiment partitioned hardware structural drawing;
Fig. 6 is public serial peripheral district hardware structure diagram;
Fig. 7 draws in bus and condition indication circuit hardware structure diagram;
Fig. 8 is external communication interface district hardware structure diagram.
Embodiment
Below in conjunction with accompanying drawing, with specific embodiment, the present invention is described further.
Referring to Fig. 1, single-chip microcomputer multi-computer system brassboard comprises in multiple experiment subregions, public serial peripheral district, universal serial bus, bus and drawing and condition indication circuit, external communication interface district, power circuit, respectively tests in subregion, public serial peripheral district, bus and draws with condition indication circuit, external communication interface district and be all connected with universal serial bus.Signal wire in universal serial bus comprises I
2c communication data line SDA, I
2c communication clock line SCL, half-duplex asynchronous communication data line DAT, full duplex asynchronous communication send line TXD, full duplex asynchronous communications reception line RXD.Each experiment subregion is provided with single-chip microcomputer separately and multiple by the directly actuated peripheral hardware of single-chip microcomputer, and public serial peripheral district comprises the multiple public peripheral hardware with serial line interface, and intercommunication mutually and the equipment that can realize between multiple single-chip microcomputers by universal serial bus are shared.
Power circuit is for drawing with condition indication circuit operating voltage Vcc0 is provided in public serial peripheral district, external communication interface district and bus, for each experiment subregion provides respectively operating voltage Vcc1 ~ VccN.Total power switch K0 and independent power source K switch 1 ~ KN match, and control powering on and power-off of the each component units of brassboard.
Each signal line that to draw with condition indication circuit in bus be universal serial bus provides draws support, guarantees asynchronous communication and I
2normally carrying out of C communication, and can indicate by light emitting diode the current level state of each signal line.External communication interface district, for brassboard provides multiple external communication interface, downloads and application communication needs with the program that meets each test block single-chip microcomputer.
Fig. 2 is the hardware configuration of the first experiment subregion.The first experiment subregion adopts the STC12C5A60S2 single-chip microcomputer of 8051 kernel DIP40 encapsulation, and in its whole IO mouth lines, 5 are used as serial i O mouth, and wherein, P3.3 is I
2c communication data mouth, P3.6 is I
2c communication clock mouth, P1.2 is half-duplex asynchronous communication data port, and P3.1 is that full duplex asynchronous communication sends mouth, and P3.0 is full duplex asynchronous communications reception mouth, and serial i O mouth is connected to universal serial bus by Bus isolation buffer circuit.Remove serial i O mouth, all the other are all as universal I/O port, be used for connecting multiple conventional peripheral hardware, comprise independent button, ranks keyboard, light emitting diode, passive hummer, LED charactron, LED dot matrix pipe, character LCD display, direct current generator, stepper motor, temperature sensor, angular transducer, low-pass filter.
Bus isolation buffer circuit comprises 5 autonomous channels, and each passage comprises a turn-on threshold voltage V
gSthbe the N channel field-effect pipe of 1.5 ± 0.5V, its source S is connected with the serial i O mouth of single-chip microcomputer and the respective signal line of universal serial bus respectively with drain D, and grid G, except connecing experiment subregion positive source, separately connects a resistance to source S.
The effect of Bus isolation buffer circuit shows two aspects:
Under experiment subregion powering-off state, grid is to source voltage V
gSlower than V
gSth, therefore N channel field-effect pipe cut-off, is similar to open circuit between its source electrode and drain electrode, thereby single-chip microcomputer serial i O mouth and universal serial bus is effectively isolated, and has avoided the impact of single-chip microcomputer power-off on universal serial bus level.
In experiment subregion energising situation, if single-chip microcomputer serial i O mouth and universal serial bus are high level state, V
gSlower than V
gSth, the cut-off of N channel field-effect pipe, therefore the high level state of single-chip microcomputer serial i O mouth and universal serial bus is maintained, and two magnitudes of voltage corresponding to high level are respectively Vcc1 and Vcc0.If single-chip microcomputer serial i O mouth becomes low level, V
gShigher than V
gSth, the conducting of N channel field-effect pipe, universal serial bus also becomes low level thereupon; Otherwise if universal serial bus first becomes low level, N channel field-effect pipe internal body diodes conducting, declines source potential, makes V when source potential drops to
gShigher than V
gSthtime, the conducting of N channel field-effect pipe, single-chip microcomputer serial i O mouth also becomes low level thereupon.Visible, when experiment subregion energising work, Bus isolation buffer circuit can be realized the bidirectional data transfers between single-chip microcomputer serial i O mouth and universal serial bus, and allows each experiment subregion to use different operating voltage.
Fig. 3 is the hardware configuration of the second experiment subregion.The second experiment subregion also adopts STC12C5A60S2 single-chip microcomputer, and just encapsulation changes LQFP44 into.Single-chip microcomputer connects multiple peripheral hardware by multiple universal I/O ports, comprise independent button, light emitting diode, passive hummer, RFID card reader, radio-frequency (RF) transceiver, serial Flash storer, angular transducer, Temperature Humidity Sensor, and multiple highly versatiles or the IO mouth that do not taken by peripheral hardware are drawn by extension socket.The structure of Bus isolation buffer circuit is identical with the first experiment subregion.
Fig. 4 is the hardware configuration of the 3rd experiment subregion.The 3rd experiment subregion adopts the ATmega32 single-chip microcomputer of AVR kernel, it connects independent button, light emitting diode, passive hummer, angular transducer by multiple universal I/O ports, and multiple highly versatiles or the IO mouth that do not taken by peripheral hardware are drawn by extension socket.Bus isolation buffer circuit is except single-chip microcomputer serial i O mouth changes to some extent, and all the other are all identical with first, second experiment subregion.
Fig. 5 is the hardware configuration of the 4th experiment subregion.The 4th experiment subregion adopts CC2530 single-chip microcomputer, this single-chip microcomputer is 8051 kernels, built-in IEEE 802.15.4 wireless transceiver, can develop towards the multiple application of IEEE 802.15.4, ZigBee PRO, ZigBee RF4CE by related protocol stack and api function.Single-chip microcomputer connects independent button, light emitting diode, passive hummer, angular transducer by multiple universal I/O ports, and multiple highly versatiles or the IO mouth that do not taken by peripheral hardware are drawn by extension socket.Bus isolation buffer circuit is except single-chip microcomputer serial i O mouth changes to some extent, and all the other are all identical with first, second experiment subregion.
Fig. 6 is the hardware configuration in public serial peripheral district.Public serial peripheral district comprises the multiple public peripheral hardware with serial line interface, and wherein, the public serial peripheral that has asynchronous communication interface and connect universal serial bus by it comprises TTS voice operation demonstrator, TFT LCD display, has I
2c communication interface the public serial peripheral that connects universal serial bus by it comprise serial EEPROM, real time clock, serial AD/DA, angular-rate sensor, acceleration transducer, magnetoresistive transducer.
Fig. 7 draws in bus and the hardware configuration of condition indication circuit.In bus, draw with condition indication circuit and comprise that 5 are connected in series the branch road forming by resistance and light emitting diode, the two ends of each branch road are connected with drawing in bus with the positive source of condition indication circuit and the respective signal line of universal serial bus respectively.When certain root signal wire of universal serial bus is low level, the light emitting diode of respective branch is lighted, otherwise extinguishes, and therefore can understand by the light on and off of light emitting diode the current state of universal serial bus.Light emitting diode institute crosstalk resistance has draws two kinds of functions in current limliting and bus.
Fig. 8 is the hardware configuration in external communication interface district.External communication interface district comprises RS232 interface unit, RS485 interface unit, usb interface unit, infrared transmitter, infrared remote receiver, and each interface unit and infrared transmitter, infrared remote receiver are all connected with universal serial bus.RS232 interface unit can adopt MAX232 or other compatible chip, and RS485 can use MAX485 or other compatible chip, and usb interface unit can adopt FT232 or other compatible chip.Infrared remote receiver adopts SFH5110 or other compatible type integrative receiver, and infrared transmitter utilizes a middle pliotron to realize signal modulation and power drive, and needed carrier wave produces by 38KHz multivibrator.
Claims (4)
1. a single-chip microcomputer multi-computer system brassboard, is characterized in that, comprises in multiple experiment subregions, public serial peripheral district, universal serial bus, bus and drawing and condition indication circuit, external communication interface district, power circuit;
Signal wire in described universal serial bus comprises I
2c communication data line SDA, I
2c communication clock line SCL, half-duplex asynchronous communication data line DAT, full duplex asynchronous communication send line TXD, full duplex asynchronous communications reception line RXD;
Described each experiment subregion includes a single-chip microcomputer, multiple by the directly actuated peripheral hardware of described single-chip microcomputer, Bus isolation buffer circuit, described single-chip microcomputer connects described each peripheral hardware by its multiple universal I/O ports, Bus isolation buffer circuit comprises multiple autonomous channels, and the two ends of each passage are connected with the serial i O mouth of single-chip microcomputer and the respective signal line of universal serial bus respectively;
Described public serial peripheral district comprises the multiple public serial peripheral that can be accessed by each experiment subregion single-chip microcomputer timesharing, and each public serial peripheral is by asynchronous communication interface or I
2c interface is connected with universal serial bus;
In described bus, draw with condition indication circuit and comprise multiple branch roads that form that are connected in series by resistance and light emitting diode, the two ends of each branch road are connected with drawing in bus with the positive source of condition indication circuit and the respective signal line of universal serial bus respectively;
Described external communication interface district comprises RS232 interface unit, RS485 interface unit, usb interface unit, infrared transmitter, infrared remote receiver, and described each interface unit and infrared transmitter, infrared remote receiver are all connected with universal serial bus;
Described power circuit comprises resettable fuse, total power switch, multiple independent power source switch, plurality of paths of voltage stabilizing circuits, external dc power is divided into multichannel output after serial connection total power switch and resettable fuse, wherein a road is for drawing in public serial peripheral district, external communication interface district and bus and condition indication circuit power supply after mu balanced circuit voltage stabilizing, and other each road serial connection independent power source switch is each experiment switched-mode power supply again after mu balanced circuit voltage stabilizing.
2. single-chip microcomputer multi-computer system brassboard according to claim 1, is characterized in that, in described each experiment subregion, has at least its singlechip chip inside of a subregion to contain wireless data communication component.
3. single-chip microcomputer multi-computer system brassboard according to claim 1, is characterized in that, in described each experiment subregion, has at least its peripheral hardware of subregion to comprise RFID card reader, radio-frequency (RF) transceiver, serial Flash storer.
4. single-chip microcomputer multi-computer system brassboard according to claim 1, is characterized in that, in described public serial peripheral district, the public serial peripheral that connects universal serial bus by asynchronous communication interface comprises TTS voice operation demonstrator, TFT LCD display, passes through I
2the public serial peripheral that C interface connects universal serial bus comprises serial EEPROM, real time clock, serial AD/DA, angular-rate sensor, acceleration transducer, magnetoresistive transducer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410113457.3A CN103971571A (en) | 2014-03-26 | 2014-03-26 | Experiment board for multi-machine system of single-chip microcomputer |
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| CN201410113457.3A CN103971571A (en) | 2014-03-26 | 2014-03-26 | Experiment board for multi-machine system of single-chip microcomputer |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102810277A (en) * | 2012-07-12 | 2012-12-05 | 上海交通大学 | Singlechip teaching experiment box with secondary development function |
| CN107845319A (en) * | 2017-11-28 | 2018-03-27 | 河南理工大学 | A kind of Mine Monitoring and Control System experiment teaching aid |
| CN109491290A (en) * | 2018-11-16 | 2019-03-19 | 西安空间无线电技术研究所 | A kind of cold standby bus complexing circuit suitable for digital processing system |
-
2014
- 2014-03-26 CN CN201410113457.3A patent/CN103971571A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102810277A (en) * | 2012-07-12 | 2012-12-05 | 上海交通大学 | Singlechip teaching experiment box with secondary development function |
| CN107845319A (en) * | 2017-11-28 | 2018-03-27 | 河南理工大学 | A kind of Mine Monitoring and Control System experiment teaching aid |
| CN109491290A (en) * | 2018-11-16 | 2019-03-19 | 西安空间无线电技术研究所 | A kind of cold standby bus complexing circuit suitable for digital processing system |
| CN109491290B (en) * | 2018-11-16 | 2020-08-14 | 西安空间无线电技术研究所 | Cold backup bus multiplexing circuit suitable for digital processing system |
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Application publication date: 20140806 |