CN103165058A - Multi-section nixie tube display drive circuit structure - Google Patents

Multi-section nixie tube display drive circuit structure Download PDF

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Publication number
CN103165058A
CN103165058A CN2011104168258A CN201110416825A CN103165058A CN 103165058 A CN103165058 A CN 103165058A CN 2011104168258 A CN2011104168258 A CN 2011104168258A CN 201110416825 A CN201110416825 A CN 201110416825A CN 103165058 A CN103165058 A CN 103165058A
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termination
multistage
port
output
charactron
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CN103165058B (en
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叶青
陶绪友
丁增伟
牛征
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CRM ICBG Wuxi Co Ltd
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Wuxi China Resources Semico Co Ltd
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Abstract

The invention relates to a multi-section nixie tube display drive circuit structure which comprises a display drive module. The display drive module is provided with N display output drive ports, each display output drive port is connected with a strobe end of a corresponding multi-section nixie tube, the multi-section nixie tubes are provided with section display control ports with the number corresponding to the number of sections, the section display control ports of each multi-section nixie tube are respectively connected with corresponding display output drive ports in the display drive module besides the display output ports which are connected with the strobe ends of the multi-section nixie tubes, N is equal to or greater than two, and the number of the sections is smaller than N. The multi-second nixie tube display drive circuit structure is used for distinguishing positions and sections in time division multiplexing, the number of the display output ports of the display drive circuit of light emitting diode (LED) is greatly reduced, the resource of the output ports is completely used, the cost of chips and the cost of sealing are lowered, structure is simple and practical, working performance is stable and reliable, and applicable range is wide.

Description

Multistage Digitron display driver circuit structure
Technical field
The present invention relates to the SIC (semiconductor integrated circuit) design field, particularly digital display driver circuit technical field, specifically refer to a kind of multistage Digitron display driver circuit structure.
Background technology
At present, the LED display driver circuit is applied to the display driver of the small household electrical appliances such as VCD, DVD and electromagnetic oven, micro-wave oven.LED (light emitting diode indicator) display driver is mainly exported driving and key scan etc. by MCU digital interface, data latches, demonstration and is partly formed, and shows that wherein the output driving is divided into (GRID) and exports and section (SEG) output.Show that 18 segment numeral light emitting diode needs 1GRID * 8SEG; Show that 10 8 segment numeral light emitting diodes need 10GRID * 8SEG, show the individual output port of output driving part needs 18 (10+8), too much output port has caused higher chip cost and packaging cost.
See also shown in Figure 1ly, it is the application connection layout of LED display driver circuit in prior art.
Wherein, circuit connecting relation is as follows:
The vdd terminal of module " display driver circuit " meets VDD, GND termination GND, DIO end is the input end of clock mouth for serial data input/output port, CLK end.
● the termination K1 of button SW1, another termination SEG1/KS1;
● the termination K2 of button SW2, another termination SEG1/KS1;
● the termination K1 of button SW3, another termination SEG2/KS2;
● the termination K2 of button SW4, another termination SEG2/KS2;
● the termination K1 of button SW5, another termination SEG3/KS3;
● the termination K2 of button SW6, another termination SEG3/KS3;
● the termination K1 of button SW7, another termination SEG4/KS4;
● the termination K2 of button SW8, another termination SEG4/KS4;
● the termination K1 of button SW9, another termination SEG5/KS5;
● the termination K2 of button SW10, another termination SEG5/KS5;
● the termination K1 of button SW11, another termination SEG6/KS6;
● the termination K2 of button SW12, another termination SEG6/KS6;
● the termination K1 of button SW13, another termination SEG7/KS7;
● the termination K2 of button SW14, another termination SEG7/KS7;
● the termination K1 of button SW15, another termination SEG8/KS8;
● the termination K2 of button SW16, another termination SEG8/KS8;
● a termination SEG1/KS1 of charactron 1 (LED1), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID1;
● a termination SEG1/KS1 of charactron 2 (LED2), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID2;
● a termination SEG1/KS1 of charactron 3 (LED3), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID3;
● a termination SEG1/KS1 of charactron 4 (LED4), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID4;
● a termination SEG1/KS1 of charactron 5 (LED5), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID5;
● a termination SEG1/KS1 of charactron 6 (LED6), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID6;
● a termination SEG1/KS1 of charactron 7 (LED7), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID7;
● a termination SEG1/KS1 of charactron 8 (LED8), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID8;
● a termination SEG1/KS1 of charactron 9 (LED9), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID9;
● a termination SEG1/KS1 of charactron 10 (LED10), b termination SEG2/KS2, c termination SEG3/KS3, d termination SEG4/KS4, e termination SEG5/KS5, f termination SEG6/KS6, g termination SEG7/KS7, dp termination SEG8/KS8, com termination GRID10.
See also shown in Figure 2ly, it is the LED display driver circuit fundamental diagram in Fig. 1 of prior art again.As shown in the figure, traditional LED display driver circuit makes a distinction SEG and GRID physically, and different GRID meets different LED.During work, what the SEG end was exported is the content that shows, what the GRID end was exported is that the time length that shows is brightness; Each display time slot only has a GRID output effectively, and remaining GRID is countless according to output, is in high-impedance state.Therefore, when LED1 worked, only having had data output on GRID1, and GRID2~GRID10 all is in idle condition, and resource is not effectively utilized.Therefore, the display mode that uses traditional LED display driver circuit to drive M GRID * N SEG needs M+N to show that output drives port.
Summary of the invention
The objective of the invention is to have overcome above-mentioned shortcoming of the prior art, provide a kind of and can take full advantage of the output port resource, effectively reduce chip cost and packaging cost, simple and practical, stable and reliable working performance, scope of application multistage Digitron display driver circuit structure comparatively widely.
In order to realize above-mentioned purpose, multistage Digitron display driver circuit structure of the present invention has following formation:
this multistage Digitron display driver circuit structure, comprise driver module, its principal feature is, described driver module has N and shows that output drives port, described each shows that output drives port and is connected with the gating end of a corresponding multistage charactron respectively, the digital pipe of described multistage has the segmentation corresponding with number of fragments and shows control port, each segmentation of each multistage charactron show control port respectively with driver module in other corresponding demonstration output driving port of driving port except the demonstration output that is connected with the gating end of this multistage charactron be connected, and N 〉=2, described number of fragments<N.
Have the first button control port and the second button control port on driver module in this multistage Digitron display driver circuit structure, described each shows that output drives port and described the first button control port and the second button control port among and has access to the control button.
Each of driver module in this multistage Digitron display driver circuit structure shows that the signal of output driving port is output as time division multiplexing mode, be that time-division slot shows that from each output drives output charactron gating signal port successively, in each time slot, show that with each segmentation of the multistage charactron of institute gating demonstration output that control port is connected drives that in port, output display drives signal.
The digital section of multistage in this multistage Digitron display driver circuit structure is LED luminescence display multistage charactron.
LED luminescence display multistage charactron in this multistage Digitron display driver circuit structure is common cathode charactron or common anode utmost point charactron.
Multistage charactron in this multistage Digitron display driver circuit structure is eight segment numeral pipes, and N>8.
Adopted the multistage Digitron display driver circuit structure of this invention, because the position that wherein will show output driving part and section are merged into one group of output, no longer the differentiation position of physics and the section, and distinguish position and section by time division multiplex, thereby realized the ingenious multiplexing of SEG port and GRID port, greatly reduced the demonstration output port quantity of LED display driver circuit, and realized taking full advantage of the output port resource, chip cost and packaging cost have been reduced, simple and practical, stable and reliable working performance, the scope of application are comparatively extensive.
Description of drawings
Fig. 1 is the annexation schematic diagram of LED display driver circuit of the prior art.
Fig. 2 is the principle of work schematic diagram of LED display driver circuit of the prior art.
Fig. 3 is the annexation schematic diagram of multistage Digitron display driver circuit structure of the present invention.
Fig. 4 is the principle of work schematic diagram of multistage Digitron display driver circuit structure of the present invention.
Embodiment
In order more clearly to understand technology contents of the present invention, describe in detail especially exemplified by following examples.
Novel LED display driver circuit provided by the present invention, its core concept are not distinguish separately position and section, but position and section are merged together, and replace with one group of output, distinguish position and section by time division multiplex.N shows that output drives the port maximum and can support the display mode of section of N position * (N-1).
see also shown in Figure 3, this multistage Digitron display driver circuit structure, comprise driver module, wherein said driver module has N and shows that output drives port, described each shows that output drives port and is connected with the gating end of a corresponding multistage charactron respectively, the digital pipe of described multistage has the segmentation corresponding with number of fragments and shows control port, each segmentation of each multistage charactron show control port respectively with driver module in other corresponding demonstration output driving port of driving port except the demonstration output that is connected with the gating end of this multistage charactron be connected, and N 〉=2, described number of fragments<N.
Wherein, have the first button control port K1 and the second button control port K2 on described driver module, described each shows that output drives port and described the first button control port K1 and the second button control port K2 among and has access to the control button.
Simultaneously, each of driver module in this multistage Digitron display driver circuit structure shows that the signal of output driving port is output as time division multiplexing mode, be that time-division slot shows that from each output drives output charactron gating signal port successively, in each time slot, show that with each segmentation of the multistage charactron of institute gating demonstration output that control port is connected drives that in port, output display drives signal.
Moreover, the digital section of this multistage is LED luminescence display multistage charactron, and described LED luminescence display multistage charactron is common cathode charactron or common anode utmost point charactron.
In preferred forms of the present invention, described multistage charactron is eight segment numeral pipes, and N>8.
In the middle of reality was used, Fig. 2 was a kind of application connection layout of LED display driver circuit of the present invention, and wherein module " new display driver circuit " is LED display driver circuit of the present invention.
Circuit connecting relation is as follows:
The vdd terminal of module " new display driver circuit " meets VDD, GND termination GND, DIO end is the input end of clock mouth for serial data input/output port, CLK end.
● the termination K1 of button SW1, another termination S1;
● the termination K2 of button SW2, another termination S1;
● the termination K1 of button SW3, another termination S2;
● the termination K2 of button SW4, another termination S2;
● the termination K1 of button SW5, another termination S3;
● the termination K2 of button SW6, another termination S3;
● the termination K1 of button SW7, another termination S4;
● the termination K2 of button SW8, another termination S4;
● the termination K1 of button SW9, another termination S5;
● the termination K2 of button SW10, another termination S5;
● the termination K1 of button SW11, another termination S6;
● the termination K2 of button SW12, another termination S6;
● the termination K1 of button SW13, another termination S7;
● the termination K2 of button SW14, another termination S7;
● the termination K1 of button SW15, another termination S8;
● the termination K2 of button SW16, another termination S8;
● the termination K1 of button SW17, another termination S9;
● the termination K2 of button SW18, another termination S9;
● the termination K1 of button SW19, another termination S10;
● the termination K2 of button SW20, another termination S10;
● a termination S2 of charactron 1 (LED1), b termination S3, c termination S4, d termination S5, e termination S6, f termination S7, g termination S8, dp termination S9, com termination S1;
● a termination S1 of charactron 2 (LED2), b termination S3, c termination S4, d termination S5, e termination S6, f termination S7, g termination S8, dp termination S9, com termination S2;
● a termination S1 of charactron 3 (LED3), b termination S2, c termination S4, d termination S5, e termination S6, f termination S7, g termination S8, dp termination S9, com termination S3;
● a termination S1 of charactron 4 (LED4), b termination S2, c termination S3, d termination S5, e termination S6, f termination S7, g termination S8, dp termination S9, com termination S4;
● a termination S1 of charactron 5 (LED5), b termination S2, c termination S3, d termination S4, e termination S6, f termination S7, g termination S8, dp termination S9, com termination S5;
● a termination S1 of charactron 6 (LED6), b termination S2, c termination S3, d termination S4, e termination S5, f termination S7, g termination S8, dp termination S9, com termination S6;
● a termination S1 of charactron 7 (LED7), b termination S2, c termination S3, d termination S4, e termination S5, f termination S6, g termination S8, dp termination S9, com termination S7;
● a termination S1 of charactron 8 (LED8), b termination S2, c termination S3, d termination S4, e termination S5, f termination S6, g termination S7, dp termination S9, com termination S8;
● a termination S1 of charactron 9 (LED9), b termination S2, c termination S3, d termination S4, e termination S5, f termination S6, g termination S7, dp termination S8, com termination S9;
● a termination S1 of charactron 10 (LED10), b termination S2, c termination S3, d termination S4, e termination S5, f termination S6, g termination S7, dp termination S8, com termination S10.
See also shown in Figure 4ly, it is a kind of fundamental diagram of LED display driver circuit of the present invention again.As shown in the figure, when the time was in display time slot 1, S1 exported high level, S2-S10 is according to the interior perhaps output low level that shows or be in high-impedance state, due to the unilateal conduction principle of light emitting diode, LED1 is in the duty of conducting, and LED2-LED10 is in the state by not conducting; When the time was in display time slot 2, S2 exported high level, and S1, S3-S10 are according to the interior perhaps output low level that shows or be in high-impedance state, and this moment, LED2 was in the duty of conducting, and LED1, LED3-LED10 are in the state by not conducting; The like, when the time was in display time slot 10, S10 exported high level, and S1-S9 is according to the interior perhaps output low level that shows or be in high-impedance state, and LED10 is in the duty of conducting, and LED1-LED9 is in the state by not conducting; Within a display cycle, LED1-LED10 is conducting in turn, thereby has guaranteed the correctness of displaying contents.
LED display driver circuit of the present invention is applicable to common anode and common cathode charactron simultaneously, a kind of fundamental diagram when wherein Fig. 4 is LED display driver circuit connection common anode charactron of the present invention, Fig. 3 are that LED display driver circuit of the present invention drives ports (S1-S10) as a kind of application connection layout of example take 10 outputs.
The core concept of LED display driver circuit of the present invention is that SEG and GRID are merged into one group of output driving port S, and the S port had both been exported the SEG data, also exported the GRID data, distinguished by time division multiplex; In the situation that there be N to show that output drives port (S1-SN), each display time slot only has a S port to export as the GRID data, remaining S port is exported as the SEG data, utilize the unilateal conduction principle of light emitting diode, each display time slot only has a LED to be in the duty of forward conduction, remaining LED be in oppositely by state; Within a display cycle, LED1-LEDN is conducting in turn, has guaranteed the correctness of displaying contents.The hop count that connects during by practical application as the quantity of the S port of SEG data output determines.LED display driver circuit of the present invention is in the situation that there be N to show that output drives port, and maximum can be supported the display mode of section of N position * (N-1).
In technical scheme of the present invention, this LED display driver circuit has been realized taking full advantage of the output port resource by output port multiplexing, thereby dwindled chip area, reduced packaging cost, and the position and the section that show export structure can be merged into one group of output, determine position and section by time division multiplex.
There is N to show that output drives port (S 1-S N) situation under, each display time slot only has a S port to export as the GRID data, remaining S port is exported as the SEG data, utilize the unilateal conduction principle of light emitting diode, each display time slot only has a LED to be in the duty of forward conduction, remaining LED be in oppositely by state; Within a display cycle, LED1-LEDN is conducting in turn, has guaranteed the correctness of displaying contents.The hop count that the quantity that drives port as the demonstration output of SEG data output connects during by practical application determines.Different display time slots, different as the demonstration output driving port of GRID data output.
In the situation that there be N to show that output drives port, maximum can be supported the display mode of section of N position * (N-1), and this LED display driver circuit is applicable to common anode and common cathode charactron simultaneously.
Adopted above-mentioned multistage Digitron display driver circuit structure, because the position that wherein will show output driving part and section are merged into one group of output, no longer the differentiation position of physics and the section, and distinguish position and section by time division multiplex, thereby realized the ingenious multiplexing of SEG port and GRID port, greatly reduced the demonstration output port quantity of LED display driver circuit, and realized taking full advantage of the output port resource, chip cost and packaging cost have been reduced, simple and practical, stable and reliable working performance, the scope of application are comparatively extensive.
In this instructions, the present invention is described with reference to its specific embodiment.But, still can make various modifications and conversion obviously and not deviate from the spirit and scope of the present invention.Therefore, instructions and accompanying drawing are regarded in an illustrative, rather than a restrictive.

Claims (6)

1. multistage Digitron display driver circuit structure, comprise driver module, it is characterized in that, described driver module has N and shows that output drives port, described each shows that output drives port and is connected with the gating end of a corresponding multistage charactron respectively, the digital pipe of described multistage has the segmentation corresponding with number of fragments and shows control port, each segmentation of each multistage charactron show control port respectively with driver module in other corresponding demonstration output driving port of driving port except the demonstration output that is connected with the gating end of this multistage charactron be connected, and N 〉=2, described number of fragments<N.
2. multistage Digitron display driver circuit structure according to claim 1, it is characterized in that, have the first button control port (K1) and the second button control port (K2) on described driver module, described each shows that output drives port and described the first button control port (K1) and the second button control port (K2) among and has access to the control button.
3. multistage Digitron display driver circuit structure according to claim 1, it is characterized in that, each of described driver module shows that the signal of output driving port is output as time division multiplexing mode, be that time-division slot shows that from each output drives output charactron gating signal port successively, in each time slot, show that with each segmentation of the multistage charactron of institute gating demonstration output that control port is connected drives that in port, output display drives signal.
4. multistage Digitron display driver circuit structure according to claim 1, is characterized in that, the digital section of described multistage is LED luminescence display multistage charactron.
5. according to multistage Digitron display driver circuit structure claimed in claim 4, it is characterized in that, described LED luminescence display multistage charactron is common cathode charactron or common anode utmost point charactron.
6. the described multistage Digitron display driver circuit of any one structure according to claim 1 to 5, is characterized in that, described multistage charactron is eight segment numeral pipes, and N>8.
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CN103761942A (en) * 2014-02-14 2014-04-30 福州福大海矽微电子有限公司 Digital tube display and key control chip with array display multiplexing algorithm
CN103824539A (en) * 2014-02-27 2014-05-28 青岛海信宽带多媒体技术有限公司 Method for displaying and controlling digital terminal equipment and nixie tube thereof
CN104077990A (en) * 2014-07-02 2014-10-01 福州福大海矽微电子有限公司 LED nixie tube display and key control chip using time division multiplexing technology
CN104332125A (en) * 2014-11-13 2015-02-04 梧州学院 Nixie tube panel and key control circuit and control method thereof
CN104820394A (en) * 2015-03-17 2015-08-05 中冶东方工程技术有限公司 System for driving multivariable instrument by use of PLC digital output module
CN107274840A (en) * 2017-07-27 2017-10-20 京东方科技集团股份有限公司 Light source drive and its driving method and display device
CN109326241A (en) * 2018-07-23 2019-02-12 浙江绍兴苏泊尔生活电器有限公司 Nixie tube display circuit and electric equipment
CN109360521A (en) * 2018-07-23 2019-02-19 浙江绍兴苏泊尔生活电器有限公司 Display module, display circuit and consumer
CN109754747A (en) * 2017-11-01 2019-05-14 无锡华润矽科微电子有限公司 Integrated LED drive circuit structure and corresponding LED display system
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CN103500549A (en) * 2013-09-17 2014-01-08 浙江绍兴苏泊尔生活电器有限公司 Driving circuit and driving method of LED or nixie tube
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CN103824539A (en) * 2014-02-27 2014-05-28 青岛海信宽带多媒体技术有限公司 Method for displaying and controlling digital terminal equipment and nixie tube thereof
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CN104077990B (en) * 2014-07-02 2016-07-27 福州福大海矽微电子有限公司 Adopt LED numeral method and the key control chip of time-division multiplex technology
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CN107274840B (en) * 2017-07-27 2020-12-04 京东方科技集团股份有限公司 Light source driver, driving method thereof and display device
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