CN103746681B - A kind of upper and lower electricity output tri-state control circuit of cmos device power supply - Google Patents
A kind of upper and lower electricity output tri-state control circuit of cmos device power supply Download PDFInfo
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- CN103746681B CN103746681B CN201310718846.4A CN201310718846A CN103746681B CN 103746681 B CN103746681 B CN 103746681B CN 201310718846 A CN201310718846 A CN 201310718846A CN 103746681 B CN103746681 B CN 103746681B
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Abstract
The invention discloses a kind of upper and lower electricity output tri-state control circuit of cmos device power supply, including metal-oxide-semiconductor string resistance bleeder circuit, PMOS switch pipe and plastic filter circuit；Plastic filter circuit include equivalent PMOS transistor into electric capacity be coupled between the grid end of PMOS switch pipe and power end, equivalent nmos pass transistor into electric capacity be coupled between the drain terminal of PMOS switch pipe and power end and buffer circuits connection PMOS switch pipe drain terminal and control circuit output end；Purposes of the present invention is that control device output port remains high-impedance state, so as to maintain the correctness and protection device of signal transmission on device output bus to be not damaged by when the power supply electrifying or lower electricity of device are less than the threshold level for setting；When the power supply power-on and power-off of device are higher than the threshold level for setting, present invention control circuit release enables the tri-state that signal OE carrys out control device output port to the control of institute's control device output port by device output.
Description
Technical field
The present invention relates to a kind of upper and lower electricity output tri-state control circuit of cmos device power supply, particularly one kind is in device power source
When upper electric or lower electricity is less than the threshold level value for setting, control device output port keeps the circuit structure of high-impedance state, belongs to device
Part control field.
Background technology
As the high speed development of IC industry, and the even more complex of applied environment are changeable, for ensureing that bus is passed
The requirement of defeated signal integrity becomes more and more important.The warm swap of veneer is an important application work(in communication apparatus
Can, in order to realize the warm swap of veneer, it is necessary to corresponding interface device meets certain characteristic.Traditional interface device is in electricity
Under the pattern of source normal power supply, can be total to ensure by enabling whether signal behavior device output end is operated in high-impedance state
The integrality of signal transmission on line.But if under the pattern of power supply abnormal electrical power, particularly in power supply electrifying or lower electricity
During, traditional interface device often normally cannot be operated in high-impedance state in control output end, be easily caused signal in bus
During transmission mistake upset, or even interface device damage.
The content of the invention
Technology solve problem of the invention is：Overcome the deficiencies in the prior art, there is provided a kind of simple and practical control
Circuit structure processed, can effectively control device output end working condition, especially electricity in electric on device power source or lower electric process
On source electric or lower electricity less than a certain design threshold level when, force device output port to keep high-impedance state, it is ensured that in bus
Signal transmission be able to maintain that integrality under device power source non-normal working pattern.
Technical solution of the invention is：The tri-state of device output end mouthful is controlled by two control signals, and one is
Control circuit of the invention, one is that output enables signal（Output Enable,OE）, when power supply electrifying or lower electricity are less than and set
During fixed normal power supply threshold level, control circuit output end Q output signals 0 of the present invention, device output end mouthful is now set to
High-impedance state；When power supply electrifying or lower electricity are higher than the normal power supply threshold level for setting, Q outputs in control circuit output end of the present invention
Signal 1, if now OE is output as 1, device output end mouthful is set to high-impedance state, if OE is output as 0, device output end mouthful is by device
Internal logic circuit determine be output as it is high or low.
Control circuit of the invention is a kind of upper and lower electricity output tri-state control circuit of cmos device power supply, including metal-oxide-semiconductor string
Resistance bleeder circuit, PMOS switch pipe P5 and plastic filter circuit.Metal-oxide-semiconductor string resistance bleeder circuit is made up of resistance R3 and resistance R4,
One end of resistance R3 is connected with one end of resistance R4, and as the output end of MOS string resistance bleeder circuits, with PMOS switch pipe P5's
Grid end is connected, and the other end of resistance R3 is connected with power source voltage Vcc, and the other end of resistance R4 is connected to the ground.PMOS switch pipe P5
Source and substrate terminal be all connected with power source voltage Vcc, drain terminal is connected with one end of resistance R6, and with the input of output buffer
End is connected, and the other end of resistance R6 is connected to the ground.Plastic filter circuit is made up of electric capacity C7, electric capacity C8 and output buffer, electricity
The one end for holding C7 is connected with the grid end of PMOS switch pipe P5, and the other end is connected with power source voltage Vcc, one end of electric capacity C8 and PMOS
The drain terminal of switching tube P5 is connected, and the other end is connected with power source voltage Vcc, and the input of output buffer is with PMOS switch pipe P5's
Drain terminal is connected, and the output end of output buffer controls the output end output control signal of circuit as the present invention.
Metal-oxide-semiconductor string hinders bleeder circuit by adjusting the resistance value ratio of resistance R3 and resistance R4, and supply voltage is obtained in node A
The proportion divider value of Vcc, and the grid end of PMOS switch pipe P5 is connected to, conducting and the shut-off of control PMOS switch pipe P5.
During power supply electrifying or lower electricity, when the voltage and power supply of the output node A of metal-oxide-semiconductor string resistance bleeder circuit
When the pressure difference of voltage vcc is less than the on state threshold voltage of PMOS switch pipe P5, PMOS switch pipe P5 is off state, resistance R6
Node B is pulled low to the control signal that zero potential, i.e. control circuit output are 0, forces for device output end mouthful to be set to high-impedance state；
When the conducting of the voltage of output node A and the pressure difference of power source voltage Vcc higher than PMOS switch pipe P5 of metal-oxide-semiconductor string resistance bleeder circuit
During threshold voltage, PMOS switch pipe P5 is in opening, because the conducting resistance of PMOS switch pipe P5 designs is relative to resistance
The resistance of R6 is smaller, so the current potential of node B is identical with power source voltage Vcc holding, i.e., control circuit output is 1 control letter
Number, now device can be with normal work in the case where power source voltage Vcc is powered, and upper and lower electricity output tri-state control circuit release is defeated to device
The control of exit port, the tri-state that signal OE carrys out control device output port is enabled by device output；By selecting different threshold values
The resistance value ratio of the PMOS switch pipe P5 or the different resistance R3 and resistance R4 of selection of voltage, can be designed that different electrical power voltage threshold
Be worth the control circuit of level, make the level of control circuit output node Q with supply voltage power-on and power-off so far threshold level when occur
Upset.
Electric capacity C7 in plastic filter circuit ensures, when the fluctuation that non-power-on and power-off occurs in power source voltage Vcc, to cause
The upset that mistake occurs in node B level makes output control signal mistake；Electric capacity C8 ensures to turn on or close as PMOS switch pipe P5
Disconnected moment, it is to avoid because clock feed-through effect makes node B export larger burr；Output buffer is by the level of node B
Send control circuit output end Q of the present invention after shaping to, improve the driving force and output impedance of control circuit output end Q.
Present invention advantage compared to the prior art is：
（1）A kind of control circuit of cmos device of present invention design, by designing a voltage threshold level level, works as device
Electricity when also not up to electricity is less than this threshold level under this threshold level, or supply voltage, power by device on supply voltage
Deficiency cannot normal work, the control circuit output signal 0, pressure device output end is set to high-impedance state, device will not be caused
In upper electric or lower electric process, interference is produced to bus signals, influence the integrality of bus signal transmission to even result in device
Damage.
（2）Electricity is also not below this threshold under electricity exceedes this threshold level, or supply voltage on device power source voltage
During value level, supply voltage is powered can meet proper device operation, the control circuit output signal 1, now control circuit to release
It is rivals in a contest the control of device output end mouthful, the tri-state that signal OE carrys out control device output port is enabled by device output.
（3）Emulated under standard CMOS process, by the control signal oscillogram simulation result of final output of the present invention
Understand, the voltage threshold level level that the present invention is pre-seted is 2.1V, when electricity is also not up to 2.1V or power supply on supply voltage
Under voltage electricity less than 2.1V when, device electricity shortage cannot normal work, the control circuit output signal 0, pressure make device defeated
Go out end and be set to high-impedance state；When on supply voltage electricity more than 2.1V or supply voltage under it is electric be also not below 2.1V when, supply voltage
Power supply can meet proper device operation, the control circuit output signal 1, now control circuit release to device output end mouthful
Control, the tri-state that signal OE carrys out control device output port is enabled by device output.
Brief description of the drawings
Fig. 1 is the upper and lower electricity output tri-state control circuit structure chart of cmos device power supply of the invention；
Fig. 2 is that the upper and lower electricity output tri-state control circuit interior joint B level of cmos device power supply of the invention is upper and lower with power supply
The change simulation waveform of electricity.
Fig. 3 is that the upper and lower electricity output tri-state control circuit output end Q level of cmos device power supply of the invention is upper and lower with power supply
The change simulation waveform of electricity.
Specific embodiment
As shown in figure 1, be a kind of structure chart of the upper and lower electricity output tri-state control circuit of cmos device power supply of the invention, including
Metal-oxide-semiconductor string hinders bleeder circuit 1, PMOS switch pipe P5 and plastic filter circuit 2.Metal-oxide-semiconductor string resistance bleeder circuit 1 include resistance R3 and
Resistance R4, plastic filter circuit 2 includes electric capacity C7, electric capacity C8 and output buffer 9.
Used metal-oxide-semiconductor is enhanced metal-oxide-semiconductor in the present invention.
On the device power source during electric or lower electricity, metal-oxide-semiconductor string resistance bleeder circuit 1 by resistance R3 and resistance R4 point
Pressure, the proportion divider value of power source voltage Vcc is obtained in node A, and is connected to the grid end of PMOS switch pipe P5, controls PMOS switch
The conducting of pipe P5 and shut-off.When the voltage of output node A of metal-oxide-semiconductor string resistance bleeder circuit 1 is less than with the pressure difference of power source voltage Vcc
During the on state threshold voltage of PMOS switch pipe P5, PMOS switch pipe P5 is off state, and node B is pulled low to zero electricity by resistance R6
Position, i.e., control circuit output is 0 control signal, forces for device output end mouthful to be set to high-impedance state；When metal-oxide-semiconductor string resistance partial pressure electricity
When the voltage of the output node A on road 1 is with the on state threshold voltage that the pressure difference of power source voltage Vcc is higher than PMOS switch pipe P5, PMOS
Switching tube P5 is in opening, because the conducting resistance of PMOS switch pipe P5 designs is smaller relative to the resistance of resistance R6, institute
Identical with power source voltage Vcc holding with the current potential of node B, i.e., control circuit output is 1 control signal, now controls circuit to release
It is rivals in a contest the control of device output end mouthful, the tri-state that signal OE carrys out control device output port is enabled by device output.Electric capacity C7
Ensure that the upset that node B level will not be caused mistake occur controls output when the fluctuation that non-power-on and power-off occurs in power source voltage Vcc
Signal error processed；Electric capacity C8 ensures the moment for turning on or turning off as PMOS switch pipe P5, will not be made due to clock feed-through effect
Node B exports larger burr；The effect of output buffer 9 is to send control circuit output to after level shaping by node B
End Q, improves the driving force and output impedance of control circuit output end Q.
As shown in Fig. 2 for the upper and lower electricity output tri-state control circuit interior joint B level of cmos device power supply of the invention with electricity
The change simulation waveform of source power-on and power-off, power source voltage Vcc normal power supply level is 3.3V, the power source voltage Vcc of design in figure
Threshold level value be 2.1V, this voltage threshold level level value can be by choosing different on state threshold voltages during actual design
PMOS switch pipe P5 or the resistance value ratio of different resistance R3 and resistance R4 redesign.Can be with by simulation waveform Fig. 2
Find out, when electricity is also not up to 2.1V or lower electricity less than 2.1V in power source voltage Vcc, node B is low level, that is, control circuit
0 control signal is output as, forces for device output end mouthful to be set to high-impedance state；When in power source voltage Vcc electricity reach 2.1V or
When lower electricity is also not below 2.1V, the level of node B is identical with power source voltage Vcc holding, i.e., control circuit output is 1 control letter
Number, now control circuit release to the control of device output end mouthful, control device is come by device output enable signal OE and is exported
The tri-state of port.
As shown in figure 3, for the upper and lower electricity output tri-state control circuit of cmos device power supply of the invention output end Q level with
The change simulation waveform of power supply power-on and power-off, the level of node B is can be seen that by shaping filter electricity by simulation waveform Fig. 3
After the shaping filter on road 2, influenceed to diminish by ghost effect so that the waveform of control circuit output end Q changes more precipitous, signal
Response upset is rapider.
The present invention has should be noted at 2 points：
1st, as shown in Figures 2 and 3, in power supply electrifying or lower electric process, when the value of power source voltage Vcc is very small
Wait, because in circuit there is ghost effect in metal-oxide-semiconductor, so the output signal of control circuit has non-ideal fluctuation, because this ripple
Dynamic amplitude is very small for supply voltage value, so not interfering with the overall working condition of circuit.
2nd, due to the presence of electric capacity C7 and electric capacity C8 in the plastic filter circuit 2 for controlling circuit, it requires the upper of power supply
Electric or lower electric speed can not be too fast.
The content not being described in detail in this specification belongs to the known technology of professional and technical personnel in the field.
Claims (3)
1. the upper and lower electricity output tri-state control circuit of a kind of cmos device power supply, it is characterised in that：Bleeder circuit is hindered including metal-oxide-semiconductor string
(1), PMOS switch pipe P5 and plastic filter circuit (2)；Metal-oxide-semiconductor string hinders bleeder circuit (1) and is made up of resistance R3 and resistance R4, electricity
The one end for hindering R3 is connected with one end of resistance R4, and as the output end of MOS strings resistance bleeder circuit (1), with PMOS switch pipe P5
Grid end be connected, the other end of resistance R3 is connected with power source voltage Vcc, and the other end of resistance R4 is connected to the ground；PMOS switch pipe
The source and substrate terminal of P5 are all connected with power source voltage Vcc, and drain terminal is connected with one end of resistance R6, and with output buffer (9)
Input be connected, the other end of resistance R6 is connected to the ground；Plastic filter circuit (2) is buffered by electric capacity C7, electric capacity C8 and output
Device (9) is constituted, and one end of electric capacity C7 is connected with the grid end of PMOS switch pipe P5, and the other end is connected with power source voltage Vcc, electric capacity C8
One end be connected with the drain terminal of PMOS switch pipe P5, the other end is connected with power source voltage Vcc, the input of output buffer (9)
Drain terminal with PMOS switch pipe P5 is connected, and the output end of output buffer (9) is used as the output end for controlling circuit；
During power supply electrifying or lower electricity, when the voltage and power supply of the output node A of metal-oxide-semiconductor string resistance bleeder circuit (1)
When the pressure difference of voltage vcc is less than the on state threshold voltage of PMOS switch pipe P5, PMOS switch pipe P5 is off state, resistance R6
Node B is pulled low to the control signal that zero potential, i.e. control circuit output are 0, forces for device output end mouthful to be set to high-impedance state；
When the voltage of output node A and the pressure difference of power source voltage Vcc of metal-oxide-semiconductor string resistance bleeder circuit (1) are higher than PMOS switch pipe P5's
During on state threshold voltage, PMOS switch pipe P5 be in opening, due to PMOS switch pipe P5 design conducting resistance relative to
The resistance of resistance R6 is smaller, so the current potential of node B is identical with power source voltage Vcc holding, i.e., control circuit output is 1 control
Signal, now device can be with normal work in the case where power source voltage Vcc is powered, and upper and lower electricity output tri-state control circuit release is to device
The control of output port, the tri-state that signal OE carrys out control device output port is enabled by device output；By selecting different thresholds
The resistance value ratio of the PMOS switch pipe P5 or the different resistance R3 and resistance R4 of selection of threshold voltage, can be designed that different electrical power voltage
The control circuit of threshold level, make the level of control circuit output node Q with supply voltage power-on and power-off so far threshold level when send out
Raw upset；
A voltage threshold level level is designed, when electricity is also not up to this threshold level, or power supply electricity on device power source voltage
When pressure electricity is less than this threshold level, device electricity shortage cannot normal work, the control circuit output signal 0 forces to make
Device output end is set to high-impedance state, will not cause device in upper electric or lower electric process, and bus signals are produced with interference, and influence is total
The integrality of line signal transmission even results in the damage of device；
Electricity is also not below this threshold level under electricity exceedes this threshold level, or supply voltage on device power source voltage
When, supply voltage is powered can meet proper device operation, the control circuit output signal 1, now control circuit release to device
The control of part output port, the tri-state that signal OE carrys out control device output port is enabled by device output；
A kind of described upper and lower electricity output tri-state control circuit of cmos device power supply, it is electric or lower electric less than setting on device power source
Threshold level value when, control device output port keep high-impedance state；When power supply electrifying or lower electricity are higher than the normal power supply for setting
Upper and lower electricity output tri-state control circuit release enables signal to the control of device output end mouthful by device output during threshold level
OE carrys out the tri-state of control device output port；
The voltage threshold level level for pre-seting is 2.1V, when electricity under electricity also not up to 2.1V on supply voltage or supply voltage
During less than 2.1V, device electricity shortage cannot normal work, the control circuit output signal 0, pressure be set to device output end
High-impedance state；When on supply voltage electricity more than 2.1V or supply voltage under it is electric be also not below 2.1V when, supply voltage is powered can be with
Meet proper device operation, the control circuit output signal 1 now controls circuit to discharge the control to device output end mouthful,
The tri-state that signal OE carrys out control device output port is enabled by device output.
2. the upper and lower electricity output tri-state control circuit of a kind of cmos device power supply according to claim 1, it is characterised in that：
Metal-oxide-semiconductor string hinders bleeder circuit (1) by adjusting the resistance value ratio of resistance R3 and resistance R4, and the ratio of power source voltage Vcc is obtained in node A
Example partial pressure value, and the grid end of PMOS switch pipe P5 is connected to, conducting and the shut-off of control PMOS switch pipe P5.
3. the upper and lower electricity output tri-state control circuit of a kind of cmos device power supply according to claim 1, it is characterised in that：It is whole
Electric capacity C7 in shape filter circuit (2) ensures that, when the fluctuation that non-power-on and power-off occurs in power source voltage Vcc, node B electricity will not be caused
The upset of existing mistake of clearing makes output control signal mistake；Electric capacity C8 ensures the wink for turning on or turning off as PMOS switch pipe P5
Between, it is to avoid because clock feed-through effect makes node B export larger burr；Output buffer (9) is by the level shaping of node B
After send control circuit output end Q to, improve the driving force and output impedance of control circuit output end Q.
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| CN201310718846.4A CN103746681B (en) | 2013-12-24 | 2013-12-24 | A kind of upper and lower electricity output tri-state control circuit of cmos device power supply |
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| CN111698438B (en) * | 2020-06-11 | 2021-07-06 | 中国科学院长春光学精密机械与物理研究所 | TDI CCD power-on time sequence control circuit |
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| CN103746681A (en) | 2014-04-23 |
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