CN209562534U - A kind of universal serial bus high-speed driving circuit - Google Patents
A kind of universal serial bus high-speed driving circuit Download PDFInfo
- Publication number
- CN209562534U CN209562534U CN201920539995.7U CN201920539995U CN209562534U CN 209562534 U CN209562534 U CN 209562534U CN 201920539995 U CN201920539995 U CN 201920539995U CN 209562534 U CN209562534 U CN 209562534U
- Authority
- CN
- China
- Prior art keywords
- field
- effect tube
- circuit
- sub
- drain electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Dc Digital Transmission (AREA)
Abstract
The utility model discloses a kind of universal serial bus high-speed driving circuits, are related to technical field of integrated circuits.The universal serial bus high-speed driving circuit includes input sub-circuit, data output sub-circuit and load sub-circuit, high speed differential data information input to the data is exported sub-circuit by the input sub-circuit, and data information is exported high speed differential data through the load sub-circuit by the data output sub-circuit；The universal serial bus high-speed driving circuit further includes drop-down sub-circuit, and the drop-down sub-circuit is connected to the data output sub-circuit and for pulling down the voltage for exporting first node in sub-circuit to default operating voltage.Technical solutions of the utility model pull down the voltage of first node in the output sub-circuit to default operating voltage, improve data are transmitted in high-speed driving circuit stability and accuracy by setting drop-down sub-circuit.
Description
Technical field
The utility model relates to integrated circuit techniques, more particularly to a kind of universal serial bus high-speed driving circuit.
Background technique
Universal serial bus (Universal Serial Bus, USB) 2.0 support high speed (480M), at full speed (12M) and
The data of low speed (1.5M) are transmitted.High-speed driving circuit is generally comprised for the universal serial bus of high speed data transfer, high speed
The core circuit of driving circuit includes input buffer stage and output stage, and the high speed differential data of input is after input buffer stage
To output stage, then high speed differential data is exported by load circuit.And high-speed driving circuit receive enable signal it
Afterwards, the voltage of the current source node of the output stage of high-speed driving circuit needs to be reduced to normal work from supply voltage (such as 3.3V)
A fixed voltage value (such as 1.59V) when making, this needs the regular hour.Then, for high speed data transfer (480M),
The voltage of current source node is reduced to just not yet when just will appear former high speed differential data inputs in transmission process
Often work when fixed voltage value the case where, then this will lead to output former high speed differential datas (especially first
Position data) amplitude of oscillation the case where substantially exceeding the high speed differential data amplitude of oscillation (400mV) as defined in agreement, this can reduce general serial
The stability and accuracy of bus data transfer also just influence whether the eye figure of USB device test.
Summary of the invention
The main purpose of the utility model is to provide a kind of universal serial bus high-speed driving circuits, it is intended to improve data
The stability and accuracy of transmission.
To achieve the above object, the utility model provides a kind of universal serial bus high-speed driving circuit, including input
Circuit, data output sub-circuit and load sub-circuit, the input sub-circuit is by high speed differential data information input to the number
According to output sub-circuit, data information is exported high speed differential data through the load sub-circuit by the data output sub-circuit；Institute
Stating universal serial bus high-speed driving circuit further includes drop-down sub-circuit, and the drop-down sub-circuit is connected to data output
Circuit is simultaneously used to pull down the voltage for exporting first node in sub-circuit to default operating voltage.
Preferably, the drop-down sub-circuit includes at least two field-effect tube parallel with one another.
Preferably, the input sub-circuit includes the first field-effect tube, the second field-effect tube, third field-effect tube, the 4th
Field-effect tube and the 5th field-effect tube, first field-effect tube are connected to the third field-effect tube and are connected to number simultaneously
According to output sub-circuit, second field-effect tube is connected to the 4th field-effect tube and is connected to the data output simultaneously
Sub-circuit, the third field-effect tube and the 4th field-effect tube are connected to the 5th field-effect tube.
Preferably, the source electrode of first field-effect tube and second field-effect tube is connected to the first bias current sources,
So that first bias current sources provide bias current for the input sub-circuit；First field-effect tube and the third
The grid of field-effect tube is connected to the first differential signal input, and second field-effect tube is connected with the 4th field-effect tube
In the second differential signal input；
The drain electrode of first field-effect tube and second field-effect tube is connected to the data output sub-circuit；
The drain electrode of the third field-effect tube and the 4th field-effect tube is connected to first field-effect tube and described second
The drain electrode of field-effect tube is simultaneously connected to and described is connected to the data output sub-circuit；The grid of 5th field-effect tube
Pole is connected to the first enable signal end, source electrode is grounded, drain electrode is connected to the third field-effect tube and the 4th field-effect tube
Source electrode.
Preferably, the input sub-circuit further includes first resistor and second resistance, one end connection of the first resistor
In the drain electrode of the third field-effect tube, the other end be connected to the third field-effect tube source electrode and the 5th field-effect tube
Drain electrode；One end of the second resistance is connected to the drain electrode of the 4th field-effect tube, the other end is connected to described 4th
The drain electrode of the source electrode of effect pipe and the 5th field-effect tube.
Preferably, data output sub-circuit include the 6th field-effect tube, the 7th field-effect tube, the 8th field-effect tube and
9th field-effect tube；
The source electrode of 6th field-effect tube is connected to power supply, drain electrode is connected to drain electrode, the grid of first field-effect tube
Pole is connected to first enable signal end；
The source electrode of 7th field-effect tube is connected to the power supply, drain electrode is connected to the leakage of second field-effect tube
Pole, grid are connected to first enable signal end；
The source electrode of 8th field-effect tube is connected to the second bias current sources by first node, grid is connected to
Drain electrode, the drain electrode of first field-effect tube and the 6th field-effect tube are connected to the load sub-circuit；
The source electrode of 9th field-effect tube is connected to the second bias current sources, grid by the first node and connects respectively
It is connected to the drain electrode of second field-effect tube and the 7th field-effect tube, drain electrode is connected to the load sub-circuit.
Preferably, the load sub-circuit includes the first differential signal outputs, the second differential signal outputs, third electricity
Resistance and the 4th resistance；One end of the 3rd resistor is connected to the drain electrode and second difference of the 9th field-effect tube
Signal output end, other end ground connection；One end of 4th resistance is connected to drain electrode and the institute of the 8th field-effect tube
State the first differential signal outputs, other end ground connection.
Preferably, the drop-down sub-circuit includes the tenth field-effect tube and the 11st field-effect tube, the tenth field-effect
Pipe and the source electrode of the 11st field-effect tube are connected to the second bias current sources, grounded drain；Tenth field-effect tube
Grid is connected to the first enable signal end, and the grid of the 11st field-effect tube is connected to the second enable signal end.
Preferably, first enable signal end and second enable signal end are also connected with overrun control, use
Postpone the enable signal exported in first enable signal end in the enable signal for exporting second enable signal end.
Technical solutions of the utility model pull down sub-circuit work before high-speed driving circuit is enabled by setting drop-down sub-circuit
Make, the voltage of first node is high in the prior art so as to solve to default operating voltage in the drop-down output sub-circuit
The unstable problem of former high speed differential datas of fast driving circuit output, improves what data in high-speed driving circuit were transmitted
Stability and accuracy.
Detailed description of the invention
Fig. 1 is the circuit diagram of the utility model universal serial bus high-speed driving circuit；
Fig. 2 is the signal waveforms of input signal in the utility model embodiment；
Fig. 3 is the signal waveforms of output signal in the prior art；
Fig. 4 is the signal waveforms of output signal in the utility model embodiment.
The embodiments will be further described with reference to the accompanying drawings for the realization, functional characteristics and advantage of the utility model aim.
Specific embodiment
It should be appreciated that specific embodiment described herein is only used to explain the utility model, it is not used to limit this
Utility model.
The present invention will be further described with reference to the accompanying drawing.
A kind of universal serial bus high-speed driving circuit, as shown in Figure 1, including input sub-circuit, data output sub-circuit
With load sub-circuit, high speed differential data information input to the data is exported sub-circuit, the number by the input sub-circuit
Data information is exported into high speed differential data through the load sub-circuit according to output sub-circuit；The universal serial bus high speed is driven
Dynamic circuit further includes drop-down sub-circuit, and the drop-down sub-circuit is connected to the data output sub-circuit and is used to pull down described
The voltage of first node X in sub-circuit is exported to default operating voltage.
The utility model embodiment pulls down sub-circuit work before high-speed driving circuit is enabled by setting drop-down sub-circuit
Make, the voltage of first node X is high in the prior art so as to solve to default operating voltage in the drop-down output sub-circuit
The unstable problem of former high speed differential datas of fast driving circuit output, improves what data in high-speed driving circuit were transmitted
Stability and accuracy.
Preferably, the drop-down sub-circuit includes at least two field-effect tube parallel with one another.In a particular embodiment, may be used
The quantity of the field-effect tube in size setting drop-down sub-circuit is pulled down according to the voltage of first node X.It pulls down in parallel in sub-circuit
Field-effect tube it is more, the voltage change of first node X is slower, former high speed differential datas of high-speed driving circuit are more steady
It is fixed.
Specifically, the size of the operating voltage after drop-down is configured according to real work needs, can be pulled down by setting
In sub-circuit the size of field-effect tube or under each field-effect tube series resistance to realize.
Preferably, the input sub-circuit includes the first field-effect tube M1, the second field-effect tube M2, third field-effect tube
M3, the 4th field-effect tube M4 and the 5th field-effect tube M5, the first field-effect tube M1 be connected to the third field-effect tube M3,
And it is connected to data output sub-circuit simultaneously, the second field-effect tube M2 is connected to the 4th field-effect tube M4 and simultaneously
It is connected to the data output sub-circuit, the third field-effect tube M3 and the 4th field-effect tube M4 are connected to the 5th effect
It should pipe M5.
In a particular embodiment, the first field-effect tube M1 and the second field-effect tube M2 be PMOS tube, third field-effect tube M3,
4th field-effect tube M4 and the 5th field-effect tube M5 is NMOS tube.
Preferably, the source electrode of the first field-effect tube M1 and the second field-effect tube M2 is connected to the first bias current
Source I1, so that the first bias current sources I1 provides bias current for the input sub-circuit；The first field-effect tube M1
With the grid of the third field-effect tube M3 be connected to the first differential signal input DP_in, the second field-effect tube M2 and
The 4th field-effect tube M4 is connected to the second differential signal input DM_in；
The drain electrode of the first field-effect tube M1 and the second field-effect tube M2 are connected to data output
Circuit；The drain electrode of the third field-effect tube M3 and the 4th field-effect tube M4 are connected to the first field-effect tube M1
Drain electrode with the second field-effect tube M2 is simultaneously connected to and described is connected to the data output sub-circuit；Described 5th
The grid of field-effect tube M5 is connected to the first enable signal end EN1, source electrode is grounded, drain electrode is connected to the third field-effect tube M3
With the source electrode of the 4th field-effect tube M4.
Preferably, the input sub-circuit further includes first resistor R1 and second resistance R2, and the one of the first resistor R1
End is connected to the drain electrode of the third field-effect tube M3, the other end is connected to the source electrode and described the of the third field-effect tube M3
The drain electrode of five field-effect tube M5；One end of the second resistance R2 is connected to the drain electrode of the 4th field-effect tube M4, the other end
It is connected to the drain electrode of the source electrode and the 5th field-effect tube M5 of the 4th field-effect tube M4.
Preferably, the data output sub-circuit includes the 6th field-effect tube M6, the 7th field-effect tube M7, the 8th field-effect
Pipe M8 and the 9th field-effect tube M9；The source electrode of the 6th field-effect tube M6 is connected to power supply, drain electrode is connected to described first
The drain electrode of effect pipe M1, grid are connected to first enable signal end EN1；The source electrode of the 7th field-effect tube M7 is connected to
The power supply, drain electrode is connected to the drain electrode of the second field-effect tube M2, grid is connected to first enable signal end EN1；
The source electrode of the 8th field-effect tube M8 is connected to the second bias current sources I2 by first node X, grid is distinguished
It is connected to the drain electrode of the first field-effect tube M1 and the 6th field-effect tube M6, drain electrode is connected to the load sub-circuit；It is described
The source electrode of 9th field-effect tube M9 is connected to the second bias current sources I2 by the first node X, grid is connected to institute
State the drain electrode of the second field-effect tube M2 and the 7th field-effect tube M7, drain electrode is connected to the load sub-circuit.
In a particular embodiment, the 6th field-effect tube M6, the 7th field-effect tube M7, the 8th field-effect tube M8 and the 9th effect
Should pipe M9 be PMOS tube.
Preferably, the load sub-circuit includes the first differential signal outputs DP_out, the second differential signal outputs
DM_out, 3rd resistor R3 and the 4th resistance R4；One end of the 3rd resistor R3 is connected to the 9th field-effect tube
The drain electrode of M9 and the second differential signal outputs DM_out, other end ground connection；One end of the 4th resistance R4 connects respectively
It is connected to drain electrode and the first differential signal outputs DP_out, other end ground connection of the 8th field-effect tube M8.
Preferably, the drop-down sub-circuit include the tenth field-effect tube M10 and the 11st field-effect tube M11, the described tenth
The source electrode of field-effect tube M10 and the 11st field-effect tube M11 are connected to the second bias current sources I2, grounded drain；It is described
The grid of tenth field-effect tube M10 is connected to the first enable signal end EN1, the grid connection of the 11st field-effect tube M11
In the second enable signal end EN2.
In a particular embodiment, the tenth field-effect tube M10 and the 11st field-effect tube M11 is PMOS tube.
Preferably, first enable signal end EN1 and second enable signal end EN2 is also connected with delays time to control dress
It sets, the second enable signal delay for exporting second enable signal end EN2 is defeated in first enable signal end EN1
The first enable signal out.
In a particular embodiment, when the field-effect tube in rock circuit is multiple instantly, multiple field-effect tube are separately connected
There is enable signal end, the enable signal of these enable signal ends output is successively delayed, and successively turns off corresponding field-effect tube to reach
Effect.
As shown in Figure 2, Figure 3, Figure 4, the working principle of the utility model are as follows:
Before enabled, the first enable signal and the second enable signal are low potential, input the 5th field-effect tube of sub-circuit
M5 shutdown inputs sub-circuit at this time and does not work；Data export the input of sub-circuit by the 6th field-effect tube M6 and the 7th field-effect
Pipe M7 is pulled upward to power supply, i.e., the 8th field-effect tube M8 at this time and the 9th field-effect tube M9 shutdown are then exported without data, i.e., at this time
First differential signal outputs DP_out and the second differential signal outputs DM_out output is low；Pull down the tenth of sub-circuit
The voltage of first node X, is pulled down to preset operating voltage, the voltage by effect pipe M10 and the 11st field-effect tube M11 conducting
Value can need to be configured according to real work, and the present embodiment sets the operating voltage as 2.07V.Pass through adjustment the tenth appropriate
The size of effect pipe M10 and the 11st field-effect tube M11, or at the tenth field-effect tube M10 and the 11st field-effect tube M11
Face series resistance may make the voltage of first node X at this time to pulled down to preset operating voltage.
After enabled, the first enable signal and the second enable signal are height, and the 5th field-effect tube M5 for inputting sub-circuit is led
Logical, input sub-circuit can work normally；6th field-effect tube M6 and the 7th field-effect tube M7 shutdown, inputs the output of sub-circuit
Data can normally input to data output sub-circuit, as shown in Figure 2；Pull down the tenth field-effect tube M10 and the of sub-circuit
11 field-effect tube M11 shutdown, due to the current potential of first node X will not undergo decline from supply voltage this is relatively long
Process, so former high speed differential datas (especially a data) of output can be normally through overload sub-circuit
The first differential signal outputs DP_out and the second differential signal outputs DM_out output, be not in former output
The phenomenon that data amplitude of oscillation is beyond 400mV as defined in agreement.
And if not pulling down sub-circuit, the current potential of first node X is supply voltage before high-speed driving circuit is enabled.
As shown in figure 3, not pulling down the output signal of the high-speed driving circuit of sub-circuit, solid line is ideal situation, and dotted line is former
The phenomenon that position data are more than 400mV as defined in agreement.
As shown in figure 4, the output signal for the high-speed driving circuit being provided with after drop-down sub-circuit, before enabled
The current potential height of first node X, the output situation of adjustable former data.If first node X current potential is excessively high before enabled,
Former data will be higher；If first node X hypopotenia before enabled, former data will be relatively low.
It should be understood that cannot therefore limit the utility model the above is only the preferred embodiment of the utility model
The scope of the patents, equivalent structure or equivalent flow shift made by using the description of the utility model and the drawings, or it is straight
It connects or is used in other related technical areas indirectly, be also included in the patent protection scope of the utility model.
Claims (9)
1. a kind of universal serial bus high-speed driving circuit, including input sub-circuit, data output sub-circuit and load sub-circuit,
High speed differential data information input to the data is exported sub-circuit by the input sub-circuit, and the data output sub-circuit will
Data information exports high speed differential data through the load sub-circuit；It is characterized in that, the universal serial bus high-speed driving
Circuit further includes drop-down sub-circuit, and the drop-down sub-circuit is connected to the data output sub-circuit and is used to pull down described defeated
Out in sub-circuit the voltage of first node to default operating voltage.
2. universal serial bus high-speed driving circuit according to claim 1, which is characterized in that the drop-down sub-circuit packet
Include at least two field-effect tube parallel with one another.
3. universal serial bus high-speed driving circuit according to claim 2, which is characterized in that the input sub-circuit packet
Include the first field-effect tube, the second field-effect tube, third field-effect tube, the 4th field-effect tube and the 5th field-effect tube, described first
Field-effect tube is connected to the third field-effect tube and is connected to data output sub-circuit simultaneously, and second field-effect tube connects
It is connected to the 4th field-effect tube and is connected to data output sub-circuit simultaneously, the third field-effect tube and the 4th
Effect pipe is connected to the 5th field-effect tube.
4. universal serial bus high-speed driving circuit according to claim 3, which is characterized in that first field-effect tube
The first bias current sources are connected to the source electrode of second field-effect tube, so that first bias current sources are the input
Sub-circuit provides bias current；The grid of first field-effect tube and the third field-effect tube is connected to the first differential signal
Input terminal, second field-effect tube and the 4th field-effect tube are connected to the second differential signal input；
The drain electrode of first field-effect tube and second field-effect tube is connected to the data output sub-circuit；It is described
The drain electrode of third field-effect tube and the 4th field-effect tube is connected to first field-effect tube and second effect
Should pipe drain electrode and be connected to and described be connected to the data output sub-circuit；The grid of 5th field-effect tube connects
It is connected to the first enable signal end, source electrode is grounded, draining is connected to the source of the third field-effect tube and the 4th field-effect tube
Pole.
5. universal serial bus high-speed driving circuit according to claim 4, which is characterized in that the input sub-circuit is also
Including first resistor and second resistance, one end of the first resistor is connected to the drain electrode of the third field-effect tube, the other end
It is connected to the source electrode of the third field-effect tube and the drain electrode of the 5th field-effect tube；One end of the second resistance is connected to
The drain electrode of 4th field-effect tube, the other end be connected to the 4th field-effect tube source electrode and the 5th field-effect tube
Drain electrode.
6. universal serial bus high-speed driving circuit according to claim 5, which is characterized in that the data output son electricity
Road includes the 6th field-effect tube, the 7th field-effect tube, the 8th field-effect tube and the 9th field-effect tube；
The source electrode of 6th field-effect tube is connected to power supply, drain electrode is connected to the drain electrode of first field-effect tube, grid connects
It is connected to first enable signal end；
The source electrode of 7th field-effect tube is connected to the power supply, drain electrode is connected to drain electrode, the grid of second field-effect tube
Pole is connected to first enable signal end；
Described in the source electrode of 8th field-effect tube is connected to the second bias current sources by first node, grid is connected to
Drain electrode, the drain electrode of first field-effect tube and the 6th field-effect tube are connected to the load sub-circuit；
The source electrode of 9th field-effect tube is connected to the second bias current sources by the first node, grid is connected to
Drain electrode, the drain electrode of second field-effect tube and the 7th field-effect tube are connected to the load sub-circuit.
7. universal serial bus high-speed driving circuit according to claim 6, which is characterized in that the load sub-circuit packet
Include the first differential signal outputs, the second differential signal outputs, 3rd resistor and the 4th resistance；One end of the 3rd resistor
It is connected to drain electrode and second differential signal outputs, other end ground connection of the 9th field-effect tube；Described 4th
One end of resistance is connected to drain electrode and first differential signal outputs, another termination of the 8th field-effect tube
Ground.
8. universal serial bus high-speed driving circuit according to claim 2, which is characterized in that the drop-down sub-circuit packet
The tenth field-effect tube and the 11st field-effect tube are included, the tenth field-effect tube is connected with the source electrode of the 11st field-effect tube
In the second bias current sources, grounded drain；The grid of tenth field-effect tube is connected to the first enable signal end, and the described tenth
The grid of one field-effect tube is connected to the second enable signal end.
9. universal serial bus high-speed driving circuit according to claim 8, which is characterized in that first enable signal
End and second enable signal end are also connected with overrun control, enabled for exporting second enable signal end
The enable signal that signal delay is exported in first enable signal end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920539995.7U CN209562534U (en) | 2019-04-19 | 2019-04-19 | A kind of universal serial bus high-speed driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920539995.7U CN209562534U (en) | 2019-04-19 | 2019-04-19 | A kind of universal serial bus high-speed driving circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209562534U true CN209562534U (en) | 2019-10-29 |
Family
ID=68313134
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920539995.7U Active CN209562534U (en) | 2019-04-19 | 2019-04-19 | A kind of universal serial bus high-speed driving circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209562534U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109962705A (en) * | 2019-04-19 | 2019-07-02 | 成都锐成芯微科技股份有限公司 | A kind of universal serial bus high-speed driving circuit |
-
2019
- 2019-04-19 CN CN201920539995.7U patent/CN209562534U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109962705A (en) * | 2019-04-19 | 2019-07-02 | 成都锐成芯微科技股份有限公司 | A kind of universal serial bus high-speed driving circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101465644B (en) | Output driver circuit | |
| CN107181482A (en) | input and output receiving circuit | |
| CN103326315B (en) | A kind of under-voltage protecting circuit and high voltage integrated circuit | |
| CN103066988A (en) | Interface circuit and achievement method for limiting output port voltage slew rate | |
| CN209562534U (en) | A kind of universal serial bus high-speed driving circuit | |
| US11588517B2 (en) | Signal correction for serial interfaces | |
| CN102510207B (en) | Short-circuit protection method for buffer output of DC/DC (Direct-Current/Direct-Current) power supply converter and buffer output circuit | |
| CN102254065A (en) | Method for extracting parameters of bipolar transistor and equivalent circuit of bipolar transistor | |
| CN206498388U (en) | Level shifting circuit | |
| CN103746681B (en) | A kind of upper and lower electricity output tri-state control circuit of cmos device power supply | |
| CN109962705A (en) | A kind of universal serial bus high-speed driving circuit | |
| CN109687863B (en) | Drive circuit of RS485 chip | |
| CN103051325A (en) | Pull-up resistance circuit for preventing reverse current filling | |
| CN106452424B (en) | A differential driver with pre-emphasis | |
| CN107562671A (en) | Communication bus power supply circuit | |
| CN203554401U (en) | Reset circuit with high responding speed and low temperature coefficients | |
| CN101399077A (en) | High-speed, low-power input buffer for integrated circuit devices | |
| CN202133922U (en) | Reference voltage circuit | |
| CN209543335U (en) | A kind of circuit of the address HRP-configured slave device I2C | |
| CN208956011U (en) | A kind of chip output interface circuit reducing power domain switching noise | |
| CN103607337B (en) | Bus signal receiver | |
| CN103226538A (en) | Impedance matching circuit based on high-speed serial communication bus actuator | |
| CN107181481A (en) | input and output receiving circuit | |
| CN203086437U (en) | Level switching circuit | |
| CN203563050U (en) | Metal fuse latch structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |