CN103248352A - Low voltage differential signal driving circuit and digital signal transmitter - Google Patents
Low voltage differential signal driving circuit and digital signal transmitter Download PDFInfo
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Abstract
A low voltage differential signal (LVDS) driving circuit and a digital signal transmitter with the LVDS driving circuit. The LVDS driving circuit includes a positive differential output terminal and a negative differential output terminal and a transition accelerator. A differential output signal is provided by the positive and negative differential output terminals. When the differential output signal transits from low to high, the transition accelerator connects the positive differential output terminal to a high voltage source VDD and connects the negative output terminal to a low voltage source VSS. When the differential output signal transits from high to low, the transition accelerator connects the positive differential output terminal to the low voltage source VSS and connects the positive output terminal to the high voltage source VDD.
Description
Technical field
(low voltage differential signal, LVDS) drive circuit and application have the electronic installation of this circuit to the present invention relates to a kind of Low Voltage Differential Signal.
Background technology
Low operating voltage is common power saving design.
Yet, about the high-speed transfer interface, for example, HDMI (High Definition Multimedia Interface) (high-definition multimedia interface, HDMI), advanced supplementary technology (the serial advanced technology attachment of string type, SATA) interface, connect acceleration (peripheral component interconnect express in the ancillary equipment, PCIE) interface, USB (universal serial bus, USB) interface ... Deng, applied Low Voltage Differential Signal drive circuit is subject to low operating voltage, its signal transition speed (slew rate) is tied down, and influences efficiency of transmission.
Summary of the invention
A kind of electronic installation that the present invention discloses a kind of Low Voltage Differential Signal (LVDS) drive circuit and is compatible to wire transmission.
The Low Voltage Differential Signal drive circuit of realizing according to one embodiment of the present invention comprises a positive differential output end, the moving output of a minus tolerance, an automatic electric-level selector, an output level detector and a transition accelerator.Described just, couple a coffret with the moving output of minus tolerance, provide this coffret one differential output signal according to a data-signal.This automatic electric-level selector is exported a reference voltage according to this coffret.Based on the VTXP signal on this data-signal, this reference voltage and this positive differential output end, this output level detector produces a low paramount transition acceleration control signal.According to this low paramount transition acceleration control signal, this transition accelerator couples this positive differential output end to a high voltage source and couples moving output to a low-voltage source of this minus tolerance.Can effectively accelerate the low paramount transition of this differential output signal thus.
A Low Voltage Differential Signal drive circuit of realizing according to one embodiment of the present invention comprises: a positive differential output end, the moving output of a minus tolerance, an automatic electric-level selector, an output level detector and a transition accelerator.Above-mentioned just, couple a coffret with the moving output of minus tolerance, supply this coffret one differential output signal according to a data-signal.To should coffret, this automatic electric-level selector be exported a reference voltage.Based on the VTXN signal on the moving output of an inversion signal, this reference voltage and this minus tolerance of this data-signal, this output level detector produces a high extremely low transition acceleration control signal.To low transition acceleration control signal, this transition accelerator couples this positive differential output end to a low-voltage source according to this height, and couples moving output to a high voltage source of this minus tolerance.Can effectively accelerate the height of this differential output signal thus to low transition.
The opener electronic installation that is compatible to wire transmission of another execution mode of the present invention.This electronic installation comprises aforementioned a kind of Low Voltage Differential Signal drive circuit and a microprocessor.This microprocessor is used for the coffret that identification couples this Low Voltage Differential Signal drive circuit.According to identification result, this microprocessor is controlled this automatic electric-level selector to producing above-mentioned reference voltage by coffret.
The present invention has a kind of execution mode to disclose a Low Voltage Differential Signal drive circuit at a coffret to comprise in addition: a transtation mission circuit, a transition accelerator and an output level detector.This transtation mission circuit produces current potential respectively in a positive differential output end and the moving output of a minus tolerance, to supply a differential output signal.When this differential output signal by the low level transition during to high level, this transition accelerator links this positive differential output end to a high voltage source and links this minus tolerance and moves output to a low-voltage source.When this differential output signal by the high level transition during to low level, this transition accelerator links this positive differential output end to this low-voltage source and links this minus tolerance and moves output to this high voltage source.This output level detector is with reference to the current potential that a reference voltage that should coffret and this positive differential output end or this minus tolerance is moved on the output to the control of this transition accelerator.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, embodiment cited below particularly, and cooperate appended diagram, be described in detail as follows.
Description of drawings
A kind of execution mode of Fig. 1 diagram one signal transmitting and receiving structure;
Fig. 2 is according to one embodiment of the present invention diagram one Low Voltage Differential Signal drive circuit 200;
Fig. 3 diagram first to fourth control signal CS1 ... the waveform of CS4 and differential output signal Vo (being TXP-TXN);
Fig. 4 is calcspar, according to one embodiment of the present invention diagram one automatic electric-level selector 402 and an output level detector 404;
Fig. 5 is according to one embodiment of the present invention diagram one automatic electric-level selector 500;
Fig. 6 is according to one embodiment of the present invention diagram one output level detector 600;
Fig. 7 is according to one embodiment of the present invention diagram control signal CS1 ... the waveform of CS4, VTXP and VTXN signal and differential output signal Vo, wherein, the coffret that the action time that transition is accelerated, interval adaptation was adopted at present; And
Fig. 8 is according to one embodiment of the present invention diagram one electronic installation.
[symbol description]
100 ~ signal receiving and transmitting system;
102 ~ transmitting terminal; 104 ~ receiving terminal;
106 ~ digital signal transmitter; 108 ~ digit signal receiver;
200 ~ Low Voltage Differential Signal drive circuit;
202 ~ transition accelerator; 204 ~ transtation mission circuit;
402 ~ automatic electric-level selector; 404 ~ output level detector;
500 ~ automatic electric-level selector;
600 ~ output level detector;
The decapacitation that 702 ~ arrow indicates CS3 triggers;
The decapacitation that 704 ~ arrow indicates CS4 triggers;
800 ~ electronic installation; 802 ~ receiving terminal;
804 ~ low differential signal drive circuit; 806 ~ microprocessor;
AND1, AND2 ~ with the door;
CS1, CS2 ~ first, second control (or data) signal;
The inversion signal of ~ CS1, CS2;
CS3, CS4 ~ 3rd, the 4th control signal (claiming low paramount transition acceleration control signal, high to low transition acceleration control signal again);
The activation pin of DT ~ comparator;
I1 ... I6, Itotal ~ electric current;
I_path1, I_path2 ~ first, second current path;
Is ~ current source;
ISP ~ current controling signal; ISP＜0:5〉~ a plurality of bits of ISP;
N1 ... N4 ~ N lane device;
P1 ... P4 ~ P lane device;
R, R1 and R2 ~ resistance;
The connected node that SP, SN ~ different current source Is provide;
Sync_COMP1 and Sync_COMP2 ~ comparator;
SW1 ... SW6 ~ current-controlled switch;
TI1, TI2, three kinds of different coffrets of TI3;
TXP, TXN ~ positive and negative differential output (end);
Vbias ~ bias voltage;
VDD, VSS ~ high and low voltage source;
The input of VIN and VIP, VON and VOP～comparator, output pin;
Vlevel ~ reference voltage;
Vo ~ differential output signal (being TXP-TXN);
Signal on VTXP, VTXN ~ positive and negative differential output end.
Embodiment
Following discloses numerous embodiments of the present invention, purpose is not intended to limit invention scope for explanation basic principle of the present invention.Scope of the present invention should define with claims.
Fig. 1 diagram one signal transmitting and receiving structure.One signal receiving and transmitting system 100 comprises a transmitting terminal 102 and a receiving terminal 104.Transmitting terminal 102 comprises a digital signal transmitter 106.Receiving terminal 104 comprises a digit signal receiver 108.Digital signal transmitter 106 provides a differential output signal Vo to make digital data transmission with a just differential output TXP and the moving output of minus tolerance TXN.Digit signal receiver 108 receives this just differential output TXP and the moving output of this minus tolerance TXN from this digital data transmission device 106, and the signal that adopts a comparator comparison to receive, and this differential output signal Vo of conversion is a figure pattern according to this.
Signal transmitting and receiving structure 100 can be various the digital data transmission interface realize, for example, HDMI interface, SATA interface, USB interface, PCIE interface ... Deng.
Low Voltage Differential Signal (LVDS) drive circuit namely is used for producing and drives described just moving with minus tolerance and exports TXP and TXN.
Fig. 2 diagram is according to the disclosed LVDS drive circuit 200 of one embodiment of the present invention.LVDS drive circuit 200 comprises a positive differential output end (same label is TXP) and the moving output of a minus tolerance (same label is TXN), to supply a differential output signal Vo.LVDS drive circuit 200 also comprises a transition accelerator 202, based on the transition action of this differential output signal Vo, accelerates as the transition of this differential output signal Vo.The operation of transition accelerator 202 is discussed below.When differential output signal Vo is high level by the low level transition, transition accelerator 202 couples this positive differential output end TXP to high voltage source VDD and couples moving output TXN to the low-voltage source VSS of this minus tolerance.When this differential output signal Vo is low level by the high level transition, transition accelerator 202 couples this positive differential output end TXP to this low-voltage source VSS and couples the moving output TXN of this minus tolerance to this high voltage source VDD.Thus, differential output signal Vo is adopted suitable speed and is carried out transition, not tied down by low operating voltage.
Following paragraph is discussed in detail this LVDS drive circuit 200.
In illustrated embodiment, circuit 200 also comprises a transtation mission circuit 204, produces circuit (being specified in subsequent paragraph) comprising an impedance unit (realizing with resistance R 1 and R2 among this embodiment) and two current paths.Impedance unit (being made up of R1 and R2) is coupled between positive differential output end TXP and the moving output TXN of minus tolerance.Described two current paths produce circuit and take turns activation, in order to form one first current path I_path1 and one second current path I_path2 respectively, allow electric current to adopt different directions this impedance unit (R1 and R2) of flowing through-thus, can control the differential output signal Vo that above-mentioned positive and negative differential output end TXP and TXN supply.Flow through the electric current of the above-mentioned first current path I_path1 or the second current path I_path2 by one first current source that couples this high voltage source VDD and the one second current source supply that couples this low-voltage source VSS.As shown in Figure 2, first and second current source all indicates with Is.By first or second current path I_path1 or the I_path2, first and second current source is coupled to each other.As shown in Figure 2, this first current source Is that couples this high voltage source VDD is supplied with a point of contact SP, and this second current source Is that couples this low-voltage source VSS is supplied with a point of contact SN.Point of contact SP and SN are coupled to each other via this first current path I_path1 or this second current path I_path2.
This first current path that this paragraph discussion forms this first current path I_path1 produces circuit.First current path produces circuit and comprises one first current path control switch and one second current path control switch.In execution mode shown in Figure 2, first current path control switch system is realized by a P lane device P1, and second current path control switch system is realized by a N lane device N1.The first current path control switch P1 is coupled between this point of contact SP and this positive differential output end TXP, by anti-phase first control signal
(being the inversion signal of the first control signal CS1) control.The second current path control switch N1 is coupled between the moving output TXN of this minus tolerance and this point of contact SN, is controlled by this first control signal CS1.First and the second current path control switch P1 and N1 be by the high level state conducting of this first control signal CS1, setting up the described first current path I_path1, and guide current this impedance unit (R1 and R2) of flowing through.Thus, just and between the moving output TXP of minus tolerance and the TXN form the positive electricity potential difference, differential output signal Vo is high level.
This second current path that this paragraph discussion forms this second current path I_path2 produces circuit.Second current path produces circuit and comprises one the 3rd current path control switch and one the 4th current path control switch.Execution mode as shown in Figure 2, the 3rd current path control switch system is realized by a P lane device P2, and the 4th current path control switch system is realized by a N lane device N2.The 3rd current path control switch P2 is coupled between point of contact SP and the moving output TXN of this minus tolerance, by anti-phase second control signal
(being the inversion signal of the second control signal CS2) control.The 4th current path control switch N2 is coupled between positive differential output end TXP and the point of contact SN, is controlled by the second control signal CS2.The phase place of the second control signal CS2 can be the anti-phase of (not limiting) first control signal CS1.The the 3rd and the 4th current path control switch P2 and N2 can be by the high level state conductings of this second control signal CS2, make electric current this impedance unit (R1 and R2) of flowing through to form the described second current path I_path2.Thus, just and between the moving output TXP of minus tolerance and the TXN have a negative electricity potential difference, differential output signal Vo is low level.
About execution mode shown in Figure 2, when the first control signal CS1 switched to enabled status (high level) and the second control signal CS2 and switches to decapacitation state (low level), differential output signal Vo was high level by the low level transition.When the first control signal CS1 switched to decapacitation state and the second control signal CS2 and switches to enabled status, differential output signal Vo was low level by the high level transition.
This paragraph is discussed the structure of transition accelerator 202, comprising four transition acceleration switches.In one embodiment, first transition acceleration switch system is realized by a P lane device P3, second transition acceleration switch system is realized that by a N lane device N3 the 3rd transition acceleration switch system is realized by a P lane device P4, and the 4th transition acceleration switch system is realized by a N lane device N4.As shown in the figure, the first transition acceleration switch P3 is used for coupling the paramount voltage source V DD of this positive differential output end TXP, and the second transition acceleration switch N3 is used for coupling the moving output TXN of this minus tolerance to this low-voltage source VSS.First and the second transition acceleration switch P3 and N3 are respectively by anti-phase the 3rd control signal
And one the 3rd control signal CS3 control,
Can be the inversion signal of CS3, and CS3 can be described as low paramount transition acceleration control signal again.First and the second transition acceleration switch P3 and N3 can be in this differential output signal Vo conductings when the low level transition is high level.Along with the first control signal CS1 switches to enabled status (that is, differential output signal Vo is high level by the low level transition), the changeable one-tenth enabled status of the 3rd control signal CS3.The 3rd transition acceleration switch P4 is used for coupling the moving paramount voltage source V DD of output TXN of this minus tolerance, and the 4th transition acceleration switch N4 is used for coupling this positive differential output end TXP to this low-voltage source VSS.The the 3rd and the 4th transition acceleration switch P4 and N4 are respectively by anti-phase the 4th control signal
And one the 4th control signal CS4 control.
Can be the inversion signal of CS4, and CS4 called after is high to low transition acceleration control signal again.The the 3rd and the 4th transition acceleration switch P4 and N4 can conductings when this differential output signal Vo is low level by the high level transition.Along with the second control signal CS2 switches to enabled status (that is, differential output signal Vo is low level by the high level transition), the 4th control signal CS4 is changeable to be enabled status.
Specifically, execution mode shown in Figure 2 is in order to reduce between idle operating space, top (head room reduction), be that the first and the 3rd transition acceleration switch P3 and P4 are directly linked high voltage source VDD, and the second and the 4th transition acceleration switch N3 and N4 are directly linked low-voltage source VSS.P lane device P3 directly links high voltage source VDD with its source electrode, and drain electrode directly links positive differential output end TXP, and more receives signal with grid
(inversion signal of low paramount transition acceleration control signal CS3).In addition, N lane device N3 directly links low-voltage source VSS with its source electrode, and directly links the moving output TXN of minus tolerance to drain, and more should low paramount transition acceleration control signal CS3 with the grid reception.P lane device P4 directly links high voltage source VDD with its source electrode, and directly links the moving output TXN of minus tolerance to drain, and more receives signal with grid
(high inversion signal to low transition acceleration control signal CS4).N lane device N4 directly links low-voltage source VSS with its source electrode, and directly links positive differential output end TXP to drain, and more receives this height to low transition acceleration control signal CS4 with grid.
The waveform of Fig. 3 diagram first to fourth control signal CS1 to CS4 and differential output signal Vo (being TXP-TXN).As shown in the figure, transition accelerator 202 (controlled by the 3rd and the 4th control signal CS3 and CS4, CS3 and CS4 are called low paramount transition acceleration control signal and high to low transition acceleration control signal again) will speed up the transition of this differential output signal Vo.Special declaration, in some embodiments, the activation meeting of the 3rd and the 4th control signal CS3 and CS4 is limited to a Preset Time interval.This Preset Time interval is adjusted based on employed coffret.Its output signal of different coffrets may have different current potential demands.The interval therefore restriction to some extent of the conducting of first to fourth transition acceleration switch P3, N3, P4 and N4 will be avoided excessive signal for faster transition, to meet the specification of applied coffret.
Design is accelerated in the disclosed transition of the application good especially effect in the low operating voltage environment.For example, with reference to figure 2, transition accelerator 202 acts directly on the impedance unit two-end-point of (being made up of R1 and R2).Therefore, resistance-capacitance charge constant (RC charging time constant) reduces considerablely, and the transition speed of differential output signal Vo is promoted efficiently.Based on above at least reason, the low operating voltage environment is not remarkable to the influence of signal transition speed.
In another execution mode, a Low Voltage Differential Signal drives can also comprise an automatic electric-level selector and an output level detector, in order to produce described low paramount transition acceleration control signal CS3 or/and high extremely low transition acceleration control signal CS4.Fig. 4 with block diagram illustration according to an automatic electric-level selector 402 and an output level detector 404 that one embodiment of the present invention was realized.Current controling signal ISP control has a plurality of current sources, and is relevant to the coffret that this LVDS drive circuit drives.Automatic electric-level selector 402 is exported a reference voltage Vlevel according to current controling signal ISP.VTXN signal on VTXP signal on reference voltage Vlevel and control signal CS1 and CS2 (being called first and second data-signal again), the positive differential output end TXP and the moving output TXN of minus tolerance is imported this output level detector 404 in the lump.According to signal CS1, CS2, VTXP, VTXN and Vlevel, output level detector 404 produce described low paramount transition acceleration control signal CS3 and high to low transition acceleration control signal CS4, with both inversion signal
And
The automatic electric-level selector 500 that Fig. 5 diagram realizes according to one embodiment of the present invention.This automatic electric-level selector 500 comprises a resistive element R, a plurality of current source (as shown in the figure, namely these transistors of Vbias bias voltage produce electric current I 1 respectively to I6) and a plurality of current-controlled switch SW1 to SW6.These current-controlled switches SW1 to SW6 connects with these current sources respectively, and according to signal ISP＜0:5〉in corresponding bit conducting or disconnection, with the flow through electric current I total of this resistive element R of control.Produce electric current I 1 ... the transistorized passage breadth length ratio of these of I6 (aspect ratio is W/L) through particular design, with according to ISP＜0:5〉different combinations of values produce corresponding Itotal.In one embodiment, first in the transtation mission circuit and the second current source Is control with the same manner mat signal ISP.Signal ISP＜0:5〉be to set according to the voltage specification of the output signal of coffret.Therefore, electric current I total value is adjusted along with the different demands of different transmission interfaces.The required reference voltage Vlevel of the operating condition of different transmission interfaces adjusts by the electric current I total that controls this current controling signal ISP and set this impedance component R that flows through.
The output level detector 600 that Fig. 6 diagram realizes according to one embodiment of the present invention.Output level detector 600 comprises two comparator Sync_COMP1 and Sync_COMP2 and two and door AND1 and AND2.
Receive an inverting power supplies shutdown signal with door AND1
And control signal CS1, and has the activation pin DT that an output couples this comparator Sync_COMP1.Receive this inverting power supplies shutdown signal with door AND2
And control signal CS2, and has the activation pin DT that an output couples this comparator Sync_COMP2.Power-off signal PD is low-level logic under normal operation.Therefore, the activation pin DT of comparator Sync_COMP1 and Sync_COMP2 is respectively with control signal CS1, CS2 transition.When power-off signal PD starts (high level logic), comparator Sync_COMP1 and Sync_COMP2 decapacitation.Activation when power-off signal PD is a power down state in this Low Voltage Differential Signal drive circuit, with the above-mentioned comparator Sync_COMP1 of decapacitation and Sync_COMP2, purpose is for saving electric power or closing the electronic installation of adopting this coffret.
Under operating with the output signal of door AND1, comparator Sync_COMP1 makes comparisons VTXP signal and reference voltage Vlevel according to the CS1 activation.Comparator Sync_COMP1 under the high level of CS1 drives during activation, if the VTXP signal is lower than this reference voltage Vlevel, comparator Sync_COMP1 keep this low paramount transition acceleration control signal CS3 enabled status (CS3 be high level and
Be low level); Otherwise, this low paramount transition acceleration control signal CS3 decapacitation.According to above design, if the VTXP signal reaches reference voltage Vlevel, the low paramount transition that the first and second transition acceleration switch P3 of Fig. 2 transition accelerator 202 and N3 provide is accelerated operation and is ended.Because the size of reference voltage Vlevel is relevant with coffret, interval operate time that this low paramount transition is accelerated is along with employed coffret is suitably regulated.
Under operating with the output signal of door AND2, comparator Sync_COMP2 makes comparisons VTXN signal and reference voltage Vlevel according to the CS2 activation.Comparator Sync_COMP2 under the high level of CS2 drives during activation, if the VTXN signal is lower than this reference voltage Vlevel, comparator Sync_COMP2 keep this height to the enabled status of low transition acceleration control signal CS4 (CS4 be high level and
Be low level); Otherwise this height is to low transition acceleration control signal CS4 decapacitation.According to above design, if the VTXN signal reaches reference voltage Vlevel, the 3rd and the 4th transition acceleration switch P4 of Fig. 2 transition accelerator 202 and the height that N4 provides accelerate operation to low transition and end.Because the size of reference voltage Vlevel is relevant with coffret, interval operate time that this height accelerates to low transition is along with employed coffret is suitably regulated.
More than with door AND1 and AND2 be inessential element.In other embodiments, control signal CS1 and CS2 can distinguish the activation pin DT that directly links comparator Sync_COMP1 and Sync_COMP2.
According to a kind of execution mode, the waveform of the above-mentioned control signal of Fig. 7 diagram CS1 to CS4, above-mentioned VTXP and VTXN signal and this Vo (being TXP-TXN) signal is wherein introduced the transition acceleration time interval of adjusting along with coffret.Control signal CS1 and CS2 are just producing between differential output end TXP and TXN/negative difference, to transmit differential output signal Vo.According to control signal CS1 and CS2, the signal generation transition of end points TXP and TXN and signal CS3 and CS4 form thereupon.Such as arrow 702 sign, according to the low paramount transition of CS1 and control signal CS3 decapacitation when the VTXP signal reaches reference voltage Vlevel of activation.The decapacitation of control signal CS3 then can cause the low paramount transition of (TXP-TXN) to accelerate to stop the operational requirements of the coffret that is adopted to meet thereupon.In addition, reference arrow 704 is according to the low paramount transition of CS2 and control signal CS4 decapacitation when the VTXN signal arrives this reference voltage Vlevel of activation.The decapacitation of control signal CS4 then can cause height to the low transition of (TXP-TXN) to accelerate to stop the operational requirements of the coffret that is adopted to meet thereupon.In one embodiment, described control signal CS1 and CS2 are complementary operation (namely anti-phase each other).In another execution mode, control signal CS1 and CS2 are not defined as complementary operation.
Interval control of the operating time that transition is accelerated can only be applied to low paramount transition and accelerate, and perhaps, can only be applied to height to low transition and accelerate.In one embodiment, output level detects can be according to CS1, VTXP signal and reference voltage Vlevel work, and need not detect the VTXN signal-for example, adopt element AND1 and Sync_COMP1 that Fig. 6 first half is arranged, the element AND2 and the Sync_COMP2 that but do not have Fig. 6 Lower Half; Thus, only hang down the operating time interval of paramount transition acceleration along with the coffret adjustment.In another execution mode, output level detects can be according to CS2, VTXN signal and reference voltage Vlevel work, and need not detect the VTXP signal-for example, employing has element AND2 and the Sync_COMP2 of Fig. 6 Lower Half, does not but have element AND1 and the Sync_COMP1 of Fig. 6 first half; Thus, only high operating time interval of accelerating to low transition along with the coffret adjustment.
The electronic installation 800 that Fig. 8 diagram realizes according to one embodiment of the present invention.Electronic installation 800 compatible with multiple coffret (as shown in the figure, coffret TI1, TI2 and TI3 compatible) different with three kinds.Be to select to set up wire transmission between electronic installation 800 and the receiving terminal 802 with coffret TI2 among the figure.Electronic installation 800 can comprise above disclosed Low Voltage Differential Signal drive circuit 804 and a microprocessor 806.Low Voltage Differential Signal drive circuit 804 just couple this coffret TI2 with the moving output TXP of minus tolerance and TXN.If sensing the interface of selection is coffret TI2, microprocessor 806 can be to setting a corresponding signal ISP (being the control signal ISP of Fig. 4 automatic electric-level selector 402) by coffret TI2.Thus, (TXP-TXN) transition of signal is accelerated the operating time interval and can be adjusted into this coffret of adaptation TI2.
In another execution mode, the electronic installation with above disclosed Low Voltage Differential Signal drive circuit only is compatible to single coffret.At this moment, can be stored in the buffer by manufacturer ISP setting signal that should single coffret.
Put it in order, the application's disclosure comprises a transition accelerator, is used for the transition of the Low Voltage Differential Signal of acceleration one coffret.Described transition accelerator directly links differential output end to voltage source.Therefore, the resistance-capacitance charge constant is subjected to remarkable inhibition, and the transition speed of differential output signal effectively promotes.Signal transition speed thereby be not subject to the low operating voltage environment.The control of transition accelerator can effectively be avoided overshoot (overshoot) situation of signal transition based on a reference voltage of corresponding coffret and the magnitude of voltage on the differential output end.
Though the present invention with preferred embodiment openly as above; so it is not in order to limit the present invention; those skilled in the art without departing from the spirit and scope of the present invention, when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the appended claims confining spectrum.
Claims (25)
1. Low Voltage Differential Signal drive circuit comprises:
One positive differential output end and a minus tolerance are moved output, couple a coffret, to provide this coffret one differential output signal according to one first data-signal and one second data-signal;
One automatic electric-level selector is exported a reference voltage according to this coffret;
One output level detector produces a low paramount transition acceleration control signal based on the VTXP signal on this first data-signal, this reference voltage and this positive differential output end; And
One transition accelerator couples this positive differential output end to a high voltage source and couples this low differential output end to a low-voltage source according to this low paramount transition acceleration control signal.
2. Low Voltage Differential Signal drive circuit as claimed in claim 1, wherein this output level detector comprises:
One first comparator, along with this first data-signal activation, with relatively this VTXP signal and this reference voltage, wherein, when this first comparator is lower than this reference voltage along with the high level state activation of this first data-signal and this VTXP signal, this first comparator continues activation should hang down paramount transition acceleration control signal, otherwise this first comparator decapacitation should low paramount transition acceleration control signal.
3. Low Voltage Differential Signal drive circuit as claimed in claim 2, wherein:
This first comparator is also based on a power-off signal decapacitation.
4. Low Voltage Differential Signal drive circuit as claimed in claim 1, wherein:
This output level detector device also produces a high extremely low transition acceleration control signal based on the VTXN signal on the moving output of this second data-signal, this reference voltage and this minus tolerance; And
This transition accelerator also couples this positive differential output end to this low-voltage source and couples the moving output of this minus tolerance to this high voltage source according to this height to low transition acceleration control signal.
5. Low Voltage Differential Signal drive circuit as claimed in claim 4, wherein this output level detector also comprises:
One second comparator, according to this second data-signal activation, with relatively this VTXN signal and this reference voltage, wherein, when this second comparator is lower than this reference voltage with a high level state activation of this second data-signal and this VTXN signal, this second comparator is kept activation should extremely hang down the transition acceleration control signal by height, otherwise this second comparator decapacitation should the extremely low transition acceleration control signal of height.
6. Low Voltage Differential Signal drive circuit as claimed in claim 5, wherein:
This second comparator is also based on a power-off signal decapacitation.
7. Low Voltage Differential Signal drive circuit as claimed in claim 1, wherein this automatic electric-level Chooser comprises:
One resistive element; And
A plurality of current sources and a plurality of current-controlled switch, wherein above-mentioned a plurality of current-controlled switch is to connect with above-mentioned a plurality of current sources respectively,
Wherein:
Described current source is supplied electric current to this resistive element according to the state of corresponding current-controlled switch, and the generation of above-mentioned reference voltage is the current value based on this resistive element and this resistive element of flowing through; And
Described current-controlled switch is according to this coffret conducting or cuts out.
8. Low Voltage Differential Signal drive circuit as claimed in claim 4, wherein this transition accelerator comprises:
One first transition acceleration switch, conducting when this low paramount transition acceleration control signal activation is to couple this positive differential output end to this high voltage source;
One second transition acceleration switch, conducting when this low paramount transition acceleration control signal activation is to couple the moving output of this minus tolerance to this low pressure source;
One the 3rd transition acceleration switch, conducting when this height extremely hangs down the activation of transition acceleration control signal is to couple the moving output of this minus tolerance to this high voltage source; And
One the 4th transition acceleration switch, conducting when this height extremely hangs down the activation of transition acceleration control signal is to couple this positive differential output end to this low-voltage source.
9. electronic installation that is compatible to wire transmission comprises:
Low Voltage Differential Signal drive circuit as claimed in claim 4; And
One microprocessor detects and couples above-mentioned this coffret that just moves output with minus tolerance, produces this reference voltage so that testing result to be provided to this automatic electric-level selector.
10. Low Voltage Differential Signal drive circuit at the coffret design, and comprises:
One transtation mission circuit produces the current potential on the positive differential output end and produces a minus tolerance and move current potential on the output, to supply a differential output signal;
One transition accelerator, when this differential output signal is done to hang down paramount transition, link this positive differential output end to a high voltage source and link moving output to a low-voltage source of this minus tolerance, and when this differential output signal work height extremely hangs down transition, link this positive differential output end to this low-voltage source and link the moving output of this minus tolerance to this high voltage source; And
One output level detector is according to a reference voltage that should coffret and this transition accelerator of control of Electric potentials on the above-mentioned plus or minus differential output end.
11. Low Voltage Differential Signal drive circuit as claimed in claim 10, wherein this output level detector comprises:
One first comparator is used to this differential output signal and makes under the situation that current potential on low paramount transition and this positive differential output end is lower than this reference voltage this positive differential output end of control and link this high voltage source and control this minus tolerance and move output and link this low-voltage source.
12. Low Voltage Differential Signal drive circuit as claimed in claim 11, wherein this first comparator is also based on a power-off signal decapacitation.
13. Low Voltage Differential Signal drive circuit as claimed in claim 10, wherein this output level detector comprises:
One second comparator is used to this differential output signal and does to control when high current potential to low transition and the moving output of this minus tolerance is lower than this reference voltage that the moving output of this minus tolerance links this high voltage source and this positive differential output end of control links this negative voltage source.
14. Low Voltage Differential Signal drive circuit as claimed in claim 13, wherein this second comparator is also based on a power-off signal decapacitation.
15. Low Voltage Differential Signal drive circuit as claimed in claim 10 also comprises:
One automatic electric-level selector produces this reference voltage according to a current controling signal.
16. Low Voltage Differential Signal drive circuit as claimed in claim 15, wherein this automatic electric-level selector comprises:
One resistive element;
A plurality of current sources; And
A plurality of current-controlled switches,
Wherein, described current source provides electric current to this resistive element according to the state of described current-controlled switch,
Wherein, the conduction status of described current-controlled switch is based on this current controling signal,
Wherein, this reference voltage produces based on this resistive element and this current controling signal.
17. Low Voltage Differential Signal drive circuit as claimed in claim 15, wherein this transtation mission circuit comprises a current source that produces electric current based on this current controling signal.
18. Low Voltage Differential Signal drive circuit as claimed in claim 10, wherein this transition accelerator comprises:
One first transition acceleration switch, conducting when this differential output signal is done to hang down paramount transition is to link this positive differential output end to this high voltage source; And
One second transition acceleration switch, conducting when this differential output signal is done to hang down paramount transition is moved out of end to this low-voltage source to link this minus tolerance.
19. Low Voltage Differential Signal drive circuit as claimed in claim 18, wherein the turn-on condition of this first transition acceleration switch and this second transition acceleration switch comprises that also the current potential of this positive differential output end is lower than this reference voltage.
20. Low Voltage Differential Signal drive circuit as claimed in claim 10, wherein this transition accelerator comprises:
One the 3rd transition acceleration switch, conducting when this differential output signal work height extremely hangs down transition is to link the moving output of this minus tolerance to this high voltage source; And
One the 4th transition acceleration switch, conducting when this differential output signal work height extremely hangs down transition is to link this positive differential output end to this low-voltage source.
21. Low Voltage Differential Signal drive circuit as claimed in claim 20, wherein the turn-on condition of the 3rd transition acceleration switch and the 4th transition acceleration switch comprises that also the current potential of the moving output of this minus tolerance is lower than this reference voltage.
22. Low Voltage Differential Signal drive circuit as claimed in claim 10, wherein this transtation mission circuit comprises:
One first current path control switch is coupled between one first current source and this positive differential output end, and this first current source couples this high voltage source; And
One second current path control switch is coupled between the moving output of one second current source and this minus tolerance, and this second current source couples this low-voltage source.
23. Low Voltage Differential Signal drive circuit as claimed in claim 22, wherein this first current source and this second current source produce electric current according to a current controling signal, and this reference voltage produces based on this current controling signal.
24. Low Voltage Differential Signal drive circuit as claimed in claim 10, wherein this transtation mission circuit comprises:
One the 3rd current path control switch is coupled between the moving output of one first current source and this minus tolerance, and this first current source couples this high voltage source; And
One the 4th current path control switch is coupled between one second current source and this positive differential output end, and this second current source couples this low-voltage source.
25. low voltage differential output signal driver circuit as claimed in claim 24, wherein this first current source and this second current source produce electric current according to a current controling signal, and this reference voltage produces based on this current controling signal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/685,131 US8952725B2 (en) | 2011-02-24 | 2012-11-26 | Low voltage differential signal driving circuit and electronic device compatible with wired transmission |
| US13/685,131 | 2012-11-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103248352A true CN103248352A (en) | 2013-08-14 |
| CN103248352B CN103248352B (en) | 2015-11-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310054816.8A Active CN103248352B (en) | 2012-11-26 | 2013-02-20 | Low Voltage Differential Signal drive circuit and be compatible to the electronic installation of wire transmission |
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| Country | Link |
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| CN (1) | CN103248352B (en) |
| TW (1) | TWI511454B (en) |
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Also Published As
| Publication number | Publication date |
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| TWI511454B (en) | 2015-12-01 |
| CN103248352B (en) | 2015-11-18 |
| TW201421905A (en) | 2014-06-01 |
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