CN103700649A - Photoetching mark applying epitaxial technology and method thereof - Google Patents
Photoetching mark applying epitaxial technology and method thereof Download PDFInfo
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- CN103700649A CN103700649A CN201210367921.2A CN201210367921A CN103700649A CN 103700649 A CN103700649 A CN 103700649A CN 201210367921 A CN201210367921 A CN 201210367921A CN 103700649 A CN103700649 A CN 103700649A
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Abstract
The invention discloses a photoetching mark applying an epitaxial technology and a method thereof. The photoetching mark is put in a medium material, and any outer boundary or outer interface is surrounded by an epitaxial protecting layer which is hard to grow. The photoetching mark is thoroughly isolated from a silicon material, and the influence of epitaxial growth on the photoetching mark is thoroughly solved.
Description
Technical field
The present invention relates to the semiconductor making method in a kind of microelectronic chip manufacture field.
Background technology
Epitaxy technique in semiconductor manufacture is a kind of common film-forming process.But when epitaxial growth, pattern distortion is more common a kind of phenomenon.And pattern distortion meeting affects follow-up lithography alignment precision, thereby the alignment precision of restriction photoetching has limited exploitation and the manufacture of small size epitaxial device.The pattern distortion amount producing when how to avoid or to reduce epitaxial growth, for improving photoetching alignment precision, has very important meaning.
Alignment mark before common epitaxy technique adopts direct etching silicon substrate to produce conventionally, so it is subject to extension distortion effects very large, so its alignment precision is conventionally lower.
In order to solve the pattern alignment problem after epitaxial growth; some new methods are suggested; main thought for filling some protective materials in alignment mark; while making epitaxial growth; photo-etching mark region is grown epitaxial layer not, or by delaying, utilizes protective layer as etch stop layer outward; the epitaxial material of etching on it, forms alignment mark.
After utilizing said method, can obviously improve the impact of extension on photo-etching mark; but very thick at epitaxial growth thickness, or extension selectivity is not in good situation, i.e. extension growth rate still in higher situation on protective layer; effect is unsatisfactory, as Fig. 1,2 represented.Even because selective epitaxial growth conventionally generates monocrystalline silicon, and is polysilicon on other materials on silicon substrate.At the interface of silicon and other materials, the interface of the polysilicon of growing on the monocrystalline silicon of growing up on silicon substrate and other materials is broadening, and extends to other materials region from silicon substrate.And now because photo-etching mark external boundary and interface still exist silicon materials, therefore when epitaxial growth speed is very fast, growth thickness is thicker, or select when not high, the monocrystalline silicon growing up to from silicon substrate can extend to photo-etching mark region, cause photo-etching mark can cannot form or form bad, cause measurement result inaccurate.
In conventional method, although utilize protective layer to reduce the impact that photo-etching mark is subject to epitaxy technique, because whole alignment mark still exists the part contacting with silicon, and the protective material on photo-etching mark still can be covered by extension with technique change.
Equally, all photo-etching marks that utilize the interface formation of silicon and other materials, can be affected by epitaxially grown this characteristic equally.Therefore to thoroughly solve the impact of epitaxy technique on photo-etching mark, just must utilize non-silicon material to form, and the contacting of isolated photo-etching mark and silicon materials.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of photo-etching mark that is applied to epitaxy technique, it can by photo-etching mark thoroughly and silicon materials completely cut off, thoroughly solved the impact of epitaxial growth on photo-etching mark.
In order to solve above technical problem, the invention provides a kind of photo-etching mark that is applied to epitaxy technique, photo-etching mark is placed in dielectric material, and the protective layer that any one external boundary or outer boundary are all difficult to growth by extension surrounds.
Beneficial effect of the present invention is: by photo-etching mark thoroughly and silicon materials completely cut off, thoroughly solved the impact of epitaxial growth on photo-etching mark.
During epitaxial growth, be difficult to grow on protective layer, growth rate is compared little with the growth rate on substrate layer.
Protective layer can oxide or nitride.
After epitaxial growth, epitaxial growth thickness difference >=200 dust on dielectric layer and non-dielectric layer.
Whole photo-etching mark is all surrounded by dielectric layer region.
The present invention also provides a kind of generation to be applied to the method for the photo-etching mark of epitaxy technique, comprises the following steps: step 1, etch silicon substrate form a groove that area is larger; Step 2, deposition or by thermal oxidation filled media material in groove, form the substrate of photo-etching mark; Step 3, in basal region, etching dielectric layer forms photo-etching mark.
Dielectric layer etching depth >=500 dust in step 2.
Dielectric layer etching depth >=200 dust in step 3, and be less than 1/2 of subsequently epitaxial growing thickness * selection ratio, select than the ratio for dielectric layer and non-dielectric layer region epitaxial growth thickness.
From silicon area to areas of dielectric development length during photo-etching mark prohibited area >=epitaxial growth more than 2 times.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
Figure 1A the present invention and conventional lithography mark section comparison diagram;
Figure 1B the present invention and conventional lithography mark light display comparison diagram;
The layout design figure of Fig. 2 this patent photo-etching mark;
Fig. 3 photo-etching mark forming process schematic diagram.
Embodiment
A kind of photo-etching mark that is applied to epitaxy technique of the present invention, photo-etching mark is placed in dielectric material, and the material that any one external boundary or outer boundary are all difficult to growth by extension surrounds.
Its implementation comprises two parts, and domain is realized and technological process.
Its domain is realized as represented in Fig. 2.Form a dielectric layer basal region, by light shield 1, realize.Form photo-etching mark figure, by light shield 2, realize, graphics package is containing two parts, photo-etching mark region and photo-etching mark itself.The figure of the non-true formation in photo-etching mark region, just be used for the region that mark photo-etching mark forms, guarantee to form a prohibited area between photo-etching mark and dielectric layer basal region, from silicon area to areas of dielectric development length when its size meets photo-etching mark prohibited area >=epitaxial growth more than 2 times.Wherein during epitaxial growth from silicon area to areas of dielectric development length by measurement & characterization technique.Photo-etching mark is originally as the reality pictures on light shield 2, its type can be alignment mark (dust lignment m dust rk), the housing of alignment precision measurement markers or inside casing (out box/inner box in Overl dust y m dust rk), the figure that is applied to photoetching process measurement or characterizes of critical size measurement markers (CD m dust rk) or other types.Photo-etching mark itself, in photo-etching mark region, must not enter photo-etching mark prohibited area
Its technological process is as represented in Fig. 3
Step 1, use light shield 1 are by photoetching, and etch silicon substrate defines dielectric layer basal region
Step 2, at dielectric layer basal region by deposition or thermal oxidation filled media material, form the basal region of photo-etching mark
Step 3, use light shield 2 are by photoetching, and etching basal region inner medium layer forms photo-etching mark.
Institute's working medium layer basal region material while being generally epitaxial growth, is difficult on protective layer growth or growth rate has obviously different (general substrate layer is silicon) from substrate layer.
For the purpose of simple process, protective layer can be conventional oxide or nitride during semiconductor is manufactured, and also can use other to have the material of same characteristic features.Be generally SIO2, the B that also can adulterate, the impurity materials such as P are to improve its selection ratio in epitaxial growth.
Its growth rate and substrate layer have visibly different principal character to be after epitaxial growth, epitaxial growth thickness difference >=200 dust on dielectric layer and non-dielectric layer, conventionally for use CL or F be gas as the growing epitaxial silicon technique of etching gas, can guarantee on SIO2 grown silicon epitaxial loayer hardly.
Dielectric layer etching depth >=500 dust in step 1.But conventionally all darker, can select 0.5 ~ 10um.The technique of deep plough groove etched for existing (etch silicon substrate, and the degree of depth >=1um), can be used deep plough groove etched realization
After step 2 filled media material, can append a step and return quarter or CMP technique, remove the dielectric material on dielectric layer basal region silicon substrate in addition, guarantee that subsequently epitaxial growing can directly carry out on silicon substrate.But must guarantee that the deielectric-coating in region, dielectric layer base is not less than silicon substrate, or both difference in height <500 dusts
Etching in step 3 is dielectric layer etching, and must guarantee has sufficient dielectric layer to isolate between photo-etching mark bottom and silicon substrate, its residual thickness of dielectric layers >=1000 dust.
Etching depth >=200 dust in step 3, effect can be 500 dust ~ 1500 dusts preferably.And can on this degree of depth basis, append and measure the integral multiple of wavelength or half of integral multiple.Such as measuring wavelength, be the ruddiness of 6328 dusts, can the degree of depth on 500 ~ 1500 dust bases, increase half i.e. integral multiple of 3164 dusts of 6328 dusts or 6328 dusts.
Etching depth in step 3 can not be too large, higher than too because if epitaxy technique silicon and dielectric material are selected, etching gas flow is a lot, deposition velocity is slower, now in order to improve deposition velocity, can select to reduce select ratio, still can growth part epitaxial material on dielectric layer, now must guarantee that epitaxial material can not fill photo-etching mark region.Therefore step 3 etching depth need to be less than and be less than 1/2 of subsequently epitaxial growing thickness * selection ratio, selects than the ratio for dielectric layer and non-dielectric layer region epitaxial growth thickness.Guarantee can not filled completely by extension in photo-etching mark, and photo-etching mark size is also less than 1/2 of subsequently epitaxial growing thickness * selections and compares during layout design.
In this patent method, by photo-etching mark thoroughly and silicon materials completely cut off, thoroughly solved the impact of epitaxial growth on photo-etching mark.
The present invention is not limited to execution mode discussed above.Above the description of embodiment is intended in order to describe and illustrate the technical scheme the present invention relates to.Apparent conversion based on the present invention enlightenment or substitute and also should be considered to fall into protection scope of the present invention.Above embodiment is used for disclosing best implementation method of the present invention, so that those of ordinary skill in the art can apply numerous embodiments of the present invention and multiple alternative reaches object of the present invention.
Claims (9)
1. a photo-etching mark that is applied to epitaxy technique, is characterized in that, photo-etching mark is placed in dielectric layer, and the dielectric layer that any one external boundary or outer boundary are all difficult to growth by extension surrounds.
2. the photo-etching mark that is applied to epitaxy technique as claimed in claim 1, is characterized in that, is difficult to grow on dielectric layer during epitaxial growth, and growth rate is compared little with the growth rate on substrate layer.
3. the photo-etching mark that is applied to epitaxy technique as claimed in claim 1 or 2, is characterized in that, dielectric layer can oxide or nitride.
4. the photo-etching mark that is applied to epitaxy technique as claimed in claim 3, is characterized in that, after epitaxial growth, and epitaxial growth thickness difference >=200 dust on dielectric layer and non-dielectric layer.
5. the photo-etching mark that is applied to epitaxy technique as claimed in claim 4, is characterized in that, whole photo-etching mark is all surrounded by dielectric layer region.
6. generation is applied to a method for the photo-etching mark of epitaxy technique, it is characterized in that, comprises the following steps:
Step 1, etch silicon substrate form a groove that area is larger;
Step 2, deposition or by thermal oxidation filled media layer in groove, form the substrate of photo-etching mark;
Step 3, in basal region, etching dielectric layer forms photo-etching mark, and photo-etching mark is placed in dielectric layer, and the dielectric layer that any one external boundary or outer boundary are all difficult to growth by extension surrounds.
7. the photo-etching mark that is applied to epitaxy technique as claimed in claim 6, is characterized in that, dielectric layer etching depth >=500 dust in step 3.
8. the photo-etching mark that is applied to epitaxy technique as claimed in claim 7, it is characterized in that, dielectric layer etching depth >=200 dust in step 3, and be less than 1/2 of subsequently epitaxial growing thickness * selection ratio, select than the ratio for dielectric layer and non-dielectric layer region epitaxial growth thickness.
9. the photo-etching mark that is applied to epitaxy technique as claimed in claim 8, is characterized in that, from silicon area to areas of dielectric development length during photo-etching mark prohibited area >=epitaxial growth more than 2 times.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5314837A (en) * | 1992-06-08 | 1994-05-24 | Analog Devices, Incorporated | Method of making a registration mark on a semiconductor |
| CN101320215A (en) * | 2008-06-02 | 2008-12-10 | 中国电子科技集团公司第五十五研究所 | Photo-etching mark on semiconductor material and its production method |
| CN101882570A (en) * | 2009-05-04 | 2010-11-10 | 上海华虹Nec电子有限公司 | Method for improving alignment precision after epitaxial growth |
| CN103676485A (en) * | 2012-09-04 | 2014-03-26 | 上海华虹宏力半导体制造有限公司 | Photoetching alignment marking structure for thick epitaxy process |
-
2012
- 2012-09-28 CN CN201210367921.2A patent/CN103700649B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5314837A (en) * | 1992-06-08 | 1994-05-24 | Analog Devices, Incorporated | Method of making a registration mark on a semiconductor |
| CN101320215A (en) * | 2008-06-02 | 2008-12-10 | 中国电子科技集团公司第五十五研究所 | Photo-etching mark on semiconductor material and its production method |
| CN101882570A (en) * | 2009-05-04 | 2010-11-10 | 上海华虹Nec电子有限公司 | Method for improving alignment precision after epitaxial growth |
| CN103676485A (en) * | 2012-09-04 | 2014-03-26 | 上海华虹宏力半导体制造有限公司 | Photoetching alignment marking structure for thick epitaxy process |
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