CN110211918A - The production method and semiconductor structure of semiconductor structure - Google Patents
The production method and semiconductor structure of semiconductor structure Download PDFInfo
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- CN110211918A CN110211918A CN201910465392.1A CN201910465392A CN110211918A CN 110211918 A CN110211918 A CN 110211918A CN 201910465392 A CN201910465392 A CN 201910465392A CN 110211918 A CN110211918 A CN 110211918A
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- silicon oxide
- oxide layer
- semiconductor structure
- control layer
- growth control
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The present invention is provided in production method and the semiconductor structure of a kind of semiconductor structure, the first silicon oxide layer is sequentially formed in the bottom and side wall of groove, grow control layer, then etching removes the growth control layer of the channel bottom, then the second oxide layer is formed to fill the groove on the growth control layer of first silicon oxide layer and reservation that expose, since growth rate of second silica on first silicon oxide layer is greater than the growth rate in the growth control layer, therefore the growth rate of second silica of the channel bottom is greater than the growth rate of first silica of the trenched side-wall, therefore, it can lead to the phenomenon that sealing in advance occur to avoid because second silica layer growth for being located at trenched side-wall is too fast, and then it can be to avoid generation cavity blemish.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to the production method and semiconductor junction of a kind of semiconductor structure
Structure.
Background technique
With gradually increasing for integrated circuit high integration and high performance demands, semiconductor technology is towards smaller feature ruler
Very little technology node development.Currently, in the manufacturing technology of semiconductor, it is often necessary to trench fill is carried out, to complete semiconductor
The preparation of structure and entire device architecture.
In existing field of semiconductor processing, it is frequently encountered the filling problem of groove.Existing filling technique, no matter
It is chemical deposition or is filled with the method for Material growth, encounter the big groove of depth-to-width ratio, encounters and fill out in filling Shi Douhui
It fills the phenomenon that sealing in advance and generates cavity blemish, the electrical property of device and reliability is caused to be affected.
Summary of the invention
The purpose of the present invention is to provide a kind of production method of semiconductor structure and semiconductor structures, to solve semiconductor
It is easy to appear when the trench fill of device and seals phenomenon in advance and cause to lead to the problem of cavity blemish.
In order to solve the above technical problems, the present invention provides a kind of production method of semiconductor structure, comprising:
Semi-conductive substrate is provided, the semiconductor substrate has groove；
The first silicon oxide layer is formed, first silicon oxide layer covers the channel bottom and side wall；
Growth control layer is formed, the growth control layer covers first silicon oxide layer；
The etching removal part growth control layer, to expose first silica for being located at the channel bottom
Layer；
The second silicon oxide layer is formed, the second silicon oxide layer covering is located at the growth control on the trenched side-wall
The surface on the surface of layer and first silicon oxide layer exposed, and fill up the groove.
Optionally, in the production method of the semiconductor structure, the material of the growth control layer is silicon oxynitride
Or silicon oxide carbide.
Optionally, in the production method of the semiconductor structure, the thickness of the growth control layer of formation does not surpass
It crosses
Optionally, in the production method of the semiconductor structure, the growth control layer uses atomic layer deposition work
Skill is made.
Optionally, in the production method of the semiconductor structure, the part growth is removed using dry etching and is controlled
Preparative layer.
Optionally, in the production method of the semiconductor structure, first silicon oxide layer is raw using situ steam
It is generated at technique or thermal chemical vapor deposition process.
Optionally, in the production method of the semiconductor structure, first silicon oxide layer with a thickness of
The present invention also provides a kind of semiconductor structures, comprising:
Semiconductor substrate, the semiconductor substrate is interior to have groove；
First silicon oxide layer, first silicon oxide layer cover the channel bottom and side wall；
Control layer is grown, the growth control layer covering is located at the table of first silicon oxide layer on the trenched side-wall
Face；
Second silicon oxide layer, the second silicon oxide layer covering are located at the growth control layer on the trenched side-wall
The surface on surface and first silicon oxide layer positioned at the channel bottom, and fill up the groove.
Optionally, in the semiconductor structure, the material of the growth control layer is silicon oxynitride or oxidation of coal
Silicon.
Optionally, in the semiconductor structure, the thickness of the growth control layer is no more than
In the production method of semiconductor structure provided by the invention and semiconductor structure, comprising: semiconductor substrate is provided,
There is groove in the semiconductor substrate；Form the first silicon oxide layer, first silicon oxide layer cover the channel bottom and
Side wall；Growth control layer is formed, the growth control layer covers first silicon oxide layer；The growth control of etching removal part
Preparative layer, to expose first silicon oxide layer for being located at the channel bottom；In the life being located on the trenched side-wall
The surface of long control layer and the surface of first silicon oxide layer exposed form the second silicon oxide layer, second silica
Layer fills up the groove.When forming second silicon oxide layer to fill the groove, since second silica exists
Growth rate on first silicon oxide layer is greater than in the growth rate for growing control layer, therefore the institute of the channel bottom
Therefore the growth rate for first silica that the growth rate for stating the second silica is greater than the trenched side-wall can be kept away
Exempt to lead to the phenomenon that sealing in advance occur because second silica layer growth for being located at trenched side-wall is too fast, and then can keep away
Exempt to generate cavity blemish.
Detailed description of the invention
Fig. 1 is the flow chart of the production method of semiconductor structure provided in an embodiment of the present invention；
Fig. 2~7 are the signal of structural profile corresponding to each step of production method of the semiconductor structure of the embodiment of the present invention
Face；
It is wherein, each that the reference numerals are as follows:
11- semiconductor substrate；101 grooves；The first silicon oxide layer of 12-；13- grows control layer；The second silicon oxide layer of 14-.
Specific embodiment
As it was noted above, being frequently encountered the phenomenon that filling is sealed in advance in existing trench-fill technique and generating
Cavity blemish, this is primarily due to: when carrying out trench fill, it can generally be related to reaction gas, and the top of the groove connects at first
Contact reaction gas, in addition the influence of the factors such as rate of crystal column surface catching reaction gas of entire channel bottom and side wall,
So that the deposition rate of the top of the groove, trenched side-wall and channel bottom is sequentially reduced.When the top of the groove deposition rate is very fast,
For the groove of high-aspect-ratio, it is easy to produce sealing phenomenon.
In view of this, the present invention is directed to be kept away by changing trench fill material in the growth rate of channel bottom and side wall
Exempt from the generation of sealing phenomenon.
Below in conjunction with the drawings and specific embodiments to the production method and semiconductor junction of semiconductor structure proposed by the present invention
Structure is described in further detail.It should be noted that attached drawing is all made of very simplified form and using non-accurate ratio, only
To convenient, the lucidly aid illustration embodiment of the present invention the purpose.In addition, the structure that attached drawing is shown is often practical structures
A part.Particularly, the emphasis that each attached drawing needs to show is different, uses different ratios sometimes.
As shown in Figure 1, the production method of semiconductor structure provided in an embodiment of the present invention includes:
Step S11 provides semi-conductive substrate, has groove in the semiconductor substrate；
Step S12, forms the first silicon oxide layer, and first silicon oxide layer covers the channel bottom and side wall；
Step S13, forms growth control layer, and the growth control layer covers first silicon oxide layer；
Step S14, the etching removal part growth control layer, to expose be located at the channel bottom described first
Silicon oxide layer；
Step S15, forms the second silicon oxide layer, and the second silicon oxide layer covering is located at described on the trenched side-wall
The surface and the surface of first silicon oxide layer exposed of control layer are grown, and fills up the groove.
Compared with prior art, when forming second silicon oxide layer to fill the groove, since silica is described
Growth rate on first silicon oxide layer is greater than in the growth rate for growing control layer, therefore the silica of the channel bottom
Growth rate be greater than the trenched side-wall silica growth rate, it can thus be avoided because positioned at trenched side-wall oxygen
SiClx growth is too fast and leads to occur the phenomenon that sealing in advance, and then can be to avoid generation cavity blemish.
It is described in detail below in conjunction with 2~5 pairs of attached drawing semiconductor structure production methods provided in an embodiment of the present invention.
Firstly, executing step S11, referring to FIG. 2, providing semi-conductive substrate 11, the semiconductor substrate has groove
101。
The semiconductor substrate 11 can be with monocrystalline silicon or polysilicon, be also possible to silicon, germanium, SiGe, GaAs etc.
Semiconductor material can also be composite construction such as silicon-on-insulator.Those skilled in the art can be according to semiconductor substrate 11
The semiconductor devices of upper formation selects the type of the semiconductor substrate 11, therefore the type of the semiconductor substrate 11 should not limit
Protection scope of the present invention processed.The groove 101 is used as isolation structure, and the active area for 101 two sides of groove provides isolation, described
The semiconductor devices such as MOS transistor or fin formula field effect transistor can be formed on the active area of 101 two sides of groove.
The technique that the groove 101 is formed in the semiconductor substrate 11 can be dry etching or wet-etching technology.?
When forming the groove 101 by etching technics, can first be sequentially formed in the semiconductor substrate 11 pad oxide skin(coating) and
Pad nitride layer protects the semiconductor substrate 11 as sacrificial layer, executes etching technics again then to form groove
101。
In addition, the groove 101 can have vertical side wall, it is possible to have inclined side wall, when the groove 101
101 filling quality of groove is helped to improve, together when so that groove 101 being presented with up big and down small opening using inclined side wall
When avoid edge current leakage phenomenon caused by sharp 101 corner of groove.The system of the semiconductor structure of the embodiment of the present invention
Make method, the form of the groove 101 be not specifically limited, but, particularly, when groove 101 using vertical side wall and
When with high-aspect-ratio, using the semiconductor junction of the production method formation of the semiconductor structure provided in an embodiment of the present invention
Structure, for cavity blemish, improvement is especially significant.
Secondly, executing step S12, referring to FIG. 3, forming the first silicon oxide layer 12, first silicon oxide layer 12 is covered
101 bottom and side wall of groove.The material of first silicon oxide layer 12 concretely silica.
First silicon oxide layer 12 can be used situ steam and generate (ISSG, In Situ Steam Generation) work
Skill or thermal chemical vapor deposition (TCVD, Thermal CVD) Process Production.Formed first silicon oxide layer 12 with a thickness ofIt may be, for example,Or Deng.Described first formed
Silicon oxide layer 12 can repair the substrate lattice defect in groove 101 and improve substrate surface pressure in groove 101, can also be right
Substrate surface in groove 101 plays the role of protection, prevents subsequent fill process injury substrate.
Then, step S13 is executed, referring to FIG. 4, forming growth control layer 13, the growth control layer 13 covers described
First silicon oxide layer 12.
Wherein, the material of the growth control layer 13 can be silicon oxynitride or silicon oxide carbide, silicon oxynitride/silicon oxide carbide
Versus-silica has good etching selection ratio, can usually be up to 6:1, therefore, subsequent when performing etching technique, also
It can play the role of etching barrier layer.
Additionally, it is preferred that the thickness of the growth control layer 13 formed is no more thanIt may be, for example, OrDeng.Further, in the present embodiment, the growth control layer 13 preferably uses atom layer deposition process (ALD, Atomic
Layer deposition) technique or furnace process be made, the growth control layer is formed using ALD technique and furnace process
When 13, quality of forming film is good, particularly, the thickness of film can be accurately controlled using ALD technique, conformality is good.
Followed by, step S14 is executed, referring to FIG. 5, the etching removal part growth control layer 13, to expose position
First silicon oxide layer 12 in 101 bottom of groove.
In this step, dry etching can be used and remove the part growth control layer 13, when the growth control layer 13
When material is selected as silicon oxynitride or silicon oxide carbide, the predominant gas performed etching can be CF4, may also include O2/CO/Ar/
CHF3In it is one or several.
Finally, executing step S15, referring to FIG. 6, forming the second silicon oxide layer 14, second silicon oxide layer 14 is covered
The table on the surface of the growth control layer 13 on 101 side wall of groove and first silicon oxide layer 12 exposed
Face, and fill up the groove 101.The material of second silicon oxide layer 14 concretely silica.
In the step, it is preferred to use described in high-aspect-ratio technique (HARP, High Aspect Ratio Process) is formed
Second silicon oxide layer 14.
Due to when forming second silicon oxide layer 14, growth of the silica on the surface of first silicon oxide layer 12
Speed is greater than the speed of growth on the growth control layer 13, that is, the growth rate of the silica of 101 bottom of groove is big
In the growth rate of the silica of 101 side wall of groove, it can thus be avoided because of the silicon oxide layer for being located at 101 side wall of groove
It grows too fast and leads to occur the phenomenon that sealing in advance, and then can be to avoid generation cavity blemish.
In addition, please referring to Fig. 2~6, the embodiment of the present invention is preferably forming first silicon oxide layer 12, growth control
When preparative layer 13 and second silicon oxide layer 14, first silicon oxide layer 12, the growth control layer 13 and described
Silicon dioxide layer 14 is also formed into the peripheral region in the groove 101, then, referring to FIG. 7, can pass through chemical grinding work again
Skill removal, to guarantee the quality of the filling of groove 101.
Corresponding, referring again to Fig. 7, the embodiment of the present invention provides a kind of semiconductor structure, comprising:
Semiconductor substrate 11, the semiconductor substrate 11 is interior to have groove 101；
First silicon oxide layer 12, first silicon oxide layer 12 cover 101 bottom and side wall of groove；
Control layer 13 is grown, growth control layer 13 covering is located at first oxidation on 101 side wall of groove
The surface of silicon layer 12；
Second silicon oxide layer 14, the covering of the second silicon oxide layer 14 are located at the growth on 101 side wall of groove
The surface on the surface of control layer 13 and first silicon oxide layer 12 positioned at 101 bottom of groove, and fill up the groove
101。
Wherein, the material of the growth control layer 13 and thickness make introduction in preceding sections, and details are not described herein.
In conclusion the production method and semiconductor structure of the semiconductor structure of the embodiment of the present invention solve semiconductor device
It is easy to appear when the trench fill of part and seals phenomenon in advance and cause to lead to the problem of cavity blemish.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair
Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims
Range.
Claims (10)
1. a kind of production method of semiconductor structure characterized by comprising
Semi-conductive substrate is provided, the semiconductor substrate has groove；
The first silicon oxide layer is formed, first silicon oxide layer covers the channel bottom and side wall；
Growth control layer is formed, the growth control layer covers first silicon oxide layer；
The etching removal part growth control layer, to expose first silicon oxide layer for being located at the channel bottom；
The second silicon oxide layer is formed, the second silicon oxide layer covering is located at the growth control layer on the trenched side-wall
The surface on surface and first silicon oxide layer exposed, and fill up the groove.
2. the production method of semiconductor structure according to claim 1, which is characterized in that the material of the growth control layer
For silicon oxynitride or silicon oxide carbide.
3. the production method of semiconductor structure according to claim 1, which is characterized in that the growth control layer of formation
Thickness be no more than
4. the production method of semiconductor structure according to claim 1, which is characterized in that the growth control layer is using former
Sublayer depositing operation is made.
5. the production method of semiconductor structure according to claim 1, which is characterized in that remove part using dry etching
The growth control layer.
6. the production method of semiconductor structure according to claim 1, which is characterized in that first silicon oxide layer uses
Situ steam generates technique or thermal chemical vapor deposition process generates.
7. the production method of semiconductor structure according to claim 1, which is characterized in that the thickness of first silicon oxide layer
Degree is
8. a kind of semiconductor structure characterized by comprising
Semiconductor substrate, the semiconductor substrate is interior to have groove；
First silicon oxide layer, first silicon oxide layer cover the channel bottom and side wall；
Control layer is grown, the growth control layer covering is located at the surface of first silicon oxide layer on the trenched side-wall；
Second silicon oxide layer, the second silicon oxide layer covering are located at the surface of the growth control layer on the trenched side-wall
With the surface for first silicon oxide layer for being located at the channel bottom, and the groove is filled up.
9. semiconductor structure as claimed in claim 8, which is characterized in that it is described growth control layer material be silicon oxynitride or
Person's silicon oxide carbide.
10. semiconductor structure as claimed in claim 8, which is characterized in that the thickness of the growth control layer is no more than
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111933572A (en) * | 2020-10-10 | 2020-11-13 | 晶芯成(北京)科技有限公司 | Semiconductor structure and manufacturing method thereof |
| CN112750753A (en) * | 2019-10-29 | 2021-05-04 | 长鑫存储技术有限公司 | Semiconductor device and method for manufacturing the same |
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|---|---|---|---|---|
| US20010028097A1 (en) * | 1998-05-28 | 2001-10-11 | Fumitomo Matsuoka | Semiconductor device having buried-type element isolation structure and method of manufacturing the same |
| CN101197304A (en) * | 2006-12-04 | 2008-06-11 | 中芯国际集成电路制造(上海)有限公司 | Method for forming isolation structure of shallow plough groove |
| CN103871951A (en) * | 2012-12-18 | 2014-06-18 | 中芯国际集成电路制造(上海)有限公司 | Channel filling method |
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2019
- 2019-05-30 CN CN201910465392.1A patent/CN110211918A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010028097A1 (en) * | 1998-05-28 | 2001-10-11 | Fumitomo Matsuoka | Semiconductor device having buried-type element isolation structure and method of manufacturing the same |
| CN101197304A (en) * | 2006-12-04 | 2008-06-11 | 中芯国际集成电路制造(上海)有限公司 | Method for forming isolation structure of shallow plough groove |
| CN103871951A (en) * | 2012-12-18 | 2014-06-18 | 中芯国际集成电路制造(上海)有限公司 | Channel filling method |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112750753A (en) * | 2019-10-29 | 2021-05-04 | 长鑫存储技术有限公司 | Semiconductor device and method for manufacturing the same |
| CN112750753B (en) * | 2019-10-29 | 2022-06-03 | 长鑫存储技术有限公司 | Semiconductor device and method for manufacturing the same |
| CN111933572A (en) * | 2020-10-10 | 2020-11-13 | 晶芯成(北京)科技有限公司 | Semiconductor structure and manufacturing method thereof |
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Application publication date: 20190906 |