CN103698635A - Saturation A/D (Analog/Digital) sampling method based on high-voltage static reactive compensation device - Google Patents
Saturation A/D (Analog/Digital) sampling method based on high-voltage static reactive compensation device Download PDFInfo
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Abstract
The invention discloses a saturation A/D (Analog/Digital) sampling method based on a high-voltage static reactive compensation device. The method comprises the following steps: 1), selecting a main control CPU (Central Processing Unit) chip with a successive approximation type AD convertor as a main control chip of the high-voltage static reactive compensation device; 2) in a sampling period, performing saturation sampling on a same sampled signal by virtue of the main control CPU chip; 3) performing unified management on the obtained sampled data; 4) describing a waveform pattern of the sampled signal; 5) selecting all invalid data in sampling intervals of the waveform patter, performing discrete fourier transform on the valid data in the sampling period, collecting periodic variables in the sampled signal, performing root mean square calculation on the valid data in the sampling period and collecting subharmonics contained in the sampled signal. According to the method disclosed by the invention, saturation sampling is adopted, and unified management and calculation are performed on the sampled data, so that the sampling precision of a system is improved, the hardware cost is lowered, and the method has a favorable application prospect.
Description
Technical field
The present invention relates to parameters of electric power technical field, be specifically related to a kind of saturated A/D method of sampling based on high pressure static passive compensation device.
Background technology
In high pressure static passive compensation device (SVC), sampling system is occupied critical role, require sampling system energy fast, accurately catch the transient state characteristic of analog quantity, if sampling system adopts the special-purpose A/D conversion chip extending out, although can meet design requirement, but cost is higher, the producer of the high pressure static passive compensation device (SVC) of current production is extremely many, Market competition, under the prerequisite of not sacrificing device performance, reduce installation cost, improve product competitiveness extremely necessary, so, how to reduce the production cost of high pressure static passive compensation device, and the sampling precision that does not reduce sampling system is the urgent problem solving of producer's needs of the high pressure static passive compensation device (SVC) of current production.
Summary of the invention
Technical matters solved by the invention is the acquisition system that overcomes the high pressure static passive compensation device of prior art, adopts the special-purpose A/D conversion chip extending out, and cost is higher, the problem of complex circuit designs.
In order to solve the problems of the technologies described above, the technical solution adopted in the present invention is:
The saturated A/D method of sampling based on high pressure static passive compensation device, is characterized in that: comprises the following steps,
Step (1), selects the master cpu chip with successive approximation type a/d converter, as the main control chip of high pressure static passive compensation device;
Step (2), a sampling period, master cpu chip carries out saturated sampling to same sampled signal;
Step (3), master cpu chip carries out unified management to the sampled data of obtaining;
Step (4), according to the historical data gathering, describes the oscillogram of sampled signal;
Step (5), according to oscillogram, select invalid datas all in sampling interval, valid data in sampling period are carried out to the collection of discrete Fourier transformation realization to each periodic variable in sampled signal, the valid data in the sampling period are carried out to root mean square computing realization to the each harmonic collection comprising in sampled signal.
The aforesaid saturated A/D method of sampling based on high pressure static passive compensation device, is characterized in that: described master cpu chip is that signal is STM32F103ZE, and inside carries 3 A/D converters.
The aforesaid saturated A/D method of sampling based on high pressure static passive compensation device, is characterized in that: described step (2) sampling period is 1/1200Hz, the number of times of described saturated sampling is 32 times.
The aforesaid saturated A/D method of sampling based on high pressure static passive compensation device, is characterized in that: the process that described step (3) master cpu chip carries out unified management to the sampled data of obtaining is,
(1) add up sampled point number in each sampling period, obtain the accurate sampling period, guarantee that the maximum time error between the sampling period is within 1 sampling interval;
(2) to the sampled data in each sampling period, adopt ping-pong operation mode to store;
(3) when the data amount check of storage does not reach capacity sampling number; for guaranteeing the correctness of data processing; low speed data buffer module opens, reads blocking in writing; until do not have new sampled data to deposit data buffering module in; low speed data buffer module enters write-protect, reads open state; repetitive cycling, realizes the unified management of master cpu chip to image data.
The aforesaid saturated A/D method of sampling based on high pressure static passive compensation device, it is characterized in that: the process that described ping-pong operation mode is stored deposits data in first buffer module for first collection period, second collection period deposits data in second buffer module, the data of the first buffer module are transported to arithmetic element simultaneously, the 3rd collection period deposits data in first buffer module, the data of the second buffer module are transported to arithmetic element simultaneously, repetitive operation, realize the processing of low speed data buffer module to saturated sampling high speed data, described the first buffer module and the second buffer module are low speed data buffer module.
The invention has the beneficial effects as follows: the saturated A/D method of sampling based on high pressure static passive compensation device of the present invention, select the A/D of 12, high-speed SAR (successively approaching) type that master cpu chip carries, within a sampling period, carry out saturated sampling, sampled data is carried out to unified management computing, improve the precision of systematic sampling, reduce hardware cost, have a good application prospect.
Accompanying drawing explanation
Fig. 1 is the process flow diagram of the saturated A/D method of sampling based on high pressure static passive compensation device of the present invention.
Fig. 2 is the process flow diagram that sampled data of the present invention adopts ping-pong operation mode to store.
Embodiment
Below in conjunction with Figure of description, the present invention is further illustrated.
As shown in Figure 1, the saturated A/D method of sampling based on high pressure static passive compensation device, is characterized in that: comprise the following steps,
Step (1), select the master cpu chip with successive approximation type a/d converter, main control chip as high pressure static passive compensation device, master cpu chip is that signal is STM32F103ZE, inside carries 3 A/D converters, the A/D converter of 0.5us switching time (system clock is 24MHz), device sample frequency is designed to 1200Hz, A/D sampling interval is 833us, in an A/D sampling interval, simulating signal is carried out to saturated sampling, same simulating signal is carried out to 32 samplings, switching time is in 32x0.5=16us left and right like this, well below A/D sampling interval, again 32 sampled values are performed mathematical calculations, keeping under the prerequisite of higher sample rate like this, improved the precision of sampling,
Step (2), a sampling period, master cpu chip carries out saturated sampling to same sampled signal, and the sampling period is 1/1200Hz, and the number of times of described saturated sampling is 32 times;
Step (3), master cpu chip carries out unified management to the sampled data of obtaining, management process, as shown in Figure 2,
(1) add up sampled point number in each sampling period, obtain the accurate sampling period, guarantee that the maximum time error between the sampling period is within 1 sampling interval;
(2) to the sampled data in each sampling period, adopt ping-pong operation mode to store, the process that ping-pong operation mode is stored deposits data in first buffer module for first collection period, second collection period deposits data in second buffer module, the data of the first buffer module are transported to arithmetic element simultaneously, the 3rd collection period deposits data in first buffer module, the data of the second buffer module are transported to arithmetic element simultaneously, repetitive operation, realize the processing of low speed data buffer module to saturated sampling high speed data, the first buffer module and the second buffer module are low speed data buffer module,
(3) when the data amount check of storage does not reach capacity sampling number, for guaranteeing the correctness of data processing, low speed data buffer module opens, reads blocking in writing, until do not have new sampled data to deposit data buffering module in, low speed data buffer module enters write-protect, reads open state, repetitive cycling, realizes the unified management of master cpu chip to image data;
Step (4), according to the historical data gathering, describes the oscillogram of sampled signal;
Step (5), according to oscillogram, select invalid datas all in sampling interval, valid data in sampling period are carried out to the collection of discrete Fourier transformation realization to each periodic variable in sampled signal, the valid data in the sampling period are carried out to root mean square computing realization to the each harmonic collection comprising in sampled signal.
Through experimental verification, high pressure static passive compensation device adopts the above-mentioned method of sampling, reaches re-set target, improves the precision of systematic sampling, reduces hardware cost, has a good application prospect.
More than show and described ultimate principle of the present invention and principal character and advantage of the present invention.The technician of the industry should understand; the present invention is not restricted to the described embodiments; that in above-described embodiment and instructions, describes just illustrates principle of the present invention; without departing from the spirit and scope of the present invention; the present invention also has various changes and modifications, and these changes and improvements all fall in the claimed scope of the invention.The claimed scope of the present invention is defined by appending claims and equivalent thereof.
Claims (5)
1. the saturated A/D method of sampling based on high pressure static passive compensation device, is characterized in that: comprises the following steps,
Step (1), selects the master cpu chip with successive approximation type a/d converter, as the main control chip of high pressure static passive compensation device;
Step (2), a sampling period, master cpu chip carries out saturated sampling to same sampled signal;
Step (3), master cpu chip carries out unified management to the sampled data of obtaining;
Step (4), according to the historical data gathering, describes the oscillogram of sampled signal;
Step (5), according to oscillogram, select invalid datas all in sampling interval, valid data in sampling period are carried out to the collection of discrete Fourier transformation realization to each periodic variable in sampled signal, the valid data in the sampling period are carried out to root mean square computing realization to the each harmonic collection comprising in sampled signal.
2. the saturated A/D method of sampling based on high pressure static passive compensation device according to claim 1, is characterized in that: described master cpu chip is that signal is STM32F103ZE, and inside carries 3 A/D converters.
3. the saturated A/D method of sampling based on high pressure static passive compensation device according to claim 1, is characterized in that: described step (2) sampling period is 1/1200Hz, and the number of times of described saturated sampling is 32 times.
4. the saturated A/D method of sampling based on high pressure static passive compensation device according to claim 1, is characterized in that: the process that described step (3) master cpu chip carries out unified management to the sampled data of obtaining is,
(1) add up sampled point number in each sampling period, obtain the accurate sampling period, guarantee that the maximum time error between the sampling period is within 1 sampling interval;
(2) to the sampled data in each sampling period, adopt ping-pong operation mode to store;
(3) when the data amount check of storage does not reach capacity sampling number; for guaranteeing the correctness of data processing; low speed data buffer module opens, reads blocking in writing; until do not have new sampled data to deposit data buffering module in; low speed data buffer module enters write-protect, reads open state; repetitive cycling, realizes the unified management of master cpu chip to image data.
5. the saturated A/D method of sampling based on high pressure static passive compensation device according to claim 4, it is characterized in that: the process that described ping-pong operation mode is stored deposits data in first buffer module for first collection period, second collection period deposits data in second buffer module, the data of the first buffer module are transported to arithmetic element simultaneously, the 3rd collection period deposits data in first buffer module, the data of the second buffer module are transported to arithmetic element simultaneously, repetitive operation, realize the processing of low speed data buffer module to saturated sampling high speed data, described the first buffer module and the second buffer module are low speed data buffer module.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10174278A (en) * | 1996-12-05 | 1998-06-26 | Toshiba Corp | Electrical equipment |
| CN201060245Y (en) * | 2007-03-21 | 2008-05-14 | 辽宁荣信电力电子股份有限公司 | SVC signal generating device |
| CN202285332U (en) * | 2011-04-02 | 2012-06-27 | 中冶华天工程技术有限公司 | Reactive power compensation controller and low voltage dynamic reactive power compensation control device |
| CN102759675A (en) * | 2012-07-27 | 2012-10-31 | 深圳市中电软件有限公司 | On-line electric energy quality monitoring device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10174278A (en) * | 1996-12-05 | 1998-06-26 | Toshiba Corp | Electrical equipment |
| CN201060245Y (en) * | 2007-03-21 | 2008-05-14 | 辽宁荣信电力电子股份有限公司 | SVC signal generating device |
| CN202285332U (en) * | 2011-04-02 | 2012-06-27 | 中冶华天工程技术有限公司 | Reactive power compensation controller and low voltage dynamic reactive power compensation control device |
| CN102759675A (en) * | 2012-07-27 | 2012-10-31 | 深圳市中电软件有限公司 | On-line electric energy quality monitoring device |
Non-Patent Citations (1)
| Title |
|---|
| 意法半导体(中国)投资有限公司: "STM32F103ZE应用手册", 《HTTP://WWW.ST.COM》, 10 January 2010 (2010-01-10) * |
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