CN103684453A - Test method for mass production of integrated chips of analog digital converter - Google Patents
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Abstract
The invention belongs to the field of semiconductor testing and relates to a test method for mass production of integrated chips of an analog digital converter. The test method adopts a high-performance crystal oscillator to provide low-jitter sine wave test input signals adopting clocks and low noises for the chips of a tested high-speed high-resolution analog digital converter, wherein the sine wave test input signals are obtained by band-pass filtering for crystal oscillating output signals, a working power supply is provided for the crystal oscillator through a programmable power supply module of automatic test equipment, and the voltage of the working power supply of the crystal oscillator is programmatically controlled to realize the amplitude control for crystal oscillating output sampling clock signals and the sine wave test input signals; a digital channel of the automatic test equipment controls the Enable/Disenable pin of the crystal oscillator to realize the on-off control for the crystal oscillating output signals. The method has the advantages of low cost, small size, easiness in control and the like and can also be used for the field that pure-digital automatic test equipment and test machines realize low-cost chip verification and mass production testing of the analog digital converters.
Description
Technical field
The invention belongs to semiconductor test field, relate to a kind of A-D converter integrated chip volume production method of testing, be specifically related to a kind ofly based on automatic test equipment (ATE), with crystal oscillator, as signal source and clock source, realize high speed, high resolution A-D converter (ADC) volume production method of testing; The method realizes high speed, high resolution ADC integrated chip volume production test with additional high-performance crystal oscillator as signal source and clock source, low cost based on ATE, can solve the high performance requirements of high speed, high resolution ADC integrated chip test to sampling clock and test signal shake, signal to noise ratio.
Background technology
At present, high speed, high resolution analog to digital converter (ADC) has been widely used in digital information processing system, with real-time Digital Signal Processing, replace traditional analog signal processing method, comprising the extensive use during ADC is in radar, observing and controlling and other high-speed data acquistion system, wideband digital receiving system, especially digital technology is widely used in each electronic product, and signal bandwidth and transmission rate have been proposed to more and more higher requirement; High-speed ADC is converted into the core component of digital quantity as analog quantity, have irreplaceable effect.Practice shows, the development speed of integrated chip is unable to catch up with in the development of ATE test machine far away, at present, the ATE test machine equipment of industrial circle most significant end, high speed, high resolution measuring technology index is: maximum sinusoidal ripple frequency 125MHz, resolution 16bit, the about 3ps of system clock RMS shake index left and right, as chip design manufacturer need to complete maximum input signal, be greater than 125MHz, resolution higher than the high speed, high resolution ADC integrated chip product of 14bit, will face alternative ATE test machine on market and be difficult to meet the awkward situation of its requirement; In addition, also there is following defect in the test mixing signal ATE test machine for ADC chip on market: analog module is expensive, testing cost is high, and having become chip design manufacturer must not an irrespective realistic problem in carrying out ADC integrated chip volume production test process.
At present, industrial circle is carried out the test of ADC integrated chip volume production and is mainly contained following method: one, and the analog module method based on ATE test machine (being called for short ATE method), two, additional high-speed digital-analog converter (DAC)+filter (being called for short DAC method), three, adopt additional instrument+filter (being called for short plug-in instrument method), that described method respectively has is excellent, shortcoming and certain use restriction: wherein, ATE method, utilizes the performance of ATE test machine itself, its advantage is that ATE equipment is as a complicated test macro, strict checking and the test of process design and production manufacturer before dispatching from the factory, its stability of a system, technological services etc. have good guarantee, but its shortcoming is also very obvious, be that system upgrade renewal speed is slower than the new product of integrated chip, once ATE test machine is on the market difficult to meet the technical requirement of tested ADC chip, ATE test machine is difficult to obtain accordingly and upgrade in the short time, in addition, high-end ATE test machine price is extremely expensive, generally reach 2,000,000 dollars of left and right, the ability that the equipment purchase unit of restriction greatly upgrades in time to it, therefore, cause current ATE test machine to be suitable for Test input signal not high, be generally the ADC chip product below 50MHz, DAC method: select high-speed DAC chip to produce the high speed test signal of test high speed, high resolution ADC chip, the advantage of the method is the development with integrated circuit processing technique and designing technique, high speed high-resolution DAC chip product can be synchronizeed and occur with high speed, high resolution ADC chip product, and the test of high speed, high resolution DAC chip, the available high-resolution ADC chip of relative low speed with maintenance function completes test, but the output amplitude that its shortcoming is high speed, high resolution DAC on the one hand generally can be restricted, need to increase amplifying circuit and improve its output amplitude, on the other hand, there is noise in high speed, high resolution DAC chip itself, and be subject to the impact of sampling clock shake and cause making an uproar at the bottom of its output signal higher, affect the measuring accuracy of high speed, high resolution ADC chip, in addition, for higher than 200MHz with upper frequency, alternative DAC chip is considerably less, plug-in instrument method, to utilize high-quality simulation signal generator instrumentation, as adopt RF instrumentation equipment as the Test input signal source of ADC, its advantage is the non-constant width of test frequency scope producing, amplitude output signal is large, its shortcoming is that instrumentation price is more expensive, volume is also relatively large, need take certain area, is unsuitable for multichannel or multi-chip with the ADC volume production test of surveying.
Due to above-mentioned restraining factors or shortcoming, the present invention intends providing a kind of plug-in crystal oscillator high speed, high resolution ADC chip volume production method of testing based on ATE, with low cost, realize high speed, high resolution A-D converter (ADC) integrated chip volume production test, solve in test the high performance requirements to sampling clock and test signal shake, signal to noise ratio.
Summary of the invention
The object of the invention is to overcome defect and the deficiency of prior art, a kind of A-D converter integrated chip volume production method of testing is provided, be specifically related to a kind ofly based on ATE, with crystal oscillator, as signal source and clock source, realize high speed, high resolution ADC volume production method of testing; The method realizes high speed, high resolution A-D converter (ADC) integrated chip volume production test with additional high-performance crystal oscillator as signal source and clock source, low cost based on automatic test equipment (ATE), can solve the high performance requirements of high speed, high resolution ADC integrated chip test to sampling clock and test signal shake, signal to noise ratio.
The inventive method utilize crystal oscillator output signal have low noise, low jitter, high stability, high output signal amplitude, volume little, be easy to use, high reliability, in the situation that ATE test machine technical indicator can not meet the test of high speed, high resolution ADC chip volume production, by increase high performance crystal oscillator on test carrier plate, meet the volume production test request of high speed, high resolution ADC chip; The output signal that described crystal oscillator produces can also can coordinate and produce high performance sinusoidal wave ADC Test input signal with filter directly as high performance tested ADC chip testing sampling clock, and this method has that cost is low, volume is little, be easy to the advantages such as control.
In the present invention, low jitter sampling clock when high performance crystal oscillator output signal both can be used as high speed high-resolution ADC chip testing, also can realize the sinusoidal wave Test input signal of the high speed having at the bottom of low noise by filter, thus the strict demand to sampling clock, input sine wave test signal while meeting high speed, high resolution ADC chip testing; And the amplitude of crystal oscillator output signal also can need to be carried out flexible according to high speed high-resolution ADC test.
In the present invention, to be used to high speed, high resolution ADC chip that the clock input pin of the crystal oscillator of sampling clock near tested ADC chip is provided, the clock signal of crystal oscillator output is input to ADC chip with short as far as possible path, can obviously reduce because input signal cabling and system noise cause sampling clock performance deteriorated, affect measuring accuracy;
In the present invention, by the crystal oscillator output signal for generation of Test input signal, through band pass filter, the high order harmonic component of filtering crystal oscillator output, the sinusoidal wave input test signal of generation relative ideal; Because crystal oscillator has high stability, high performance crystal oscillator output signal has low-down making an uproar at the end, than RF instrumentation, has more excellent performance, thereby the test error that test signal can be caused falls as far as possible and causes minimum;
In the present invention, the control of described crystal oscillator amplitude output signal is by regulating its supply power voltage to realize; Conventionally, crystal oscillator has an enable pin, and the present invention, by it is carried out to the setting of Enable/Disenable, realizes the switch of crystal oscillator output signal is controlled.
Particularly, A-D converter integrated chip volume production method of testing of the present invention, adopt respectively high-performance crystal oscillator to provide employing clock and the sinusoidal wave Test input signal at the bottom of low noise (wherein sinusoidal wave Test input signal obtains by crystal oscillator output signal is carried out to bandpass filtering) of low jitter for tested high speed, high resolution ADC chip, and provide working power by automatic test equipment (ATE) programmable power supply module for crystal oscillator, the working power voltage of programming Control crystal oscillator is realized crystal oscillator output sampled clock signal, the amplitude of sinusoidal wave Test input signal is controlled, by automatic test equipment (ATE)
One railway digital passage is controlled the Enable/Disenable pin of crystal oscillator, realizes the switch of crystal oscillator output signal is controlled, and it is characterized in that, it comprises step:
(1) according to tested ADC integrated chip sample frequency and required jitter performance, selection can meet one or more crystal oscillators of tested ADC sample frequency and jitter performance, and as tested ADC integrated chip sampling clock source, (if desired a plurality of crystal oscillators are as the clock source of tested ADC chip, also need to select suitable relay (Relay) for switching the input clock signal of different crystal oscillators, the switching controls of relay can realize by the programming of ATE relay passage);
Paster (SMD) packing forms is selected in the encapsulation of described crystal oscillator, to be welded in when test carrier plate (Loadboard) is gone up, can realize minimum Signal Degrade;
(2) when carrying out test carrier plate (Loadboard) design, as the crystal oscillator of clock source, near the sampling clock input pin of tested ADC chip, place as far as possible, to reduce to walk the factors such as the noise introduced in line process, signal distortion, cause jitter performance to worsen; If when tested ADC integrated chip needs a plurality of different sample frequency, can select the crystal oscillator of a plurality of different operating frequencies as the clock source of its different frequency, the clock source of a plurality of different frequencies carries out switching over as required by relay (Relay); The sampled clock signal that described relay selects a plurality of crystal oscillators to produce need select radio frequency table to seal dress relay, the Signal Degrade bringing to reduce relay as far as possible;
(3), according to tested ADC integrated chip frequency test signal and noiseproof feature requirement, selection can meet tested ADC Test input signal frequency and the end and make an uproar one or more crystal oscillators of requiring as its testing source; As the crystal oscillator of signal source, according to the high performance band pass filter of its operating frequency corresponding selection, the high order harmonic component filtering that crystal oscillator is produced; When having a plurality of crystal oscillators as signal source, select suitable relay to switch selection to different input signals, the switching controls of relay realizes by the programming of ATE relay passage;
Paster (SMD) packing forms is selected in the encapsulation of described crystal oscillator, to realize minimum Signal Degrade;
(4) the normal output signal of crystal oscillator is to approach desirable square-wave signal, in order to obtain the more satisfactory sinusoidal wave test signal of ADC integrated chip test, crystal oscillator output signal needs tape splicing bandpass filter, by the high order harmonic component target signal filter in crystal oscillator output signal, thereby obtain more satisfactory base band sine wave signal; Because the general output amplitude of crystal oscillator signal is larger, therefore, band pass filter can be selected the high-order LC filter that squareness factor is good, isolation is high as far as possible, and the insertion loss of high-order LC filter can compensate by heightening the signal output amplitude of crystal oscillator; The coaxial connection of SMA or Surface Mount form, the Signal Degrade and the distortion that to reduce line, produce are selected in the encapsulation of LC band pass filter as far as possible;
(5) tested ADC chip sampled output signal is adjudicated and is gathered and store into ATE board by ATE digital channel, by software algorithm, carry out measured signal reconstruction and Digital Signal Processing again, calculate the Static and dynamic parameter of tested ADC chip, thereby obtain the measured parameter of tested ADC chip;
When if tested ADC integrated chip needs a plurality of different test sine wave signal frequency, can select the crystal oscillator of a plurality of different operating frequencies as the testing source of its different frequency, the testing source of a plurality of different frequencies carries out switching over as required by relay (Relay);
Described relay option table seals the radio-frequency relay of dress, the Signal Degrade of introducing to reduce relay;
(6) ATE model, the resource distribution of selecting according to tested ADC integrated chip and the crystal oscillator of selecting, filter, relay design test carrier plate (Loadboard), and the crystal oscillator of selecting, filter, relay are welded on test carrier plate (Loadboard); Carrying out test carrier plate (Loadboard) when design, as the crystal oscillator in sampling clock source as far as possible near the clock signal input pin of tested ADC integrated chip;
(7) power pins of tested ADC integrated chip, digital output signal pin and control signal pin are connected with digital channel by the power channel of test carrier plate (Loadboard) and ATE equipment; Programmable power supply passage provides operating voltage for tested ADC integrated chip, digital channel for tested ADC integrated chip provides necessary setting and control signal, digital signal that the sinusoidal wave analog test signal of tested ADC chip is changed to output is sampled, adjudicate and store in ATE board, carry out follow-up Digital Signal Processing obtain required test parameter (due to the output signal of tested ADC chip be with sampling clock frequency into the work clock cycle, by the crystal oscillator operating frequency of selecting, determined; And being master clock by ATE, the operating frequency tested ADC chip signal output being gathered by ATE digital channel determines, two independently clock sources, therefore, it is difficult to Complete Synchronization, causes ATE digital channel to gather ADC chip signal output and makes mistakes because clock jitter produces slip; In order to solve that the output of tested ADC and ATE digital channel gather clock jitter and the problem that produces slip mistake, can make full use of ATE digital channel configurable a plurality of collection along gathering and tested ADC only needs the characteristic of shorter test data collection time window within a clock cycle, can utilize software algorithm to realize synchronously, thereby avoid the slip Problem-Error that may cause because of clock jitter, realize the accurate test to ADC chip parameter).
In method of testing of the present invention, the power supply You Yi road programmable power supply of each road crystal oscillator is powered separately to it, by programming, change the voltage of power supply, can realize the signal output amplitude of corresponding crystal oscillator, no matter as the crystal oscillator in sampling clock source or as the crystal oscillator of testing source, its amplitude output signal can be regulated, arrange and be closed by this kind of mode;
In method of testing of the present invention, when ATE equipment gathers judgement to tested ADC chip digital signal output, by software synchronization algorithm, solve the tested ADC chip sampling clock problems that produce slip mistake different from ATE equipment master clock.
Plug-in crystal oscillator high speed, high resolution ADC chip volume production method of testing based on ATE of the present invention, take full advantage of crystal oscillator output signal and there is low noise, low jitter, high stability, high output signal amplitude, volume is little, be easy to use, the high many-sided advantage of reliability, by rational test carrier plate (Loadboard), design, meet the testing requirement of high speed, high resolution ADC chip, and coordinate the power supply of automatic test equipment (ATE), the test that digital channel resource realizes high speed, high resolution ADC chip (wherein, the output signal that described crystal oscillator produces can be directly as high performance tested ADC chip testing sampling clock, also can coordinate and produce high performance sinusoidal wave ADC Test input signal with filter), this method of testing has that cost is low, volume is little, be easy to the advantages such as control, can be used for pure digi-tal automatic test equipment (ATE) test machine and realizes ADC chip checking and volume production field tests cheaply.
Accompanying drawing explanation
Fig. 1 is for to realize high speed, high resolution ADC volume production method of testing block diagram with crystal oscillator as signal source and clock source based on ATE,
Wherein, the 1st, as the crystal oscillator of testing source, the 2nd, band pass filter, the 3rd, tested ADC integrated chip, the 4th, as the crystal oscillator in sampling clock source, the 5th, automatic test equipment (ATE).
Fig. 2 is the method for testing block diagram of the embodiment of the present invention 2,
Wherein, the 1st, low frequency signal source crystal oscillator, the 2nd, low frequency bandpass filter, the 3rd, test signal selective relay, the 4th, high-frequency signal source crystal oscillator, the 5th, high freguency bandpass filter, the 6th, tested ADC integrated chip, the 7th, sampling clock selective relay, the 8th, low-frequency sampling clock source crystal oscillator, the 9th, high frequency sampling clock crystal oscillator, the 10th, automatic test equipment (ATE).
Embodiment
For understanding better technical scheme of the present invention, below in conjunction with drawings and Examples, be further described.
Embodiment 1
As shown in Figure 1, of the present inventionly based on ATE, with crystal oscillator, as signal source and clock source, realize the test of high speed, high resolution ADC volume production, comprise crystal oscillator (1) as testing source, band pass filter (2), tested ADC integrated chip (3), as crystal oscillator (4) and the automatic test equipment (ATE) (5) in sampling clock source; Output as the crystal oscillator (1) of signal source is connected with the input of band pass filter (2), and the output of signal source crystal oscillator (1) produces test sine wave signal by bandpass filtering, is input to the signal input pin of tested ADC integrated chip (3); Meanwhile, the output as the crystal oscillator (4) in sampling clock source is connected with the clock input pin of tested ADC integrated chip (3); The digital signal output pin that tested ADC integrated chip (3) carries out input analog sine wave signal after analog-to-digital conversion is connected with the digital channel of automatic test equipment (ATE) (5), digital channel by automatic test equipment (ATE) (5) gathers after judgement it, store data in automatic test equipment (ATE) (5), and by automatic test equipment (ATE) (5), completed the computing of testing algorithm, obtain the corresponding test parameter of tested ADC integrated chip (3), thereby complete the test to tested ADC integrated chip (3); In the process of testing, as the crystal oscillator (1) of signal source, provide by automatic test equipment (ATE) (5) as the crystal oscillator (4) in sampling clock source and the power supply of tested ADC integrated chip (3) and control signal, and realize its setting and control by software programming.
Embodiment 2
As shown in Figure 2, the crystal oscillator of low frequency signal source (1) (as 2.5MHz), by low frequency bandpass filter (2) (2.5MHz), produces the low-frequency sine test signal of 2.5MHz, is input to test signal selective relay (3); The crystal oscillator of high-frequency signal source (4) (such as 150MHz), by high freguency bandpass filter (5) (150MHz), produces the high_frequency sine wave test signal of 150MHz, is also input to test signal selective relay (3); If also need more Test input signal, can increase test signal by increasing the mode of crystal oscillator and respective filter; By controlling test signal relay switch, can select different frequency test signal to be input to tested ADC integrated chip (6); If the signal being produced by crystal oscillator and filter does not mate with tested ADC integrated chip (6) input signal list both-end, if the signal being produced by crystal oscillator and filter is single-ended signal, and tested ADC integrated chip (6) is difference input, at the output of relay, also needs to increase a transformer (Transformer) Single-end output signal is converted to the differential input end that differential signal is input to tested ADC integrated chip (6); Low-frequency sampling clock source (8) (such as 10MHz), its output is connected with clock source relay (7) input; High frequency sampling clock source (9) (such as 160MHz), its output is connected with clock source relay (7) input; If also need more sampled clock signal, can increase sampled clock signal by increasing the mode of crystal oscillator; By controlling sampling clock relay switch, can select different frequency sampling clock to be input to tested ADC integrated chip (6); The output of tested ADC integrated chip (6) is connected to the digital channel of automatic test equipment (ATE) (10), digital channel by automatic test equipment (ATE) (10) gathers after judgement it, and store data in automatic test equipment (ATE) (10), complete the computing of testing algorithm, obtain the corresponding test parameter of tested ADC integrated chip (6); As the crystal oscillator (1) of signal source and (3), as the crystal oscillator (8) in sampling clock source and the power supply of (9) provides by automatic test equipment (ATE) (10) and each Lu Douke independently programmes setting; It is also by automatic test equipment (ATE) (10) programming Control that test signal selective relay (3) and sampling clock selective relay (7) switch are selected to arrange, therefore, by automatic test equipment (ATE) (10), arrange, select, just can realize the test parameter under low frequency/high-frequency input signal, low frequency/high frequency sampling different condition of tested ADC integrated chip (6).
The result of above-described embodiment shows, method of testing of the present invention has been utilized the advantage of modules, reasonably avoiding shortcoming is got up with the ATE system integration, formed the high speed high-resolution ADC test macro solution of high-performance, low cost, high stability.
Claims (4)
1. an A-D converter integrated chip volume production method of testing, it is characterized in that, the method adopts respectively high-performance crystal oscillator to provide the employing clock of low jitter and the sinusoidal wave Test input signal at the bottom of low noise for tested high speed, high resolution A-D converter chip, wherein sinusoidal wave Test input signal obtains by crystal oscillator output signal is carried out to bandpass filtering, and providing working power by automatic test equipment programmable power supply module for crystal oscillator, the working power voltage of programming Control crystal oscillator is realized the amplitude of crystal oscillator output sampled clock signal, sinusoidal wave Test input signal and is controlled; By a railway digital passage of automatic test equipment, controlled the Enable/Disenable pin of crystal oscillator, realize the switch of crystal oscillator output signal is controlled;
It comprises step:
(1), according to tested A-D converter integrated chip sample frequency and required jitter performance, select the one or more crystal oscillators that meet tested A-D converter sample frequency and jitter performance as tested A-D converter integrated chip sampling clock source; If desired a plurality of crystal oscillators, as the clock source of tested A-D converter chip, also need to select suitable relay for switching the input clock signal of different crystal oscillators, and the switching controls of relay realizes by the programming of ATE relay passage;
Paster packing forms is selected in the encapsulation of described crystal oscillator, realizes minimum Signal Degrade while being welded on test carrier plate;
(2) when carrying out test carrier plate design, as the crystal oscillator of clock source, near the sampling clock input pin of tested A-D converter chip, place, reduce to walk the noise or signal distortion of introducing in line process and cause jitter performance to worsen;
If when tested A-D converter integrated chip needs a plurality of different sample frequency, select the crystal oscillator of a plurality of different operating frequencies as the clock source of its different frequency, the clock source of a plurality of different frequencies carries out switching over as required by relay;
The sampled clock signal that described relay selects a plurality of crystal oscillators to produce, needs to select radio frequency table to seal dress relay and reduces the Signal Degrade that relay brings;
(3), according to tested A-D converter integrated chip frequency test signal and noiseproof feature requirement, select to meet tested A-D converter Test input signal frequency and the end and make an uproar one or more crystal oscillators of requiring as its testing source; This is as the crystal oscillator of signal source, according to the high order harmonic component of the high performance band pass filter filtering of its operating frequency corresponding selection crystal oscillator generation; When a plurality of crystal oscillators are during as signal source, select suitable relay to switch selection to different input signals, the switching controls of relay realizes by the programming of automatic test equipment relay passage;
Paster packing forms is selected in the encapsulation of described crystal oscillator, to realize minimum Signal Degrade;
(4) crystal oscillator output signal tape splicing bandpass filter, the high order harmonic component signal in filtering crystal oscillator output signal, obtains desirable base band sine wave signal; Described band pass filter is selected from high-order LC filter, and insertion loss wherein compensates by heightening the signal output amplitude of crystal oscillator; The coaxial connection of SMA or Surface Mount form, the Signal Degrade and the distortion that to reduce line, produce are selected in the encapsulation of LC band pass filter;
(5) tested A-D converter chip sampled output signal is adjudicated and is gathered and store into automatic test equipment board by automatic test equipment digital channel, by software algorithm, carry out measured signal reconstruction and Digital Signal Processing again, calculate the Static and dynamic parameter of tested A-D converter chip, obtain the measured parameter of tested A-D converter chip;
When if tested A-D converter integrated chip needs a plurality of different test sine wave signal frequency, select the crystal oscillator of a plurality of different operating frequencies as the testing source of its different frequency, the testing source of a plurality of different frequencies carries out switching over as required by relay;
Described relay option table seals the radio-frequency relay of dress, the Signal Degrade of introducing to reduce relay;
(6) according to tested A-D converter integrated chip, select automatic test equipment model, resource distribution and the crystal oscillator of selecting, filter, relay design test carrier plate, crystal oscillator wherein, filter, relay are welded on test carrier plate; Carrying out test carrier plate when design, the clock signal input pin as the crystal oscillator in sampling clock source near tested A-D converter integrated chip;
(7) by the power channel of test carrier plate and automatic test equipment equipment, be connected power pins, digital output signal pin and the control signal pin of tested A-D converter integrated chip with digital channel; Programmable power supply passage provides operating voltage for tested A-D converter integrated chip, and digital channel provides setting and control signal, the digital signal of the sinusoidal wave analog test signal conversion output of tested A-D converter chip sampled to adjudicate and store into and in automatic test equipment board, carry out follow-up Digital Signal Processing and obtain required test parameter for tested A-D converter integrated chip.
2. A-D converter integrated chip volume production method of testing as claimed in claim 1, it is characterized in that, the power supply You Yi road programmable power supply of each road crystal oscillator is wherein powered separately to it, changes the voltage of power supply by programming, regulates, arranges and close the signal output amplitude of corresponding crystal oscillator; Described crystal oscillator comprises as the crystal oscillator in sampling clock source or as the crystal oscillator of testing source.
3. A-D converter integrated chip volume production method of testing as claimed in claim 1, it is characterized in that, at automatic test equipment, to tested A-D converter chip digital signal, output gathers while adjudicating, and solves the slip mistake of tested A-D converter chip sampling clock and the different generations of automatic test equipment equipment master clock by software synchronization algorithm.
4. method of testing claimed in claim 1 realizes the purposes in A-D converter chip checking and volume production test at pure digi-tal automatic test equipment test machine.
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