CN207198217U - A kind of multifunctional virtual oscillograph based on expansible platform - Google Patents
A kind of multifunctional virtual oscillograph based on expansible platform Download PDFInfo
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- CN207198217U CN207198217U CN201721320114.XU CN201721320114U CN207198217U CN 207198217 U CN207198217 U CN 207198217U CN 201721320114 U CN201721320114 U CN 201721320114U CN 207198217 U CN207198217 U CN 207198217U
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Abstract
The utility model belongs to electronic surveying testing meter and instrument field, propose a kind of multifunctional virtual oscillograph based on expansible platform, including signal conditioning circuit, the controllers of Zynq 7010 and computer, the input of the signal conditioning circuit is connected with signal source, output end is connected with the input of the controllers of Zynq 7010, the output end of the controllers of Zynq 7010 is connected with computer, LabVIEW subscriber interface modules are provided with the computer, for showing the signal of the controllers of Zynq 7010 transmission;The controllers of Zynq 7010 include adc data acquisition module, data fifo buffer module, DMA data transfer module, clock module and FPGA control modules.The utility model is real-time, convenient portable, can be widely applied to the electronic applications such as laboratory.
Description
Technical field
The utility model belongs to electronic surveying testing meter and instrument field, and in particular to a kind of based on the more of expansible platform
Virtualization of function oscillograph.
Background technology
Oscillograph is one of conventional electronic measuring instrument of hyundai electronicses measurement, instrument field, be mainly used to observe,
Various instantaneous and continuous change in electric situations are measured and recorded, and are shown in the form of intuitively, help testing staff
It is best understood from the phenomenon of waveform.The high scan frequency and real-time of traditional analog oscillograph are the advantages of it are very big, but
Frequency is relatively low and aperiodic, helpless in the observation of transition signal.And although digital oscilloscope has certain function to expand
Exhibition, it is but with high costs, and these instrument processing complex process, very high is required to manufacture level, production breakthrough is had any problem.It is and virtual
The development of technical device, it compensate for this short slab of traditional instrument.Virtual instrument technique is developed on the basis of PC technologies
Come, so the advantages of " successions " is using ready-made PC technologies i.e. as the newest commercial technology dominated completely;It is corresponding soft or hard
Part instrument causes us to be no longer limited by current technology, only needs more new computer or measurement hardware, just can be with minimum hard
Part is invested and few software upgrading can improve whole system;In two aspects of driving and application, its efficient software structure
Frame can be combined together with the state-of-the-art technology in terms of computer, instrument and meter and communication;Virtual instrument software platform is all
I/O equipment provides the interface of standard, helps us that multiple measuring apparatus easily are integrated into individual system, reduces task
Complexity.
Utility model content
The utility model overcomes the shortcomings of the prior art, and technical problem to be solved is:There is provided one kind can be without mistake
Very, signal and the multifunctional virtual oscillograph shown are gathered in real time.
In order to solve the above-mentioned technical problem, the technical solution adopted in the utility model is:It is a kind of based on expansible platform
Multifunctional virtual oscillograph, including signal conditioning circuit, Zynq-7010 controllers and computer, the signal conditioning circuit
Input be connected with signal source, output end is connected with the input of Zynq-7010 controllers, the Zynq-7010 controllers
Output end be connected with computer, LabVIEW subscriber interface modules are provided with the computer, for showing the Zynq-
The signal of 7010 controllers transmission;The Zynq-7010 controllers include adc data acquisition module, data fifo buffer module,
DMA data transfer module, clock module and FPGA control modules, input and the signal of the adc data acquisition module
The output end connection of modulate circuit, the input of the output end of the adc data acquisition module and the data fifo buffer module
End connection, the output end of the data fifo buffer module are connected with the output end of the DMA transfer module, the DMA transfer
The output end of module is connected with the computer, and the output end of the FPGA is delayed with the adc data acquisition module, data fifo
Die block is connected with the control terminal of DMA data transfer module, and the clock module is connected with the input of the FPGA, for
The FIFO provides control clock.
The signal conditioning circuit include the first operational amplifier U1, the second operational amplifier U2, resistance R1, resistance R2,
Resistance R3, resistance R4, electric capacity C1, electric capacity C2, the first operational amplifier U1 the first input positive pole connect the first signal source,
First output end is connected with resistance R1 one end, and the resistance R1 other end and the second operational amplifier U2 the first input positive pole connect
Connect, the first output end of the first operational amplifier U1 is connected with the first input negative pole, the first operational amplifier U1's
Second input positive pole connection secondary signal source, the second output end are connected with resistance R3 one end, the resistance R3 other end and second
Operational amplifier U2 the second input positive pole connection, the second output end of the first operational amplifier U1 and the second input negative pole
Connection;
Second operational amplifier U2 first input end is grounded after electric capacity C1, the second operational amplifier U2 the second input
End is grounded after electric capacity C2, and the second operational amplifier U2 the first output end and the second output end is as the signal conditioning circuit
Input of the output respectively with the adc data acquisition module of the Zynq-7010 controllers be connected, the second operational amplifier U2
First input negative pole of first output end through resistance R2 and the second operational amplifier U2 be connected, the of the second operational amplifier U2
Two output ends are connected through resistance R4 with the second operational amplifier U2 the second input negative pole.
The first operational amplifier U1 and the second operational amplifier U2 is LM358 operational amplifiers, resistance R1, resistance
R2, resistance R3 and the capacitance that resistance R4 resistances are 1.6k Ω, the electric capacity C1 and electric capacity C2 are 47nF.
The output end of the Zynq-7010 controllers is communicated to connect by USB module or wireless WiFi module with computer.
The utility model has the advantages that compared with prior art:The utility model proposes a kind of multi-functional void
Intend oscillograph, Zynq-7010 controllers include adc data acquisition module, data fifo buffer module, DMA data transfer mould
Block, clock module and FPGA control modules, can be to signal by the inside adc data acquisition module of Zynq-7010 controllers
Carry out time sharing sampling, it is possible to achieve double channels acquisition, can be to bandwidth 10kHz, the signal in amplitude ± 10V carries out undistorted adopt
Collection, sampling width are 12, realize the function of being shown from signal acquisition to final signal waveform with storage, therefore, this practicality
New multi-functional oscillograph is real-time, convenient portable, the base instant available for the electronic applications staff such as laboratory
This signal is observed.
Brief description of the drawings
Fig. 1 is a kind of structure for multifunctional virtual oscillograph based on expansible platform that the utility model embodiment proposes
Schematic diagram;
Fig. 2 is the circuit connection diagram of signal conditioning circuit in the utility model embodiment.
Embodiment
, below will be to the utility model to make the purpose, technical scheme and advantage of the utility model embodiment clearer
Technical scheme in embodiment is clearly and completely described, it is clear that described embodiment is a part of the present utility model
Embodiment, rather than whole embodiments;Based on the embodiment in the utility model, those of ordinary skill in the art are not making
Go out under the premise of creative work the every other embodiment obtained, belong to the scope of the utility model protection.
As shown in figure 1, the utility model embodiment provides a kind of multifunctional virtual oscillograph based on expansible platform,
Including signal conditioning circuit, Zynq-7010 controllers and computer, input and the signal source of the signal conditioning circuit connect
Connect, output end is connected with the input of Zynq-7010 controllers, and output end and the computer of the Zynq-7010 controllers connect
Connect, LabVIEW subscriber interface modules are provided with the computer, for showing the letter of the Zynq-7010 controllers transmission
Number;The Zynq-7010 controllers include adc data acquisition module, data fifo buffer module, DMA data transfer module, when
Clock module and FPGA control modules, the input of the adc data acquisition module connect with the output end of the signal conditioning circuit
Connect, the output end of the adc data acquisition module is connected with the input of the data fifo buffer module, the data fifo
The output end of buffer module is connected with the output end of the DMA transfer module, output end and the meter of the DMA transfer module
Calculation machine connects, the output end of the FPGA and the adc data acquisition module, data fifo buffer module and DMA data transfer
The control terminal connection of module, the clock module is connected with the input of the FPGA, during for FIFO offer controls
Clock.LabVIEW subscriber interface modules are provided with computer, the collection signal received can be analyzed and processed, are completed
Waveform is shown, characterisitic parameter measures, spectrum analysis is shown, trigger recording, Waveform storage with playback etc. a series of conventional buttons with
Function.
For Zynq-7010 controllers, analog input end is operated if directly invoking built-in function, highest sampling
Frequency can only achieve 50kHz, and only provide single sampling input, and according to Shaimon Sampling Theorem:Sample frequency should not be small
2 times of highest frequency in gathered analog signal frequency spectrum, and in actual signal sampling, merely greater than 2 times of highest frequency, institute
Data signal after sample conversion can not still reduce waveform well, typically require at 10 ~ 20 times.So for double channels acquisition
For, the sample rate of each acquisition channel should be preferably in more than 100kHz, and ADC sampling precisions are 12 inside Zynq-7010,
Analog input end limit sample rate is 500kS/s, it is sufficient to realize sampling request.Therefore, by Zynq-7010 controllers
Data fifo buffer module, DMA data transfer module are set, it is possible to achieve 10kHz double channels acquisition.Wherein, data fifo
The model selection of buffer module is " Target to Host ", FIFO depth are arranged to 10000, so configured to meet bandwidth
10kHz, the collection requirement that sampling width is 12, and resource can be saved.
Further, as shown in Fig. 2 the signal conditioning circuit includes the first operational amplifier U1, the second operation amplifier
Device U2, resistance R1, resistance R2, resistance R3, resistance R4, electric capacity C1, electric capacity C2, the first operational amplifier U1 the first input
Positive pole+INB the first signal sources of connection Input1, the first output end OUTB are connected with resistance R1 one end, the resistance R1 other end
It is connected with the second operational amplifier U2 the first input positive pole+INB, the first output end OUTB of the first operational amplifier U1
It is connected with the first input negative pole-INB, the second input positive pole+INA connection secondary signals source of the first operational amplifier U1
Input2, the second output end OUTA are connected with resistance R3 one end, and the of the resistance R3 other end and the second operational amplifier U2
Two input positive pole+INA connections, the input negative poles of the second output end OUTA of the first operational amplifier U1 and second-INA connect
Connect;Second operational amplifier U2 first input end+INB is grounded after electric capacity C1, the second operational amplifier U2 the second input
End+INA is grounded after electric capacity C2, described in the second operational amplifier U2 the first output end OUTB and the second output end OUTA conduct
Input of the output of signal conditioning circuit respectively with the adc data acquisition module of the Zynq-7010 controllers is connected, and second
Operational amplifier U2 the first output end OUTB is connected through resistance R2 with the second operational amplifier U2 the first input negative pole-INB,
Second input negative pole-INAs of second operational amplifier U2 the second output end OUTA through resistance R4 and the second operational amplifier U2
Connection.
Further, as shown in Fig. 2 the first operational amplifier U1 and the second operational amplifier U2 is LM358 computings
Amplifier, resistance R1, resistance R2, resistance R3 and resistance R4 resistances are 1.6k Ω, and the capacitance of the electric capacity C1 and electric capacity C2 are
47nF.In the present embodiment, filtering is chosen single order RC network and realized, the selection for resistance, according to can survey 0 ~ 10V's of range of signal
Measurement request, amplifier LM358 standard output electric current is 20mA, then resistance should be greater than 500 Ω, but resistance is bigger, then signal stream
Loss through resistance is also bigger, and resistance is chosen as far as possible between 1k Ω to 10k Ω;The selection of electric capacity considers small capacitances to high frequency
Signal capacitive reactance is higher, and the specification of capacitance is less, selects 47nF electric capacity more suitable;Last the present embodiment chooses 1.6k Ω's
Resistance, filtering requirements can be met and ensure that information source input signal is transmitted to next stage without loss as far as possible.
Further, as shown in figure 1, the output end of the Zynq-7010 controllers can pass through USB module or wireless
WiFi module communicates to connect with computer.
Finally it should be noted that:Various embodiments above is only to illustrate the technical solution of the utility model, rather than it is limited
System;Although the utility model is described in detail with reference to foregoing embodiments, one of ordinary skill in the art should
Understand:It can still modify to the technical scheme described in foregoing embodiments, either to which part or whole
Technical characteristic carries out equivalent substitution;And these modifications or replacement, the essence of appropriate technical solution is departed from this practicality newly
The scope of each embodiment technical scheme of type.
Claims (4)
1. a kind of multifunctional virtual oscillograph based on expansible platform, it is characterised in that including signal conditioning circuit, Zynq-
7010 controllers and computer, the input of the signal conditioning circuit are connected with signal source, and output end is controlled with Zynq-7010
The input connection of device processed, the output end of the Zynq-7010 controllers are connected with computer, are provided with the computer
LabVIEW subscriber interface modules, for showing the signal of the Zynq-7010 controllers transmission;
The Zynq-7010 controllers include adc data acquisition module, data fifo buffer module, DMA data transfer module,
Clock module and FPGA control modules, the input of the adc data acquisition module and the output end of the signal conditioning circuit
Connection, the output end of the adc data acquisition module are connected with the input of the data fifo buffer module, the FIFO numbers
Be connected according to the output end of buffer module with the output end of the DMA transfer module, the output end of the DMA transfer module with it is described
Computer connects, and the output end of the FPGA passes with the adc data acquisition module, data fifo buffer module and DMA data
The control terminal connection of defeated module, the clock module are connected with the input of the FPGA, for providing control to the FIFO
Clock.
2. a kind of multifunctional virtual oscillograph based on expansible platform according to claim 1, it is characterised in that described
Signal conditioning circuit includes the first operational amplifier U1, the second operational amplifier U2, resistance R1, resistance R2, resistance R3, resistance
R4, electric capacity C1, electric capacity C2, the first operational amplifier U1 the first input positive pole connect the first signal source, the first output end
It is connected with resistance R1 one end, the resistance R1 other end and the second operational amplifier U2 the first input positive pole are connected, and described the
One operational amplifier U1 the first output end is connected with the first input negative pole, and the second input of the first operational amplifier U1 is just
Pole connection secondary signal source, the second output end are connected with resistance R3 one end, the resistance R3 other end and the second operational amplifier
U2 the second input positive pole connection, the second output end of the first operational amplifier U1 are connected with the second input negative pole;
Second operational amplifier U2 first input end is grounded after electric capacity C1, the second operational amplifier U2 the second input warp
It is grounded after electric capacity C2, the second operational amplifier U2 the first output end and the second output end is as the defeated of the signal conditioning circuit
Go out the input respectively with the adc data acquisition module of the Zynq-7010 controllers to be connected, the of the second operational amplifier U2
One output end is connected through resistance R2 with the second operational amplifier U2 the first input negative pole, and the second of the second operational amplifier U2 is defeated
Go out end to be connected with the second operational amplifier U2 the second input negative pole through resistance R4.
3. a kind of multifunctional virtual oscillograph based on expansible platform according to claim 2, it is characterised in that described
First operational amplifier U1 and the second operational amplifier U2 is LM358 operational amplifiers, resistance R1, resistance R2, resistance R3 and electricity
It is 47nF to hinder the capacitance that R4 resistances are 1.6k Ω, the electric capacity C1 and electric capacity C2.
4. a kind of multifunctional virtual oscillograph based on expansible platform according to claim 1, it is characterised in that described
The output end of Zynq-7010 controllers is communicated to connect by USB module or wireless WiFi module with computer.
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CN201721320114.XU CN207198217U (en) | 2017-10-13 | 2017-10-13 | A kind of multifunctional virtual oscillograph based on expansible platform |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN108918937A (en) * | 2018-09-13 | 2018-11-30 | 北京数采精仪科技有限公司 | A kind of general card oscillograph based on pci interface |
CN109100556A (en) * | 2018-09-13 | 2018-12-28 | 北京数采精仪科技有限公司 | A kind of general card oscillograph of multichannel based on pci interface |
CN110824218A (en) * | 2019-11-18 | 2020-02-21 | 重庆邮电大学 | Digital storage oscilloscope system based on ZYNQ |
-
2017
- 2017-10-13 CN CN201721320114.XU patent/CN207198217U/en active Active
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108918937A (en) * | 2018-09-13 | 2018-11-30 | 北京数采精仪科技有限公司 | A kind of general card oscillograph based on pci interface |
CN109100556A (en) * | 2018-09-13 | 2018-12-28 | 北京数采精仪科技有限公司 | A kind of general card oscillograph of multichannel based on pci interface |
CN109100556B (en) * | 2018-09-13 | 2023-07-14 | 北京数采精仪科技有限公司 | Multi-channel universal oscillographic card and system based on PCI interface |
CN108918937B (en) * | 2018-09-13 | 2023-10-13 | 北京数采精仪科技有限公司 | Universal oscillographic card and system based on PCI interface |
CN110824218A (en) * | 2019-11-18 | 2020-02-21 | 重庆邮电大学 | Digital storage oscilloscope system based on ZYNQ |
CN110824218B (en) * | 2019-11-18 | 2022-03-22 | 重庆邮电大学 | Digital storage oscilloscope system based on ZYNQ |
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