CN103682014A - LED with surface microstructure and manufacturing method thereof - Google Patents
LED with surface microstructure and manufacturing method thereof Download PDFInfo
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- CN103682014A CN103682014A CN201210322627.XA CN201210322627A CN103682014A CN 103682014 A CN103682014 A CN 103682014A CN 201210322627 A CN201210322627 A CN 201210322627A CN 103682014 A CN103682014 A CN 103682014A
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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Abstract
The application provides an LED with a surface microstructure. An embedded microstructure including a first microstructure and a second microstructure prepared on the surface of the first microstructure is prepared on one luminescent side surface of the LED; patterns of the first microstructure are matched with the wire patterns of a metal electrode of the LED and are in micron size; the second microstructure is smaller than the first microstructure in size and is in nanoscale. The application further provides a corresponding preparation method of the LED. According to the invention, not only the current expanding capability but also the light extraction rate of the chip is improved, so that the integral electronic-to-optical conversion efficiency of the chip can be remarkably improved.
Description
Technical field
The present invention relates to light-emitting diode (LED) technical field, specifically, the present invention relates to a kind of LED and manufacture method thereof with surface micro-structure.
Background technology
Light-emitting diode (Light Emitting Diodes, LED) there is the advantages such as electro-optical efficiency is high, energy-saving and environmental protection, the life-span is long, volume is little, make LED-based semiconductor lighting be considered to 21st century and most possibly enter one of a kind of novel solid cold light source in general lighting field and high-technology field most with prospects.
The prerequisite of semiconductor lighting extensive use is to improve its electro-optical efficiency, wherein, improves one of the internal quantum efficiency of nitride LED chip and effective way of the whole electro-optical efficiency that light extraction efficiency is raising LED.The internal quantum efficiency of LED chip depends primarily on quality and the epitaxial structure of epitaxial material, and light extraction efficiency is main relevant with chip structure.Therefore, need to remove to improve from aspects such as material, epitaxial structure, chip surface, side and the back side forms internal quantum efficiency and the light extraction efficiency of LED chip.In addition, surface coarsening is one of effective ways that improve LED light extraction efficiency.
At present, when growing p-type gallium nitride semiconductor layers, by changing growth temperature, in epi-layer surface, form a series of pits centered by dislocation line, thereby reach the effect of surface coarsening.Take by the graph substrate of industry-wide adoption (Patterned Sapphire Substrate, PSS) is example, adopts the epitaxial wafer of PSS substrate growth, and its chip light-emitting efficiency exceeds 20-40% than planar substrate sheet chip.Therefore yet for the epitaxial layer of gallium nitride of growing on graphical sapphire substrate, because crystal mass is better, epitaxy defect is less, be difficult to make the epi-layer surface coarse injustice that becomes by changing growth temperature.This can cause the complicated process of preparation of the epitaxial wafer of PSS substrate growth, controls difficulty large, and cost is high.
On the other hand, improving LED chip electric current injection efficiency is another important channel of improving the whole electro-optical efficiency of LED.For example Chinese patent 200880118412.8 discloses a kind of LED, and it has the current extending being arranged between active layer and n contact site, and this current extending has repeated sequence of layer, and sequence of layer at least has n doped layer, undoped layer and Al
xga
1-xthe layer that N forms, wherein 0<x<1.Al
xga
1-the layer that xN forms has the concentration gradient of Al content, and this LED, with current-dispersing structure, can improve transverse conduction and the electric current vertical transfer performance of electric current, and then improves the whole electro-optical efficiency of LED.Yet what this scheme was mainly considered is the electric current injection efficiency of LED, its light extraction efficiency not be improved significantly, therefore whole electro-optical efficiency need to improve.And adopt MOCVD growth cost high.
In sum, current, cost of manufacture low, processing procedure easily control and electro-optical efficiency high LED and manufacture method thereof simple in the urgent need to a kind of process conditions.
Summary of the invention
For overcoming existing defect, the present invention proposes LED and the manufacture method thereof that a kind of process conditions are simple, cost of manufacture is low, processing procedure is easily controlled and electro-optical efficiency is high.
According to an aspect of the present invention, a kind of light-emitting diode with surface micro-structure has been proposed, wherein, the emission side surface of described light-emitting diode is prepared with inserted micro-structural, described inserted micro-structural comprises the first micro-structural and prepares the second micro-structural at described the first micro-structure surface, the wire pattern of the pattern of described the first micro-structural and the metal electrode of described light-emitting diode matches, and the size of described the second micro-structural is less than described the first micro-structural.
Wherein, the pattern of described the first micro-structural and the metal conductive line pattern of described light-emitting diode interweave, and form netted.
Wherein, described the first micro-structural is micron order micro-structural, and described the second micro-structural is nanoscale micro-structural.
Wherein, described light-emitting diode is positive assembling structure, inverted structure or vertical stratification.
Wherein, described light-emitting diode comprises: resilient coating, the first type semiconductor layer, quantum well active layer, Second-Type semiconductor layer, transparent current extending and the metal electrode in Sapphire Substrate, Sapphire Substrate, prepared successively, the chip the superiors deposit passivation protection layer.
Wherein, the described first micro-structural preparation of described inserted micro-structural is at described transparent current extending.
Wherein, the described first micro-structural preparation of described inserted micro-structural is in described Second-Type semiconductor layer surface, described transparent current extending is prepared on described Second-Type semiconductor layer and its surface has first micro-structural consistent with described Second-Type semiconductor layer surface shape, and the described second micro-structural preparation of described inserted micro-structural is at the first micro-structure surface of described transparent current extending.
Wherein, described Second-Type semiconductor layer is p-GaN layer or n-GaN layer.
Wherein, described the first micro-structural is near quantum well one side, and described the second micro-structural is near light output surface one side.
Wherein, described transparent conductive film is ITO, or ZnO, RuOx or the IrOx film of the doping of the 3rd major element.
Wherein, described transparent conductive film thickness changes according to lambda1-wavelength and film refractive index, and film thickness is
in formula, λ is lambda1-wavelength, and n is the refractive index of I TO film, and m is integer, and t is the thickness of ito thin film.
Wherein, described passivation protection layer material is SiO
2film or SiN
xmask.
Wherein, described the second microstructure size and cycle are less than λ/n, and wherein, λ is lumination of light emitting diode dominant wavelength, and n is the thin-film refractive index of carrying micro-structural.
According to a further aspect in the invention, proposed a kind of preparation method with the light-emitting diode of surface micro-structure, comprised the following steps:
1) prepare the light-emitting diode of surface smoothing;
2) on the emission side surface of the prepared described light-emitting diode of step 1), be prepared with inserted micro-structural, described inserted micro-structural comprises the first micro-structural and prepares the second micro-structural at described the first micro-structure surface, the wire pattern of the pattern of described the first micro-structural and the metal electrode of described light-emitting diode matches, and the size of described the second micro-structural is less than described the first micro-structural.
Wherein, described step 2) in, described the first micro-structural is prepared by the method for photo etched mask.
Wherein, in the method for described photo etched mask, adopt dry etching to form micro-structural, or adopt wet etching to form micro-structural.
Wherein, described step 2) in, described the second micro-structural is prepared by the method for nanocluster mask.
Wherein, in the method for described nanocluster mask, adopt dry etching to form micro-structural, or adopt wet etching to form micro-structural.
Wherein, in the method for described nanocluster mask, nanocluster is the organic film that solution spin-coating method forms, or the nanoscale thin-layer metal membrane prepared of thin film deposition mode.
Compared with prior art, the present invention has following technique effect:
1, the present invention can either improve the current expansion ability of chip, can promote again the light extraction efficiency of chip, therefore can significantly improve the whole electro-optical efficiency of chip.
2, process conditions of the present invention are simple, cost of manufacture is low, processing procedure is easily controlled.
Accompanying drawing explanation
Fig. 1 is the forward LED chip structure profile (not comprising passivation layer) that adopts the embodiment of the present invention one method to make, and forms the first micron order and two kinds of inserted micro-structurals of the second nanoscale on the transparent current extending of its p-type semiconductor surface;
Fig. 2 is the packed LED chip generalized section (not comprising passivation layer) that adopts the embodiment of the present invention two preparations;
Fig. 3 is the vertical or inverted structure LED chip generalized section that adopts the embodiment of the present invention three to make;
Fig. 4 a is chip surface schematic diagram during without micro-structural, and Fig. 4 b is chip surface schematic diagram while having prepared the first micron order conductive micro structures.
Fig. 5 a ~ figure c shows respectively the pattern vertical view of inserted micro-structural chip surface subregion as shown in Figure 4 b;
Wherein, 100: epitaxial loayer substrate; 101: gallium nitride low temperature buffer layer; 102:n type gallium nitride semiconductor layers; 103: Multiple Quantum Well active layer; 104:p type gallium nitride semiconductor layers; 105: transparent current extending; 106:p type metal electrode weld pad; 107:n type metal electrode weld pad; 200: support substrates; 201: metallic reflector; 202: substrate tack coat; 203: the first semiconductor layers; 204: Multiple Quantum Well active layer; 205: the second semiconductor layers; 206: metal electrode weld pad.
Embodiment
Below in conjunction with the drawings and specific embodiments, describe the present invention.
Embodiment mono-
According to one embodiment of present invention, provide a kind of manufacture method with the LED of surface micro-structure, the method comprises the following steps:
(1) first adopt the method for metallochemistry vapour deposition (MOCVD) in Sapphire Substrate, to deposit successively resilient coating, n-GaN layer, quantum well layer, P-InGaN electronic barrier layer, P-GaN epitaxial loayer, form complete LED P N junction structure;
(2) adopt alloying furnace to carry out annealing in process to the complete epitaxial wafer of growing, mainly excite the Mg doping acceptor of p-GaN epitaxial loayer;
(3) behind the method processing epitaxial wafer surface that adopts chemical reagent to clean, carry out step etching, expose n-GaN layer;
(4) use thin film evaporation equipment at epitaxial wafer surface evaporation one deck ITO transparent conductive film, its thickness changes according to lambda1-wavelength and ITO refractive index, can determine by following formula:
In formula, λ is lambda1-wavelength, and n is the refractive index of I TO film, and m is integer, and t is the thickness of ito thin film.
(5) prepare nested surface micro-structure, its preparation process is as follows:
First, preparation the first micro-structural-micron order figure, comprises following sub-step:
The first step: adopt conventional photoetching method to prepare the figure designing in reticle on ITO surface, and photoresist is carried out to solidifying of 100 ° of C, 30min;
Second step: with the method corrosion epitaxial wafer of wet etching, corrosion is the mixed solution of FCl3:HCl with solution, and temperature is 40 ° of C, and the time is 30s;
The 3rd step: wash away the photoresist on epitaxial wafer surface with the special-purpose liquid that removes photoresist, obtain the first micro-structural-micron order figure;
Then, preparation the second micro-structural-nanoscale optical waveguide layer, comprises following sub-step:
The first step: adopt the method for spin coating that particle size is spin-coated on to the epitaxial wafer surface having prepared, have the first micro-structural at the spin coating liquid of 100-300nm;
Second step: the epitaxial wafer that has applied spin coating liquid is lain in to the baking of hot plate surface, and baking temperature is 200 ° of C, and the time is 30min;
The 3rd step: adopt plasma etching machine (ICP etching machine), epitaxial wafer is carried out to dry etching;
The 4th step: wash away the remaining mask coating on epitaxial wafer surface with special solution, obtain the second micro-structural-nano-scale pattern;
(6) at 450 ℃ of high temperature and N
2under atmosphere, ITO is annealed, annealing time is 30 minutes;
(7) prepare metal electrode, utilize negative photoresist thering is the epitaxial wafer surface preparation metal electrode pattern of nested micro-structural, and on electron beam evaporation equipment, complete electrode evaporation;
(8) at 400 ℃ of high temperature and N
2under atmosphere, metal electrode is carried out to alloying, annealing time is 30 minutes;
(9) use method (PECVD) deposit passivation layer of plasma enhanced chemical vapor deposition and by photoetching, etching process, remove the passivation layer on PAD surface.
Fig. 1 shows the generalized section (not comprising passivation layer) that adopts the prepared LED with surface micro-structure of said method, and it has adopted forward LED chip structure.As shown in Figure 1, this LED comprises from the bottom to top successively: epitaxial loayer substrate 100, gallium nitride low temperature buffer layer 101, N-shaped gallium nitride semiconductor layers 102, Multiple Quantum Well active layer 103, p-type gallium nitride semiconductor layers 104, transparent current extending 105.
Wherein, transparent current extending is prepared with p-type metal electrode weld pad 106 on 105 surfaces, is prepared with N-shaped metal electrode weld pad 107 on the surface of the exposed part of N-shaped gallium nitride semiconductor layers 102.
In the present embodiment, on the transparent current extending of p-type semiconductor surface, form the first micron order and two kinds of micro-structurals of the second nanoscale.Wherein, the second nanoscale micro-structural is directly prepared on the surface of the first micron order micro-structural place layer, therefore the combination of the first micron order and two kinds of micro-structurals of the second nanoscale can be called to inserted micro-structural.The second nanoscale microstructure size and cycle are less than λ/n, and wherein, λ is lumination of light emitting diode dominant wavelength, and n is the thin-film refractive index of carrying micro-structural.
For ease of understanding, chip surface schematic diagram when Fig. 4 (a) shows without micro-structural, Fig. 4 (b) shows chip surface schematic diagram while having prepared the first micron order conductive micro structures (i.e. the first micron order micro-structural), Fig. 5 (a) ~ (c) show shape appearance figure of inserted micro-structural chip surface subregion (as shown in Figure 4 b); Above three figure are vertical view, can find out the micro structured pattern of chip surface.Limited by figure display effect, in this patent document, do not show inserted surface micro-structure chip whole structure figure, but the mode of amplifying with regionality represents.
With reference to figure 5(a) to (c), can find out, the first micron order conductive micro structures pattern form and chip plain conductor match, and the two is interweaved, and forms netted.Can strengthen the extending transversely of electric current like this, make the distribution of current density more even, thereby improve current spread and injectability.And nano-array pattern (the second micro-structural) is distributed on micrometre array figure surrounding and figure thereof naturally, like this, the light that nano-grade size figure is launched quantum well active layer is more derived chip structure.Therefore, adopt the process of the inserted micro-structural of above-mentioned two kinds of difformities and size, to improving high-power chip electric current injection efficiency and luminous efficiency, there is positive effect, thereby significantly improved the electro-optical efficiency of chip integral body.And the technological process of this inserted micro-structural is simple, cost of manufacture is low, processing procedure is easily controlled.
Embodiment bis-
According to another embodiment of the invention, provide a kind of manufacture method with the LED of surface micro-structure, the method comprises the following steps:
(1) first adopt the method for metallochemistry vapour deposition (MOCVD) in Sapphire Substrate, to deposit successively resilient coating, n-GaN, quantum well, P-InGaN electronic barrier layer, P-GaN epitaxial loayer, form complete LED P N junction structure;
(2) adopt alloying furnace to carry out annealing in process to the complete epitaxial wafer of growing, excite the Mg doping acceptor of p-GaN;
(3) behind the method processing epitaxial wafer surface that adopts chemical reagent to clean, carry out step etching, expose n-GaN;
(4) at p-GaN surface preparation the first micro-structural-micron order figure;
First, preparation the first micro-structural, its step is as follows:
The first step: adopt conventional photoetching method to prepare the figure designing in reticle on p-GaN surface, and photoresist is carried out to solidifying of 100 ° of C, 30min;
Second step: figure is transferred to p-GaN substrate surface by dry plasma etch method;
The 3rd step: wash away the photoresist on epitaxial wafer surface with the special-purpose liquid that removes photoresist, obtain the first micro-structural-micron order figure;
(5) use thin film evaporation equipment at epitaxial wafer surface evaporation one deck ITO transparent conductive film, its thickness changes according to lambda1-wavelength and ITO refractive index, can determine by following formula:
In formula, λ is lambda1-wavelength, and n is the refractive index of ito thin film, and m is integer, and t is the thickness of ito thin film.
(6) in ito thin film surface preparation the second nanoscale micro-structural, its step is as follows:
The first step: adopt the method for spin coating that particle size is spin-coated on to the epitaxial wafer surface that prepares the first micron order micro-structural at the spin coating liquid of 100-300nm;
Second step: the epitaxial wafer that has applied spin coating liquid is lain in to the baking of hot plate surface, and baking temperature is 200 ° of C, and the time is 30min;
The 3rd step: adopt the method corrosion n-GaN surface of wet etching, corrosion is the potassium hydroxide solution with melting with solution, and design temperature is 60-100 ° of C, and the time is 5min;
The 4th step: wash away the remaining mask coating on epitaxial wafer surface with special solution, obtain the second microstructure graph;
(7) ito thin film is carried out to photoetching, prepare current extending consistent with MESA shape, the little 5-10um of size; Wherein, further, this place's step (6) and step (7) can swap operation sequentially;
(8) at 450 ℃ of high temperature and N
2under atmosphere, ITO is annealed, annealing time is 30 minutes;
(9) prepare metal electrode, utilize negative photoresist thering is the epitaxial wafer surface preparation metal electrode pattern of nested micro-structural, and on electron beam evaporation equipment, complete electrode evaporation;
(10) at 400 ℃ of high temperature and N
2under atmosphere, metal electrode is carried out to alloying, annealing time is 30 minutes;
(11) use PECVD equipment deposit passivation layer and by photoetching, etching process, remove the passivation layer on PAD surface.
Fig. 2 shows the generalized section (not comprising passivation layer) that adopts the prepared LED with surface micro-structure of the present embodiment method, it has adopted forward LED chip structure, the first micro-structural preparation is at p-type semiconductor layer, and the second nanoscale micro-structural preparation is on the transparent current extending of p-type semiconductor layer surface.
As shown in Figure 2, this LED comprises from the bottom to top successively: epitaxial loayer substrate 100, gallium nitride low temperature buffer layer 101, N-shaped gallium nitride semiconductor layers 102, Multiple Quantum Well active layer 103, p-type gallium nitride semiconductor layers 104, transparent current extending 105 and, wherein on transparent current extending 105 surfaces, be prepared with p-type metal electrode weld pad 106, on the surface of the exposed part of N-shaped gallium nitride semiconductor layers 102, be prepared with N-shaped metal electrode weld pad 107.In the present embodiment, the first micro-structural preparation is at p-type semiconductor layer, and the second nanoscale micro-structural preparation is on the transparent current extending of p-type semiconductor layer surface.
The pattern of the inserted micro-structural of the present embodiment can be consistent with embodiment mono-, repeats no more herein.
Embodiment tri-
According to still another embodiment of the invention, provide a kind of manufacture method with the LED of surface micro-structure, the method comprises the following steps:
(1) first adopt the method for metallochemistry vapour deposition (MOCVD) in Sapphire Substrate, to deposit successively resilient coating, n-GaN, quantum well, P-InGaN electronic barrier layer, P-GaN epitaxial loayer, form complete LED P N junction structure;
(2) adopt alloying furnace to carry out annealing in process to the complete epitaxial wafer of growing, excite the Mg doping acceptor of p-GaN;
(3) behind the method processing epitaxial wafer surface that adopts chemical reagent to clean, carry out step etching, expose n-GaN;
(4) at p-type floor and exposed n-GaN district, prepare metal electrode respectively;
(5) at 400 ℃ of high temperature and N
2under atmosphere, metal electrode is carried out to ohmic contact alloy, annealing time is 30 minutes;
(6) prepare a heat-radiating substrate, on substrate, have and have successively metal adhesion layer, metallic reflector, ohmic contact layer; On described ohmic contact layer, be provided with metal salient point array;
(7) epitaxial wafer with metal electrode is upside down on heat-radiating substrate by upside-down mounting pressurization, ultrasonic bond technique;
(8) remove growth substrates, substrate desquamation method can be the methods such as laser lift-off, chemical corrosion;
(9) prepare nested surface micro-structure, its preparation method and step are as follows:
First, preparation the first micron order micro-structural, its step is as follows:
The first step: adopt conventional photoetching method to prepare the figure designing in reticle on n-GaN surface, and photoresist is carried out to solidifying of 100 ° of C, 30min;
Second step: figure is transferred to n-GaN substrate surface by dry plasma etch method;
The 3rd step: wash away the photoresist on epitaxial wafer surface with the special-purpose liquid that removes photoresist, obtain ground floor micrometre-grade pattern;
Then, preparation the second micro-structural-nanoscale optical waveguide layer, its step is as follows:
The first step: adopt the method for spin coating that particle size is spin-coated on to the epitaxial wafer surface that prepares the first micro-structural at the spin coating liquid of 100-300nm;
Second step: the epitaxial wafer that has applied spin coating liquid is lain in to the baking of hot plate surface, and baking temperature is 200 ° of C, and the time is 30min;
The 3rd step: adopt the method corrosion n-GaN surface of wet etching, corrosion is the potassium hydroxide solution with melting with solution, and design temperature is 60-100 ° of C, and the time is 5min;
The 4th step: wash away the remaining mask coating on epitaxial wafer surface with special solution, obtain the second micro-structural;
(10) prepare chip passivation layer.
Fig. 3 shows the generalized section (not comprising passivation layer) that adopts the prepared LED with surface micro-structure of the present embodiment method, it is vertical or inverted structure LED chip generalized section, inserted micro-structural is prepared respectively on the p-type semiconductor layer or transparent current extending of vertical chip, or preparation is on the N-shaped semiconductor layer of inverted structure chip.
As shown in Figure 3, this LED comprises from the bottom to top successively: support substrates 200, metallic reflector 201, substrate tack coat 202, the first semiconductor layer 203, Multiple Quantum Well active layer 204, the second semiconductor layer 205 and metal electrode weld pad 206.For vertical chip, inserted micro-structural preparation is on p-type semiconductor layer or transparent current extending, and for inverted structure chip, inserted micro-structural preparation is on N-shaped semiconductor layer.
The pattern of the inserted micro-structural of the present embodiment can be consistent with embodiment mono-, repeats no more herein.
It should be noted that, in above-mentioned three embodiment, nanoscale micro-structural is to prepare by the method for nanocluster mask, wherein nanocluster is except adopting the organic film of solution spin-coating method formation, also can be nanoscale thin-layer metal membrane prepared by the thin film deposition modes such as electron beam, such as Ag, can utilize the three-dimensional island micro-structural of film forming initial stage formation as the mask layer of preparing nano-micro structure.
Finally it should be noted that, above embodiment is only in order to describe technical scheme of the present invention rather than this technical method is limited, the present invention can extend to other modification, variation, application and embodiment in application, and therefore thinks that all such modifications, variation, application, embodiment are in spirit of the present invention and teachings.
Claims (19)
1. a light-emitting diode with surface micro-structure, it is characterized in that, the surface of described lumination of light emitting diode one side is prepared with inserted micro-structural, described inserted micro-structural comprises the first micro-structural and prepares the second micro-structural at described the first micro-structure surface, the wire pattern of the pattern of described the first micro-structural and the metal electrode of described light-emitting diode matches, and the size of described the second micro-structural is less than described the first micro-structural.
2. the light-emitting diode with surface micro-structure according to claim 1, is characterized in that, the pattern of described the first micro-structural and the metal conductive line pattern of described light-emitting diode interweave, and form netted.
3. the light-emitting diode with surface micro-structure according to claim 1, is characterized in that, described the first micro-structural is micron order micro-structural, and described the second micro-structural is nanoscale micro-structural.
4. the light-emitting diode with surface micro-structure according to claim 1, is characterized in that, described light-emitting diode is positive assembling structure, inverted structure or vertical stratification.
5. the light-emitting diode with surface micro-structure according to claim 1; it is characterized in that; described light-emitting diode comprises: resilient coating, the first type semiconductor layer, quantum well active layer, Second-Type semiconductor layer, transparent current extending and the metal electrode in Sapphire Substrate, Sapphire Substrate, prepared successively, the chip the superiors deposit passivation protection layer.
6. the light-emitting diode with surface micro-structure according to claim 5, is characterized in that, the described first micro-structural preparation of described inserted micro-structural is at described transparent current extending.
7. the light-emitting diode with surface micro-structure according to claim 5, it is characterized in that, the described first micro-structural preparation of described inserted micro-structural is in described Second-Type semiconductor layer surface, described transparent current extending is prepared on described Second-Type semiconductor layer and its surface has first micro-structural consistent with described Second-Type semiconductor layer surface shape, and the described second micro-structural preparation of described inserted micro-structural is at the first micro-structure surface of described transparent current extending.
8. the light-emitting diode with surface micro-structure according to claim 5, is characterized in that, described Second-Type semiconductor layer is p-GaN layer or n-GaN layer.
9. the light-emitting diode with surface micro-structure according to claim 1, is characterized in that, described the first micro-structural is near quantum well one side, and described the second micro-structural is near light output surface one side.
10. the light-emitting diode with surface micro-structure according to claim 5, is characterized in that, described transparent conductive film is ITO, or ZnO, RuOx or the IrOx film of the doping of the 3rd major element.
11. light-emitting diodes with surface micro-structure according to claim 10, is characterized in that, described transparent conductive film thickness changes according to lambda1-wavelength and film refractive index, and film thickness is
in formula, λ is lambda1-wavelength, and n is the refractive index of I TO film, and m is integer, and t is the thickness of ito thin film.
12. light-emitting diodes with surface micro-structure according to claim 5, is characterized in that, described passivation protection layer material is SiO
2film or SiN
xmask.
13. light-emitting diodes with surface micro-structure according to claim 1, is characterized in that, described the second microstructure size and cycle are less than λ/n, and wherein, λ is lumination of light emitting diode dominant wavelength, and n is the thin-film refractive index of carrying micro-structural.
14. 1 kinds of preparation methods with the light-emitting diode of surface micro-structure, is characterized in that, comprise the following steps:
1) prepare the light-emitting diode of surface smoothing;
2) on the emission side surface of the prepared described light-emitting diode of step 1), be prepared with inserted micro-structural, described inserted micro-structural comprises the first micro-structural and prepares the second micro-structural at described the first micro-structure surface, the wire pattern of the pattern of described the first micro-structural and the metal electrode of described light-emitting diode matches, and the size of described the second micro-structural is less than described the first micro-structural.
15. preparation methods with the light-emitting diode of surface micro-structure according to claim 14, is characterized in that described step 2) in, described the first micro-structural is prepared by the method for photo etched mask.
16. preparation methods with the light-emitting diode of surface micro-structure according to claim 15, is characterized in that, adopt dry etching to form micro-structural in the method for described photo etched mask, or adopt wet etching to form micro-structural.
17. preparation methods with the light-emitting diode of surface micro-structure according to claim 14, is characterized in that described step 2) in, described the second micro-structural is prepared by the method for nanocluster mask.
18. preparation methods with the light-emitting diode of surface micro-structure according to claim 17, is characterized in that, adopt dry etching to form micro-structural in the method for described nanocluster mask, or adopt wet etching to form micro-structural.
19. preparation methods with the light-emitting diode of surface micro-structure according to claim 17, it is characterized in that, in the method for described nanocluster mask, nanocluster is the organic film that solution spin-coating method forms, or the nanoscale thin-layer metal membrane prepared of thin film deposition mode.
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| CN110459658A (en) * | 2018-05-08 | 2019-11-15 | 山东浪潮华光光电子股份有限公司 | A kind of UV LED chip of p-type GaN layer and preparation method thereof |
| CN112018223A (en) * | 2020-08-28 | 2020-12-01 | 武汉大学 | Thin film flip structure Micro-LED chip with transfer printing of bonding layer and preparation method thereof |
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