CN103618023B - A kind of high square resistance diffusion technology - Google Patents
A kind of high square resistance diffusion technology Download PDFInfo
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- CN103618023B CN103618023B CN201310491156.XA CN201310491156A CN103618023B CN 103618023 B CN103618023 B CN 103618023B CN 201310491156 A CN201310491156 A CN 201310491156A CN 103618023 B CN103618023 B CN 103618023B
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- 238000009792 diffusion process Methods 0.000 title claims abstract description 32
- 238000005516 engineering process Methods 0.000 title claims abstract description 19
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 72
- 238000000151 deposition Methods 0.000 claims abstract description 36
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 36
- 230000008021 deposition Effects 0.000 claims abstract description 26
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 17
- 239000010703 silicon Substances 0.000 claims abstract description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 10
- 239000001301 oxygen Substances 0.000 claims abstract description 10
- 238000001816 cooling Methods 0.000 claims abstract description 8
- 230000006641 stabilisation Effects 0.000 claims abstract description 6
- 238000011105 stabilization Methods 0.000 claims abstract description 6
- 238000010438 heat treatment Methods 0.000 claims abstract description 5
- 239000000523 sample Substances 0.000 claims abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 239000002184 metal Substances 0.000 description 8
- 238000000034 method Methods 0.000 description 5
- 125000004437 phosphorous atom Chemical group 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 235000008216 herbs Nutrition 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 210000002268 wool Anatomy 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2225—Diffusion sources
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a kind of high square resistance diffusion technology, comprise that low temperature enters boat, low-temperature stabilization, intensification limit, limit deposition, high temperature deposition, high temperature advances, cooling limit, limit advances, low temperature depositing and low temperature go out boat step, wherein: intensification limit, limit deposition step: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, control furnace tube temperature≤830 DEG C, heating rate≤1 DEG C/min; Cooling limit, limit forward step: pass into nitrogen 10L/min, controls furnace tube temperature≤810 DEG C, heating rate >=10 DEG C/min.Adopt the square resistance of the rear silicon chip of four point probe test diffusion, mean value is 95 Ω/sq.The advantage that traditional structure battery diffusion technology contact resistance is low and SE structure battery diffusion technology short wave response is good that the present invention is compatible, not only increases battery conversion efficiency, and low cost of manufacture.
Description
Technical field
The invention belongs to solar cell manufacturing technology field day labor skill, be specifically related to a kind of high square resistance diffusion technology.
Background technology
Solar cell is a kind of is directly the device of electric energy by light energy conversion based on photovoltaic effect.The typical process flow of traditional structure solar cell comprises making herbs into wool, diffusion, back-etching, nitride deposition, silk screen printing, sintering.Typical commercial type solar cell has good electrode contact performance to ensure between the front metal gate electrode of silk screen printing and emitter, emitter needs higher surface dopant concentration, square resistance general control after diffusion is ohms per square in 60 ~ 80 Ω/sq(units), but the phosphorus-diffused layer of higher-doped concentration can cause blue light absorption loss and photo-generated carrier surface recombination loss again, is unfavorable for the raising realizing conversion efficiency.Selective emitter (
selective
emitter, is called for short SE) structure is the effective technology overcoming above-mentioned difficulties.Basic structure and the conventional solar cell of selective emitter solar battery are similar, but need to form highly doped dark diffusion region to front metal gate electrode and silicon chip contact site, and other regions between metal gate electrode form low-doped shallow diffusion region, the square resistance general control of low-doped shallow diffusion region is at 90 ~ 120 Ω/sq.Such structure can reduce the diffusion layer compound in region between front metal gate electrode, improve the short wave response of solar cell, front metal gate electrode simultaneously in minimizing diffusion layer and the contact resistance of silicon face emitter, short circuit current, open circuit voltage, fill factor, curve factor are all improved, thus improves conversion efficiency.But the key realizing selective emitting electrode structure is the region how making two different levels of doping.Which increase technological difficulties, also improve manufacturing cost.
Therefore, if on traditional structure battery structure basis, the advantage of the square resistance of the low-doped shallow diffusion region of SE structure battery can be realized, not only do not significantly improve the contact resistance of front metal gate electrode and silicon face emitter, and the short wave response of solar cell can also be improved, so can improve battery conversion efficiency, and can manufacturing cost be controlled again.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of high square resistance diffusion technology, the advantage that its compatibility traditional structure battery diffusion technology contact resistance is low and SE structure battery diffusion technology short wave response is good, not only increase battery conversion efficiency, and low cost of manufacture.
The technical scheme that technical solution problem of the present invention adopts is: a kind of high square resistance diffusion technology, it is characterized in that, comprise that low temperature enters boat, low-temperature stabilization, intensification limit, limit deposition, high temperature deposition, high temperature advances, cooling limit, limit advances, low temperature depositing and low temperature go out boat step, wherein:
(1) low temperature enters boat: silicon chip is put into diffusion furnace, and arranging furnace tube temperature is 790 DEG C, and passes into nitrogen 6 ~ 12L/min;
(2) low-temperature stabilization: pass into nitrogen 6 ~ 12L/min after entering boat, controls furnace tube temperature≤790 DEG C;
(3) limit intensification limit deposition: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, control furnace tube temperature≤830 DEG C, heating rate≤1 DEG C/min;
(4) high temperature deposition: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, control furnace tube temperature≤830 DEG C, the time is 2 minutes;
(5) high temperature advances: pass into nitrogen 10L/min, and control furnace tube temperature≤830 DEG C, the time is 1 minute;
(6) cooling limit in limit advances: pass into nitrogen 10L/min, controls furnace tube temperature≤810 DEG C, rate of temperature fall >=10 DEG C/min;
(7) low temperature depositing: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, control furnace tube temperature≤810 DEG C, the time is 10 minutes;
(8) low temperature goes out boat: pass into nitrogen 6 ~ 12L/min, controls furnace tube temperature≤790 DEG C; Adopt the square resistance of the rear silicon chip of four point probe test diffusion, the mean value of square resistance is 95 Ω/sq.
Preferred as one, the time on intensification limit deposition step, described limit (3) is longer than the time of high temperature deposition step (4).
Low temperature of the present invention enters boat step (1) and low temperature and goes out boat step (8) and be all controlled in 5 ~ 10 minutes; And the time of the time on intensification limit, limit deposition step (3) and low temperature depositing step (7) is all longer than the time of high temperature deposition step (4).
The invention has the beneficial effects as follows: the temperature of high temperature deposition step (4) is no more than 830 degrees Celsius, and high-temperature time is of short duration, the formation of diffused sheet resistance completes mainly through the low temperature depositing step (7) after the front intensification limit, limit deposition step (3) of high temperature deposition step (4) and high temperature deposition step (4), can keep the life-span that silicon chip is originally good like this; High temperature forward step (5), cooling limit, limit forward step (6) is had after high temperature deposition step (4), this makes the nonactive phosphorus atoms in silicon chip surface progressively activate, namely the phosphorus atoms that instead type form exists increases, reduce recombination-rate surface, thus improve the short wave response of solar cell; Low temperature depositing step (7) has been carried out after propelling, owing to being low temperature depositing, again nonactive phosphorus atoms can not be formed in a large number at silicon chip surface, and the phosphorus atoms that the contact resistance just forming front metal gate electrode and silicon face emitter is necessary, so just do not significantly improve the contact resistance of front metal gate electrode and silicon face emitter.
Embodiment
A kind of high square resistance diffusion technology, comprises the steps:
(1) low temperature enters boat: silicon chip is put into diffusion furnace, and arranging furnace tube temperature is 790 DEG C, and passes into nitrogen 10L/min;
(2) low-temperature stabilization: pass into nitrogen 10L/min, furnace tube temperature 790 DEG C;
(3) limit intensification limit deposition: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, furnace tube temperature 830 DEG C, heating rate 1 DEG C/min is set;
(4) high temperature deposition: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, furnace tube temperature 830 DEG C, setup times is 2 minutes;
(5) high temperature advances: pass into nitrogen 10L/min, furnace tube temperature 830 DEG C, setup times is 1 minute;
(6) cooling limit in limit advances: pass into nitrogen 10L/min, furnace tube temperature 810 DEG C, arrange rate of temperature fall 10 DEG C/min;
(7) low temperature depositing: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, furnace tube temperature 810 DEG C, setup times is 10 minutes;
(8) low temperature goes out boat: pass into nitrogen 10L/min, furnace tube temperature 790 DEG C, and adopt the square resistance of the rear silicon chip of four point probe test diffusion, the mean value of square resistance is 95 Ω/sq.
The diffused sheet resistance mean value that existing diffuse normal technique obtains is 75 Ω/sq, the square resistance mean value of the silicon chip four point probe test adopting the present invention to make is 95 Ω/sq, prepare solar cell after silicon chip after above-mentioned diffusion is carried out back-etching, nitride deposition, silk screen printing, sintering, unit for electrical property parameters is as shown in the table:
Grouping | Open circuit voltage (V) | Short-circuit voltage (V) | Series resistance (Ω) | Parallel resistance (Ω) | Fill factor, curve factor (﹪) | Battery efficiency (﹪) |
Diffuse normal technique, 75 Ω/sq | 0.6297 | 8.715 | 0.0031 | 816 | 78.156 | 17.627 |
Height side organizes diffusion technology, 95 Ω/sq | 0.6322 | 8.757 | 0.0034 | 680 | 77.819 | 17.704 |
Height side's group diffusion technology and diffuse normal technique difference | 0.0025 | 0.041 | 0.0003 | -136 | -0.337 | 0.077 |
As can be seen from the table, the battery efficiency that the battery efficiency of high square resistance diffusion technology compares diffuse normal technique improves 0.08%, and series resistance (Rs) and fill factor, curve factor are not decreased significantly.
Claims (2)
1. a high square resistance diffusion technology, is characterized in that, comprises that low temperature enters boat, low-temperature stabilization, intensification limit, limit deposition, high temperature deposition, high temperature advances, cooling limit, limit advances, low temperature depositing and low temperature go out boat step, wherein:
(1) low temperature enters boat: silicon chip is put into diffusion furnace, and arranging furnace tube temperature is 790 DEG C, and passes into nitrogen 6 ~ 12L/min;
(2) low-temperature stabilization: pass into nitrogen 6 ~ 12L/min after entering boat, controls furnace tube temperature≤790 DEG C;
(3) limit intensification limit deposition: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, control furnace tube temperature≤830 DEG C, heating rate≤1 DEG C/min;
(4) high temperature deposition: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, control furnace tube temperature≤830 DEG C, the time is 2 minutes;
(5) high temperature advances: pass into nitrogen 10L/min, and control furnace tube temperature≤830 DEG C, the time is 1 minute;
(6) cooling limit in limit advances: pass into nitrogen 10L/min, controls furnace tube temperature≤810 DEG C, rate of temperature fall >=10 DEG C/min;
(7) low temperature depositing: pass into nitrogen 10L/min, oxygen 400ml/min, carry the nitrogen 900ml/min of phosphorus oxychloride, control furnace tube temperature≤810 DEG C, the time is 10 minutes;
(8) low temperature goes out boat: pass into nitrogen 6 ~ 12L/min, controls furnace tube temperature≤790 DEG C; Adopt the square resistance of the rear silicon chip of four point probe test diffusion, the mean value of square resistance is 95 Ω/sq.
2. a kind of high square resistance diffusion technology as claimed in claim 1, is characterized in that, the time on intensification limit deposition step, described limit (3) is longer than the time of high temperature deposition step (4).
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Families Citing this family (11)
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CN104091858B (en) * | 2014-07-28 | 2017-11-07 | 六安市大宇高分子材料有限公司 | A kind of manufacture method of selective emitter solar battery |
CN104409339B (en) * | 2014-11-12 | 2017-03-15 | 浙江晶科能源有限公司 | A kind of P method of diffusion of silicon chip and the preparation method of solaode |
CN104480532B (en) * | 2014-12-30 | 2017-03-15 | 江西赛维Ldk太阳能高科技有限公司 | A kind of making herbs into wool preprocess method of Buddha's warrior attendant wire cutting polysilicon chip and making herbs into wool pretreatment silicon chip and its application |
CN104538467B (en) * | 2015-01-12 | 2016-08-24 | 浙江光隆能源科技股份有限公司 | A kind of polycrystalline solar cell and diffusion technique thereof |
CN108728901B (en) * | 2018-06-15 | 2021-01-22 | 常州亿晶光电科技有限公司 | Maintenance method of diffusion furnace tube |
CN110164759B (en) * | 2019-04-25 | 2021-08-20 | 横店集团东磁股份有限公司 | Regional layered deposition diffusion process |
CN110265293A (en) * | 2019-05-24 | 2019-09-20 | 江苏润阳悦达光伏科技有限公司 | The P-N junction manufacture craft of solar battery |
CN110190153B (en) * | 2019-05-31 | 2021-05-04 | 江苏顺风光电科技有限公司 | High-efficiency selective emitter solar cell diffusion process |
CN110379885A (en) * | 2019-06-28 | 2019-10-25 | 徐州谷阳新能源科技有限公司 | A kind of diffusion technique improving cell piece efficiency |
CN111384210B (en) * | 2019-12-27 | 2021-10-22 | 横店集团东磁股份有限公司 | High open voltage diffusion high sheet resistance process for PERC (permanent resistance resistor) overlapped SE (selective emitter current) |
CN111508829B (en) * | 2020-04-27 | 2022-04-08 | 徐州谷阳新能源科技有限公司 | Single crystal silicon battery piece diffusion efficiency-improving process capable of matching SE + alkali polishing |
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CN102097524A (en) * | 2010-09-28 | 2011-06-15 | 常州天合光能有限公司 | Method for diffusing high sheet resistance of solar cells |
CN102719894A (en) * | 2012-05-22 | 2012-10-10 | 江苏顺风光电科技有限公司 | Phosphorus diffusion technology of solar cell silicon wafer |
CN102945797A (en) * | 2012-12-03 | 2013-02-27 | 天威新能源控股有限公司 | Diffusing process with low temperature, low surface concentration and high sheet resistance |
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CN102097524A (en) * | 2010-09-28 | 2011-06-15 | 常州天合光能有限公司 | Method for diffusing high sheet resistance of solar cells |
CN102719894A (en) * | 2012-05-22 | 2012-10-10 | 江苏顺风光电科技有限公司 | Phosphorus diffusion technology of solar cell silicon wafer |
CN102945797A (en) * | 2012-12-03 | 2013-02-27 | 天威新能源控股有限公司 | Diffusing process with low temperature, low surface concentration and high sheet resistance |
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