CN103618023A - High sheet resistance diffusion process - Google Patents
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- CN103618023A CN103618023A CN201310491156.XA CN201310491156A CN103618023A CN 103618023 A CN103618023 A CN 103618023A CN 201310491156 A CN201310491156 A CN 201310491156A CN 103618023 A CN103618023 A CN 103618023A
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- 238000009792 diffusion process Methods 0.000 title claims abstract description 31
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 72
- 238000000151 deposition Methods 0.000 claims abstract description 36
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 36
- 230000008021 deposition Effects 0.000 claims abstract description 25
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 17
- 239000010703 silicon Substances 0.000 claims abstract description 17
- 238000005516 engineering process Methods 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 10
- 238000001816 cooling Methods 0.000 claims abstract description 8
- 230000006641 stabilisation Effects 0.000 claims abstract description 6
- 238000011105 stabilization Methods 0.000 claims abstract description 6
- 239000000523 sample Substances 0.000 claims abstract description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 abstract description 7
- 238000006243 chemical reaction Methods 0.000 abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 abstract 1
- 229910001882 dioxygen Inorganic materials 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 8
- 125000004437 phosphorous atom Chemical group 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 235000008216 herbs Nutrition 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 210000002268 wool Anatomy 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2225—Diffusion sources
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- Sustainable Development (AREA)
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Abstract
The invention discloses a high sheet resistance diffusion process which includes following steps of: low temperature boat entering, low temperature stabilization, heating while depositing, high temperature deposition, high temperature advancing, cooling while advancing, low temperature deposition, and low temperature boat exiting. The heating while depositing step includes the following procedures of: injecting nitrogen at 10L / min, oxygen gas at 400ml / min, and nitrogen with phosphorus oxychloride at 900ml / min; and controlling a furnace tube temperature to be <= 830 DEG C and a heating temperature to be <= 1 DEG C / min. The cooling while advancing step comprises the following procedures of: injecting the nitrogen at 10L / min; and controlling the furnace tube temperature to be <= 810 DEG C and the heating temperature to be >= 10 DEG C / min. A four-point probe is used to detect a square resistance of a silicon wafer after diffusion and an average is 95 omega / sq. In the invention, the advantages that the contact resistance in the conventional structure battery diffusion technology is low and that the diffusion process shortwave response in the SE structure battery is good are combined, so that the battery conversion efficiency is improved and the manufacturing cost is low.
Description
Technical field
The invention belongs to solar cell manufacturing technology field day labor skill, be specifically related to a kind of high square resistance diffusion technology.
Background technology
Solar cell is a kind of device that is directly electric energy by light energy conversion based on photovoltaic effect.The typical process flow of traditional structure solar cell comprises making herbs into wool, diffusion, back-etching, silicon nitride deposition, silk screen printing, sintering.Typical commercial type solar cell has good electrode contact performance in order to guarantee between the front metal gate electrode of silk screen printing and emitter, emitter needs higher surface doping concentration, square resistance general control after diffusion is the every square of ohm in 60 ~ 80 Ω/sq(units), yet the phosphorus-diffused layer of higher-doped concentration can cause blue light absorption loss and photo-generated carrier surface recombination loss again, is unfavorable for realizing the raising of conversion efficiency.Selective emitter (
selective
emitter, is called for short SE) structure is the effective technology that overcomes above-mentioned difficulties.Basic structure and the conventional solar cell of selective emitter solar battery are similar, but need to form highly doped dark diffusion region to front metal gate electrode and silicon chip contact site, and other regions between metal gate electrode form low-doped shallow diffusion region, the square resistance general control of low-doped shallow diffusion region is at 90 ~ 120 Ω/sq.It is compound that such structure can reduce the diffusion layer in region between front metal gate electrode, improve the short wave response of solar cell, reduce front metal gate electrode in diffusion layer and the contact resistance of silicon face emitter simultaneously, short circuit current, open circuit voltage, fill factor, curve factor are all improved, thereby improve conversion efficiency.But the key that realizes selective emitting electrode structure is how to make the region of two different levels of doping.This has increased technological difficulties, has also improved manufacturing cost.
Therefore, if on traditional structure battery structure basis, can realize the advantage of the square resistance of the low-doped shallow diffusion region of SE structure battery, not only do not significantly improve the contact resistance of front metal gate electrode and silicon face emitter, and can also improve the short wave response of solar cell, battery conversion efficiency can be improved so, and manufacturing cost can be controlled again.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of high square resistance diffusion technology, its compatibility the low and good advantage of SE structure battery diffusion technology short wave response of traditional structure battery diffusion technology contact resistance, not only improved battery conversion efficiency, and low cost of manufacture.
The technical scheme that technical solution problem of the present invention adopts is: a kind of high square resistance diffusion technology, it is characterized in that, comprise that low temperature enters boat, low-temperature stabilization, intensification limit, limit deposition, high temperature deposition, high temperature propelling, limit cooling limit propelling, low temperature depositing and low temperature and goes out boat step, wherein:
(1) low temperature enters boat: silicon chip is put into diffusion furnace, and it is 790 ℃ that furnace tube temperature is set, and passes into nitrogen 6~12L/min;
(2) low-temperature stabilization: pass into nitrogen 6~12L/min after entering boat, control furnace tube temperature≤790 ℃;
(3) limit intensification limit deposition: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, control furnace tube temperature≤830 ℃, heating rate≤1 ℃/min;
(4) high temperature deposition: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, control furnace tube temperature≤830 ℃, the time is 2 minutes;
(5) high temperature advances: pass into nitrogen 10 L/min, control furnace tube temperature≤830 ℃, the time is 1 minute;
(6) cooling limit in limit advances: pass into nitrogen 10 L/min, control furnace tube temperature≤810 ℃, heating rate >=10 ℃/min;
(7) low temperature depositing: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, control furnace tube temperature≤810 ℃, the time is 10 minutes;
(8) low temperature goes out boat: pass into nitrogen 6~12 L/min, control furnace tube temperature≤790 ℃; The square resistance that adopts the rear silicon chip of four point probe test diffusion, mean value is 95 Ω/sq.
As a kind of preferred, the time of described limit intensification limit deposition step (3) is longer than the time of high temperature deposition step (4).
Low temperature of the present invention enters boat step (1) and low temperature and goes out boat step (8) and be all controlled in 5~10 minutes; And the time of the time of intensification limit, limit deposition step (3) and low temperature depositing step (7) is all longer than the time of high temperature deposition step (4).
The invention has the beneficial effects as follows: the temperature of high temperature deposition step (4) is no more than 830 degrees Celsius, and high-temperature time is of short duration, the formation of diffused sheet resistance mainly completes by front intensification limit, the limit deposition step (3) of high temperature deposition step (4) and the low temperature depositing step (7) after high temperature deposition step (4), can keep so the original good life-span of silicon chip; In high temperature deposition step (4), there are afterwards high temperature forward step (5), cooling limit, limit forward step (6), this progressively activates the nonactive phosphorus atoms in silicon chip surface, be that the phosphorus atoms that instead type form exists increases, reduce recombination-rate surface, thereby improved the short wave response of solar cell; After propelling, carried out low temperature depositing step (7), owing to being low temperature depositing, can again not form in a large number nonactive phosphorus atoms at silicon chip surface, and the necessary phosphorus atoms of the contact resistance that just forms front metal gate electrode and silicon face emitter does not so just significantly improve the contact resistance of front metal gate electrode and silicon face emitter.
Embodiment
A high square resistance diffusion technology, comprises the steps:
(1) low temperature enters boat: silicon chip is put into diffusion furnace, and it is 790 ℃ that furnace tube temperature is set, and passes into nitrogen 10L/min;
(2) low-temperature stabilization: pass into nitrogen 10L/min, 790 ℃ of furnace tube temperatures;
(3) limit intensification limit deposition: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, 830 ℃ of furnace tube temperatures, arrange 1 ℃/min of heating rate;
(4) high temperature deposition: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, 830 ℃ of furnace tube temperatures, setup times is 2 minutes;
(5) high temperature advances: pass into nitrogen 10 L/min, and 830 ℃ of furnace tube temperatures, setup times is 1 minute;
(6) cooling limit in limit advances: pass into nitrogen 10 L/min, 810 ℃ of furnace tube temperatures, arrange 10 ℃/min of heating rate;
(7) low temperature depositing: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, 810 ℃ of furnace tube temperatures, setup times is 10 minutes;
(8) low temperature goes out boat: pass into nitrogen 10 L/min, 790 ℃ of furnace tube temperatures, adopt four point probe test to spread the square resistance of rear silicon chip, and mean value is 95 Ω/sq.
The diffused sheet resistance mean value that existing diffuse normal technique obtains is 75 Ω/sq, adopting the silicon chip that the present invention makes is 95 Ω/sq with the square resistance mean value of four point probe test, silicon chip after above-mentioned diffusion is carried out preparing solar cell after back-etching, silicon nitride deposition, silk screen printing, sintering, and unit for electrical property parameters is as shown in the table:
Grouping | Open circuit voltage (V) | Short-circuit voltage (V) | Series resistance (Ω) | Parallel resistance (Ω) | Fill factor, curve factor (﹪) | Battery efficiency (﹪) |
Diffuse normal technique, 75 Ω/sq | 0.6297 | 8.715 | 0.0031 | 816 | 78.156 | 17.627 |
Height side's group diffusion technology, 95 Ω/sq | 0.6322 | 8.757 | 0.0034 | 680 | 77.819 | 17.704 |
Height side's group diffusion technology and diffuse normal technique difference | 0.0025 | 0.041 | 0.0003 | -136 | -0.337 | 0.077 |
As can be seen from the table, the battery efficiency that the battery efficiency of high square resistance diffusion technology is compared diffuse normal technique has promoted 0.08%, and series resistance (Rs) and fill factor, curve factor are not decreased significantly.
Claims (2)
1. a high square resistance diffusion technology, is characterized in that, comprises that low temperature enters boat, low-temperature stabilization, intensification limit, limit deposition, high temperature deposition, high temperature propelling, limit cooling limit propelling, low temperature depositing and low temperature and goes out boat step, wherein:
(1) low temperature enters boat: silicon chip is put into diffusion furnace, and it is 790 ℃ that furnace tube temperature is set, and passes into nitrogen 6~12L/min;
(2) low-temperature stabilization: pass into nitrogen 6~12L/min after entering boat, control furnace tube temperature≤790 ℃;
(3) limit intensification limit deposition: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, control furnace tube temperature≤830 ℃, heating rate≤1 ℃/min;
(4) high temperature deposition: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, control furnace tube temperature≤830 ℃, the time is 2 minutes;
(5) high temperature advances: pass into nitrogen 10 L/min, control furnace tube temperature≤830 ℃, the time is 1 minute;
(6) cooling limit in limit advances: pass into nitrogen 10 L/min, control furnace tube temperature≤810 ℃, heating rate >=10 ℃/min;
(7) low temperature depositing: pass into nitrogen 10 L/min, oxygen 400ml/min, carry nitrogen 900 ml/min of phosphorus oxychloride, control furnace tube temperature≤810 ℃, the time is 10 minutes;
(8) low temperature goes out boat: pass into nitrogen 6~12 L/min, control furnace tube temperature≤790 ℃; The square resistance that adopts the rear silicon chip of four point probe test diffusion, mean value is 95 Ω/sq.
2. a kind of high square resistance diffusion technology as claimed in claim 1, is characterized in that, the time of described limit intensification limit deposition step (3) is longer than the time of high temperature deposition step (4).
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Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104091858A (en) * | 2014-07-28 | 2014-10-08 | 六安市大宇高分子材料有限公司 | Method for manufacturing selective emitter solar cell |
CN104409339A (en) * | 2014-11-12 | 2015-03-11 | 浙江晶科能源有限公司 | P diffusion method of silicon wafer and preparation method of solar cell |
CN104480532A (en) * | 2014-12-30 | 2015-04-01 | 江西赛维Ldk太阳能高科技有限公司 | Texturing preprocessing method of diamond wire cut polycrystalline silicon chip, textured preprocessed silicon chip and application thereof |
CN105870217A (en) * | 2015-01-12 | 2016-08-17 | 浙江光隆能源科技股份有限公司 | Improved diffusion technology of polycrystalline solar cell |
CN108728901A (en) * | 2018-06-15 | 2018-11-02 | 常州亿晶光电科技有限公司 | A kind of maintenance method of diffusion furnace tube |
CN110164759A (en) * | 2019-04-25 | 2019-08-23 | 横店集团东磁股份有限公司 | A kind of regionality stratified sedimentation diffusion technique |
CN110190153A (en) * | 2019-05-31 | 2019-08-30 | 江苏顺风光电科技有限公司 | Efficient selective emitter solar battery diffusion technique |
CN110265293A (en) * | 2019-05-24 | 2019-09-20 | 江苏润阳悦达光伏科技有限公司 | The P-N junction manufacture craft of solar battery |
CN110379885A (en) * | 2019-06-28 | 2019-10-25 | 徐州谷阳新能源科技有限公司 | A kind of diffusion technique improving cell piece efficiency |
CN111384210A (en) * | 2019-12-27 | 2020-07-07 | 横店集团东磁股份有限公司 | High open voltage diffusion high sheet resistance process for PERC (permanent resistance resistor) overlapped SE (selective emitter current) |
CN111508829A (en) * | 2020-04-27 | 2020-08-07 | 徐州谷阳新能源科技有限公司 | Single crystal silicon battery piece diffusion efficiency-improving process capable of matching SE + alkali polishing |
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CN102945797A (en) * | 2012-12-03 | 2013-02-27 | 天威新能源控股有限公司 | Diffusing process with low temperature, low surface concentration and high sheet resistance |
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CN102097524A (en) * | 2010-09-28 | 2011-06-15 | 常州天合光能有限公司 | Method for diffusing high sheet resistance of solar cells |
CN102719894A (en) * | 2012-05-22 | 2012-10-10 | 江苏顺风光电科技有限公司 | Phosphorus diffusion technology of solar cell silicon wafer |
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Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104091858A (en) * | 2014-07-28 | 2014-10-08 | 六安市大宇高分子材料有限公司 | Method for manufacturing selective emitter solar cell |
CN104409339A (en) * | 2014-11-12 | 2015-03-11 | 浙江晶科能源有限公司 | P diffusion method of silicon wafer and preparation method of solar cell |
CN104409339B (en) * | 2014-11-12 | 2017-03-15 | 浙江晶科能源有限公司 | A kind of P method of diffusion of silicon chip and the preparation method of solaode |
CN104480532A (en) * | 2014-12-30 | 2015-04-01 | 江西赛维Ldk太阳能高科技有限公司 | Texturing preprocessing method of diamond wire cut polycrystalline silicon chip, textured preprocessed silicon chip and application thereof |
CN104480532B (en) * | 2014-12-30 | 2017-03-15 | 江西赛维Ldk太阳能高科技有限公司 | A kind of making herbs into wool preprocess method of Buddha's warrior attendant wire cutting polysilicon chip and making herbs into wool pretreatment silicon chip and its application |
CN105870217A (en) * | 2015-01-12 | 2016-08-17 | 浙江光隆能源科技股份有限公司 | Improved diffusion technology of polycrystalline solar cell |
CN105870217B (en) * | 2015-01-12 | 2017-05-17 | 浙江光隆能源科技股份有限公司 | Improved diffusion technology of polycrystalline solar cell |
CN108728901A (en) * | 2018-06-15 | 2018-11-02 | 常州亿晶光电科技有限公司 | A kind of maintenance method of diffusion furnace tube |
CN110164759A (en) * | 2019-04-25 | 2019-08-23 | 横店集团东磁股份有限公司 | A kind of regionality stratified sedimentation diffusion technique |
CN110265293A (en) * | 2019-05-24 | 2019-09-20 | 江苏润阳悦达光伏科技有限公司 | The P-N junction manufacture craft of solar battery |
CN110190153A (en) * | 2019-05-31 | 2019-08-30 | 江苏顺风光电科技有限公司 | Efficient selective emitter solar battery diffusion technique |
CN110190153B (en) * | 2019-05-31 | 2021-05-04 | 江苏顺风光电科技有限公司 | High-efficiency selective emitter solar cell diffusion process |
CN110379885A (en) * | 2019-06-28 | 2019-10-25 | 徐州谷阳新能源科技有限公司 | A kind of diffusion technique improving cell piece efficiency |
CN111384210A (en) * | 2019-12-27 | 2020-07-07 | 横店集团东磁股份有限公司 | High open voltage diffusion high sheet resistance process for PERC (permanent resistance resistor) overlapped SE (selective emitter current) |
CN111384210B (en) * | 2019-12-27 | 2021-10-22 | 横店集团东磁股份有限公司 | High open voltage diffusion high sheet resistance process for PERC (permanent resistance resistor) overlapped SE (selective emitter current) |
CN111508829A (en) * | 2020-04-27 | 2020-08-07 | 徐州谷阳新能源科技有限公司 | Single crystal silicon battery piece diffusion efficiency-improving process capable of matching SE + alkali polishing |
CN111508829B (en) * | 2020-04-27 | 2022-04-08 | 徐州谷阳新能源科技有限公司 | Single crystal silicon battery piece diffusion efficiency-improving process capable of matching SE + alkali polishing |
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