CN102945797A - Diffusing process with low temperature, low surface concentration and high sheet resistance - Google Patents
Diffusing process with low temperature, low surface concentration and high sheet resistance Download PDFInfo
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- CN102945797A CN102945797A CN2012105079858A CN201210507985A CN102945797A CN 102945797 A CN102945797 A CN 102945797A CN 2012105079858 A CN2012105079858 A CN 2012105079858A CN 201210507985 A CN201210507985 A CN 201210507985A CN 102945797 A CN102945797 A CN 102945797A
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Abstract
The invention relates to a diffusing process with low temperature, low surface concentration and high sheet resistance. The diffusing process with low temperature, low surface concentration and high sheet resistance comprises an entering step, a depositing step, a propelling step and an exiting step. The diffusing process with low temperature, low surface concentration and high sheet resistance is characterized in that the reaction temperatures in the entering and depositing steps are lower than 800 DEG C. Preferably, at least one of the depositing step and the propelling step is carried out by steps according to different temperatures. Furthermore, the depositing step is divided into a first depositing step and a second depositing step. The propelling step comprises a first propelling step and a second propelling step. Preferably, an oxidizing step is further carried out between the entering step and the depositing step. The oxidizing step comprises the step of: introducing oxygen into a reactor. By utilizing the diffusing process with low temperature, low surface concentration and high sheet resistance provided by the invention, the reaction temperatures in the depositing and diffusing steps are reduced compared with the that in the conventional process, so that the surface compositing rate is reduced. Meanwhile, impurities are more beneficially migrated to the impurity absorbing point at the lower diffusing temperature in the diffusing process of polycrystalline silicon, so that the battery efficiency is further improved.
Description
Technical field
The invention belongs to solar cell and make the field, relate to the low surface concentration high square resistance diffusion technology of a kind of low temperature.
Background technology
Solar cell is the device that directly light energy conversion is become electric energy by photoelectric effect or Photochemical effects.Take the thin-film type solar cell of photoelectric effect work as main flow, solar irradiation is on the semiconductor p-n junction, energy forms new hole-duplet greater than the photon of silicon energy gap, under the effect of p-n junction electric field, photohole flows to the p district by the n district, light induced electron flows to the n district by the p district, just forms electric current behind the connection circuit.
The sheet resistance of typical commercial type solar cell is that 55 ~ 65 Ω/sq(units are the every side of ohm at present), and under the prerequisite of good ohmic contact, higher sheet resistance means better royal purple photoresponse, lower recombination-rate surface (SRV), lower reverse saturation current (J
o) and higher short circuit current (I
Sc).
Existing conventional diffusion technology is diffused as example with the phosphorus source, silicon chip is put into diffusion furnace after, pass into the phosphorus source in the diffusion furnace and carry out the silicon chip surface deposit and spread, after deposition is finished, stop to pass into the phosphorus source, in diffusion furnace, pass into oxygen, be oxidized to phosphorus pentoxide (P under oxygen and the phosphorus source high temperature
2O
5), being deposited on the phosphorus pentoxide of silicon chip surface and phosphorus atoms and the silicon dioxide that the silicon chip reaction generates free state, phosphorus atoms spreads to silicon chip inside subsequently.
Conventional high resistant diffusion technology depositing temperature is usually more than 800 degrees centigrade, diffusion temperature is usually more than 840 degrees centigrade, the phosphorus source diffusion meeting of high surface concentration inevitably is settled out a large amount of SiP particles on its oversaturated surface, the SiP particle of separating out can cause recombination-rate surface to increase as effective complex centre, reverse saturation current increases, and then reduces the conversion efficiency of silicon chip of solar cell.
Summary of the invention
Be settled out the technological deficiency that a large amount of SiP particles cause the recombination-rate surface increase and then reduce the silicon chip of solar cell conversion efficiency for overcoming conventional diffusion technique, the invention provides the low surface concentration high square resistance diffusion technology of a kind of low temperature.
Low temperature of the present invention hangs down surface concentration high square resistance diffusion technology, comprises into boat step, deposition step, forward step and goes out the boat step, and described deposition step reaction temperature is lower than 800 degrees centigrade.
Preferably, described forward step reaction temperature is lower than 830 degrees centigrade.
Preferably, described deposition step and forward step the two undertaken by the different substeps of temperature one of at least.
Further, described deposition step is divided into first step deposition and second step deposition, and the temperature of described first step deposition is 750 ~ 770 ℃, and the temperature of second step deposition is 770 ~ 790 ℃.
Further, described forward step comprises that the first step advances and second step advances, and the temperature that the described first step advances is 770 ~ 790 ℃, and the temperature that described second step advances is 790 ~ 820 ℃.
Preferably, the time of described second step propelling is longer than the first step and advances the time.
Concrete, comprise in the described forward step in reaction vessel passing into the POCL that nitrogen carries
3
Concrete, described forward step and go out the boat step and comprise in reaction vessel and pass into nitrogen that passing into nitrogen flow is 6 ~ 10L/min.
Preferably, describedly advance to also have oxidation step between boat step and the deposition step, described oxidation step comprises in reaction vessel and passes into oxygen.
Further, the reaction temperature of described oxidation step is 730 ~ 750 ℃.
Preferably, describedly advance the boat step and comprise:
101. heating steps: when reaction vessel is heated to 750 ~ 770 ℃, pending silicon chip is put into reaction vessel.
102. intensification stabilizing step: the off-response container, temperature stabilization at 750 ~ 770 ℃, is filled with nitrogen in the reaction vessel, nitrogen flow is 5 ~ 15L/min.
Adopt low temperature of the present invention to hang down surface concentration high square resistance diffusion technology, reduced reaction temperature in the relative traditional handicraft with diffusing step of deposition, so that nonactive phosphorus atoms concentration is less in the diffusion process, the phosphorus atoms that the instead type form exists increases, thereby reduced recombination-rate surface, simultaneously lower diffusion temperature and then has improved battery efficiency so that impurity more is conducive to move towards gettering point in the polysilicon diffusion process.
Description of drawings
Fig. 1 illustrates quantum response schematic diagram in a kind of embodiment of the present invention and the solar cell that traditional handicraft is compared.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.
A kind of low temperature hangs down surface concentration high square resistance diffusion technology, comprises into boat step, deposition step, forward step and goes out the boat step, and described deposition step reaction temperature is lower than 800 degrees centigrade.
Adopt to be lower than 800 degrees centigrade lower temperature in deposition step, the SiP that produces when making deposition reduces, and has reduced the recombination-rate surface of silicon chip surface, has improved the efficient of silicon chip of solar cell.
Preferably, described forward step reaction temperature is lower than 830 degrees centigrade.Relatively traditional forward step is usually above 840 degrees centigrade, the present invention has further reduced reaction temperature to forward step, adopt lower reaction temperature at forward step, this is that most of phosphorus atoms exists with the instead type form because during low temperature diffusion, its nonactive phosphorus atoms concentration is less, thereby realize reducing the purpose of recombination-rate surface, and lower diffusion temperature in the polysilicon diffusion process and then improves battery efficiency so that impurity more is conducive to towards gettering point migration.
Preferably, described deposition step and forward step the two undertaken by the different substeps of temperature one of at least.
Further, described deposition step is divided into first step deposition and second step deposition, and the temperature of described first step deposition is 750 ~ 770 ℃, and the temperature of second step deposition is 770 ~ 790 ℃.
Further, described forward step comprises that the first step advances and second step advances, and the temperature that the described first step advances is 770 ~ 790 ℃, and the temperature that described second step advances is 790 ~ 820 ℃.
Adopt the multistep deposition multistep of different temperatures to advance diffusion technology, be conducive on the one hand be positioned at heavy doping n++ layer (high concentration phosphorus atomic region) the junction depth reduction on silicon chip of solar cell surface, reduce surface doping phosphorus atoms concentration, again so that following n+ layer (low phosphorus atomic region) junction depth in surface increases, the sheet resistance of bringing with the junction depth reduction of compensation n++ layer changes on the other hand.Therefore compare with common process, keeping having lower surface doping phosphorus atoms concentration and darker junction depth in the constant situation of sheet resistance, this will be conducive to reduce the surface and meet speed and expansion later stage sintering window width.
Preferably, the time of described second step propelling is longer than the first step and advances the time.The first step advances purpose to be to finish surperficial heavy doping n++ layer and forms, second step advances purpose to be that the Doping Phosphorus atom is to diffusion below the surface, form the low phosphorus atomic region n+ layer of the larger degree of depth, the n+ layer thickness is greater than the n++ layer thickness, the sheet resistance of bringing owing to surperficial junction depth reduces with compensation reduces, the sheet resistance value that remains unchanged, so second step advances the long darker n+ layer of formation that is beneficial to of time.
Concrete, passing into of phosphorus source is to pass into the POCL that nitrogen carries in reaction vessel in the forward step
3
Concrete, described forward step and go out the boat step and comprise in reaction vessel and pass into nitrogen that passing into nitrogen flow is 6 ~ 10L/min.To keep the nitrogen atmosphere in the reaction vessel.
Preferably, describedly advance to also have oxidation step between boat step and the deposition step, described oxidation step comprises in reaction vessel and passes into oxygen.The purpose that passes into oxygen is to form the layer of silicon dioxide film on the silicon chip of solar cell surface before deposition; play the effect of protection silicon chip surface; because it is shorter to pass into the oxygen time; silicon chip surface forms the silicon dioxide layer very thin thickness; can not form barrier layer, phosphorus source; and pass into oxygen before experiment showed, deposition in advance, follow-up diffusing step has been significantly improved diffusion uniformity.
Further, the reaction temperature of described oxidation step is 730 ~ 750 ℃.Keep the low-temp reaction environment synchronous with subsequent deposition.
According to short-circuit current density J
SCComputing formula
G
LThe generation rate of photo-generated carrier,
P (
N) be excess holes (electronics) carrier concentration,
p(
n) be the minority carrier life time in electronics (hole), U is the depletion layer recombination rate, S
p(S
n) be the recombination-rate surface of hole (electronics).
First to fourth integration represents respectively the solar battery sheet surface on the right of the equal sign, the surface p type island region, the current density that each charge carrier of N-type district, surface and surface depletion district produces is carried out integration, the the 5th and the 6th on equal sign the right shows that the reduction of recombination-rate surface increases short circuit current, proved through its nonactive phosphorus atoms of cell silicon chip after the present invention's diffusion less, surface supersaturation SiP precipitation particles is less, has lower recombination-rate surface.
The below provides several embodiment of the present invention:
Specific embodiment 1:
(1) advances boat: start diffusion furnace, when treating that temperature reaches 750 ℃ in the boiler tube, pending silicon chip is put into boiler tube;
After closing fire door, temperature in the boiler tube heated up is stabilized in 750 ℃, and furnace atmosphere is nitrogen atmosphere, and nitrogen continues to pass into until spread and finish, and flow is 6L/min;
(2) oxidation: under 750 ℃ temperature, in boiler tube, pass into O
2, the time is 15min, forms layer oxide film at silicon chip surface, plays the purpose of protection silicon chip surface and increase diffusion uniformity;
(3) first step deposition: under 750 ℃ temperature, in boiler tube, pass into 900sccmN
2The POCl that carries
3, the time is 20min, finishes constant surface concentration diffusion under the low temperature;
(4) second step deposition: temperature in the boiler tube is elevated to 780 ℃, in temperature-rise period, continues to pass into 800sccmN
2The POCl that carries
3, the time is 30min, finishes constant surface concentration diffusion under the alternating temperature;
(5) first step advances: temperature in the boiler tube is remained on 780 ℃ of lower 30min, and stop to pass into of phosphorus source this moment, but pass into the O of 1000sccm
2, finish first step phosphorus source total amount and advance;
(6) second step advances: temperature in the boiler tube is remained on 810 ℃ of lower 60min, and stop to pass into of phosphorus source this moment, but pass into the O of 1000sccm
2, finish second step phosphorus source total amount and advance;
(7) go out boat: go out boat and take out the diffusion silicon chip.
Specific embodiment 2:
(1) advances boat: start diffusion furnace, when treating that temperature reaches 760 ℃ in the boiler tube, pending silicon chip is put into boiler tube;
After closing fire door, temperature in the boiler tube heated up is stabilized in 760 ℃, and furnace atmosphere is nitrogen atmosphere, and nitrogen continues to pass into until spread and finish, and flow is 15L/min;
(2) oxidation: under 760 ℃ temperature, in boiler tube, pass into O
2, the time is 10min, forms layer oxide film at silicon chip surface, plays the purpose of protection silicon chip surface and increase diffusion uniformity;
(3) first step deposition: under 760 ℃ temperature, in boiler tube, pass into 800sccmN
2The POCl that carries
3, the time is 15min, finishes constant surface concentration diffusion under the low temperature;
(4) second step deposition: temperature in the boiler tube is elevated to 775 ℃, in temperature-rise period, continues to pass into 700sccmN
2The POCl that carries
3, the time is 40min, finishes constant surface concentration diffusion under the alternating temperature;
(5) first step advances: temperature in the boiler tube is remained on 775 ℃ of lower 45min, and stop to pass into of phosphorus source this moment, but pass into the O of 600sccm
2, finish first step phosphorus source total amount and advance;
(6) second step advances: temperature in the boiler tube is remained on 815 ℃ of lower 50min, and stop to pass into of phosphorus source this moment, but pass into the O of 800sccm
2, finish second step phosphorus source total amount and advance;
(7) go out boat: go out boat and take out the diffusion silicon chip.
Specific embodiment 3
(1) advances boat: start diffusion furnace, when treating that temperature reaches 770 ℃ in the boiler tube, pending silicon chip is put into boiler tube; After closing fire door, temperature in the boiler tube heated up is stabilized in 770 ℃, and furnace atmosphere is nitrogen atmosphere, and nitrogen continues to pass into until spread and finish, and flow is 10L/min;
(2) oxidation: under 770 ℃ temperature, in boiler tube, pass into O
2, the time is 7min, forms layer oxide film at silicon chip surface, plays the purpose of protection silicon chip surface and increase diffusion uniformity;
(3) first step deposition: under 770 ℃ temperature, in boiler tube, pass into 600sccmN
2The POCl that carries
3, the time is 10min, finishes constant surface concentration diffusion under the low temperature;
(4) second step deposition: temperature in the boiler tube is elevated to 790 ℃, in temperature-rise period, continues to pass into 600sccmN
2The POCl that carries
3, the time is 20min, finishes constant surface concentration diffusion under the alternating temperature;
(5) first step advances: temperature in the boiler tube is remained on 790 ℃ of lower 25min, and stop to pass into of phosphorus source this moment, but pass into the O of 700sccm
2, finish first step phosphorus source total amount and advance;
(6) second step advances: temperature in the boiler tube is remained on 800 ℃ of lower 75min, and stop to pass into of phosphorus source this moment, but pass into the O of 900sccm
2, finish second step phosphorus source total amount and advance;
(7) go out boat: go out boat and take out the diffusion silicon chip.
The silicon chip that above-described embodiment uses all is that silicon chip is P type polysilicon, and resistivity is 0.5～3 Ω cm.
The various embodiments described above of the present invention and existing High temperature diffusion technology compare, and obtain by experiment following data:
As can be seen from the table, relatively traditional 80 Ω of each embodiment of the present invention/sq technique short circuit current increases relatively, and open circuit voltage reduces, and improves 0.08-0.12 percentage point of battery efficiency.Relatively traditional 655 Ω/sq technique improves larger, and battery efficiency can improve 0.18 percentage point.
Fig. 1 is low temperature diffusion technique of the present invention (80 Ω/sq) and conventional diffusion technology (the interior quantum response contrast figure of 80 Ω/sq); Fig. 1 abscissa is lambda1-wavelength (nanometer nm), ordinate is that the incident light photon of certain wavelength produces photoelectronic probability (%) on the solar battery sheet surface, from figure, can find out that through the cell piece after the low temperature diffusion technique of the present invention at the cell piece of its quantum response (namely producing photoelectronic probability) of shortwave part after the conventional diffusion technology, this has benefited from the present invention and spreads the lower recombination-rate surface of rear silicon chip surface.
Adopt low temperature of the present invention to hang down surface concentration high square resistance diffusion technology, possess following advantage:
(1) the low temperature diffusion high square resistance still can keep preferably sheet resistance uniformity;
(2) after the diffusion, obviously reduce in the zone of low minority carrier life time in the silicon chip;
(3) after the diffusion, the royal purple photoresponse of high square resistance battery obviously is better than conventional batteries
By use research gained diffusion technology, the battery efficiency that such silicon chip is produced is higher by 0.18% than using the battery efficiency of producing the living battery that produces of line normal process, also exceeds 0.12% than conventional high square resistance technique.
Previously described is each preferred embodiment of the present invention; preferred implementation in each preferred embodiment is if not obviously contradictory or take a certain preferred implementation as prerequisite; each preferred implementation arbitrarily stack combinations is used; design parameter among described embodiment and the embodiment only is the invention proof procedure for clear statement inventor; be not to limit scope of patent protection of the present invention; scope of patent protection of the present invention still is as the criterion with its claims; the equivalent structure that every utilization specification of the present invention and accompanying drawing content are done changes, and in like manner all should be included in protection scope of the present invention.
Claims (10)
1. the low surface concentration high square resistance diffusion technology of a low temperature comprises into boat step, deposition step, forward step and goes out the boat step that it is characterized in that: described deposition step reaction temperature is lower than 800 degrees centigrade.
2. low temperature as claimed in claim 2 hangs down surface concentration high square resistance diffusion technology, and it is characterized in that: described forward step reaction temperature is lower than 830 degrees centigrade.
3. the low surface concentration high square resistance diffusion technology of low temperature as claimed in claim 1 or 2 is characterized in that: the two carries out described deposition step and forward step step by step by different temperatures one of at least.
4. low temperature as claimed in claim 1 or 2 hangs down surface concentration high square resistance diffusion technology, it is characterized in that: described deposition step is divided into first step deposition and second step deposition, the temperature of described first step deposition is 750 ~ 770 ℃, and the temperature of second step deposition is 770 ~ 790 ℃.
5. low temperature as claimed in claim 1 or 2 hangs down surface concentration high square resistance diffusion technology, it is characterized in that: described forward step comprises that the first step advances and second step advances, the temperature that the described first step advances is 770 ~ 790 ℃, and the temperature that described second step advances is 790 ~ 820 ℃.
6. low temperature as claimed in claim 5 hangs down surface concentration high square resistance diffusion technology, it is characterized in that: the time that described second step advances is longer than the first step and advances the time.
7. the low surface concentration high square resistance diffusion technology of low temperature as claimed in claim 1 is characterized in that: comprise in the described forward step in reaction vessel passing into the POCL that nitrogen carries
3
8. the low surface concentration high square resistance diffusion technology of low temperature as claimed in claim 1 is characterized in that: described forward step and go out the boat step and comprise in reaction vessel and pass into nitrogen that passing into nitrogen flow is 6 ~ 10L/min.
9. the low surface concentration high square resistance diffusion technology of low temperature as claimed in claim 1 is characterized in that: describedly advance between boat step and the deposition step to also have oxidation step, described oxidation step comprises in reaction vessel and passes into oxygen.
10. low temperature as claimed in claim 8 hangs down surface concentration high square resistance diffusion technology, and it is characterized in that: the reaction temperature of described oxidation step is 730 ~ 750 ℃.
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| CN103606596A (en) * | 2013-11-26 | 2014-02-26 | 英利集团有限公司 | Phosphorus doping silicon wafer, manufacturing method of phosphorus doping silicon wafer, solar cell and manufacturing method of solar cell |
| CN103618023A (en) * | 2013-10-18 | 2014-03-05 | 浙江晶科能源有限公司 | High sheet resistance diffusion process |
| CN104409339A (en) * | 2014-11-12 | 2015-03-11 | 浙江晶科能源有限公司 | P diffusion method of silicon wafer and preparation method of solar cell |
| CN107086176A (en) * | 2017-04-20 | 2017-08-22 | 通威太阳能（合肥）有限公司 | The low surface concentration of one kind diffusion puies forward effect technique |
| CN108511563A (en) * | 2018-06-11 | 2018-09-07 | 国家电投集团西安太阳能电力有限公司 | A kind of production method of PN junction |
| CN110137307A (en) * | 2019-05-13 | 2019-08-16 | 浙江贝盛光伏股份有限公司 | A kind of high uniformity shallow junction diffusion technique under environment under low pressure |
| CN114497283A (en) * | 2022-02-07 | 2022-05-13 | 通威太阳能（安徽）有限公司 | Diffusion method for silicon wafer and photovoltaic silicon wafer |
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| CN110137307A (en) * | 2019-05-13 | 2019-08-16 | 浙江贝盛光伏股份有限公司 | A kind of high uniformity shallow junction diffusion technique under environment under low pressure |
| CN110137307B (en) * | 2019-05-13 | 2021-10-22 | 浙江贝盛光伏股份有限公司 | High-uniformity shallow junction diffusion process in low-pressure environment |
| CN114497283A (en) * | 2022-02-07 | 2022-05-13 | 通威太阳能（安徽）有限公司 | Diffusion method for silicon wafer and photovoltaic silicon wafer |
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