CN103580700B - The syndrome of codeword polynome solve and ECC decoding circuit and method - Google Patents

The syndrome of codeword polynome solve and ECC decoding circuit and method Download PDF

Info

Publication number
CN103580700B
CN103580700B CN201210276155.9A CN201210276155A CN103580700B CN 103580700 B CN103580700 B CN 103580700B CN 201210276155 A CN201210276155 A CN 201210276155A CN 103580700 B CN103580700 B CN 103580700B
Authority
CN
China
Prior art keywords
multiplier
trigger
output
syndrome
result
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201210276155.9A
Other languages
Chinese (zh)
Other versions
CN103580700A (en
Inventor
刘会娟
苏志强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhaoyi Innovation Technology Group Co ltd
Original Assignee
GigaDevice Semiconductor Beijing Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GigaDevice Semiconductor Beijing Inc filed Critical GigaDevice Semiconductor Beijing Inc
Priority to CN201210276155.9A priority Critical patent/CN103580700B/en
Publication of CN103580700A publication Critical patent/CN103580700A/en
Application granted granted Critical
Publication of CN103580700B publication Critical patent/CN103580700B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Error Detection And Correction (AREA)

Abstract

The invention discloses a kind of circuit that syndrome solves and ECC decodes and the method for codeword polynome.Wherein, the syndrome solving circuit of codeword polynome includes: the first trigger;First multiplication unit, the outfan of input and the first trigger is connected, and the input of outfan and the first trigger is connected;Second multiplication unit, first input end is connected between the first multiplication unit and the first trigger, and the second input is for receiving the first codeword polynome and the polynomial coefficient of the second code word respectively;Adder, the outfan of first input end and the second multiplication unit is connected;And second trigger, input is connected with the outfan of adder, and outfan is connected with the second input of adder.By the present invention, solve the problem that the syndrome solving circuit area of codeword polynome in prior art is bigger, and then reached to simplify code word polynomial syndrome solving circuit, the effect of reduction solving circuit area.

Description

The syndrome of codeword polynome solve and ECC decoding circuit and method
Technical field
The present invention relates to circuit field, the syndrome in particular to a kind of codeword polynome solves and ECC decoding Circuit and method.
Background technology
In the decoding algorithm of error checking and error correction (Error Correcting Code is called for short ECC), need code Word multinomial carries out syndrome calculating, and the method calculating syndrome has two kinds: one to be by the element α in Galois FieldiDirectly Connect in the code word being updated to receive;Two is that the code word received is αiIt is many that corresponding minimal polynomial process obtains remainder Item formula, the most again by the element α in Galois FieldiSubstitute into remainder polynomid.Both approaches is required to code word multinomial The α of the coefficient of each code word component in formula or remainder polynomid and corresponding poweriIt is multiplied, not only needs to first pass through Substantial amounts of NOR gate circuit solves the α of each poweri, in addition it is also necessary to the α of each power that will solveiBy substantial amounts of The multiplication of the code word component of NOR gate circuit and corresponding power, accordingly, it would be desirable to huge XOR gate network is supported, This kind needs huge XOR gate network to do the computational methods of the syndrome supported, can make the fan-out of ECC decoding paths relatively Greatly, not only increase the area of ECC decoding circuit, also add the complexity optimizing XOR gate network so that ECC Decoding circuit is more complicated.
For the problem that the syndrome solving circuit area of codeword polynome in correlation technique is bigger, the most not yet proposition has The solution of effect.
Summary of the invention
Present invention is primarily targeted at provide the syndrome of a kind of codeword polynome to solve and ECC decoding circuit and Method, the problem bigger to solve the syndrome solving circuit area of codeword polynome in prior art.
To achieve these goals, according to an aspect of the invention, it is provided the syndrome of a kind of codeword polynome is asked Solve circuit, including: the first trigger;First multiplication unit, the input of the first multiplication unit and the first trigger Outfan is connected, and the outfan of the first multiplication unit and the input of the first trigger are connected, for will be from the Multiplier factor in the multiplier factor of one trigger and the first multiplication unit is multiplied, and acquired results transmission is touched to first Send out device;Second multiplication unit, the first input end of the second multiplication unit is connected to the first multiplication unit and the first trigger Between, the second input of the second multiplication unit is used for receiving the first codeword polynome respectively and the second code word is polynomial Coefficient, for the coefficient of the first codeword polynome is multiplied by the first multiplier factor received, obtains the first output result, And the second polynomial coefficient of code word is multiplied by the second multiplier factor received, obtain the second output result;Addition Device, the first input end of adder and the outfan of the second multiplication unit are connected, for receive first output result and Second output result, and by the first output result and the second output results added;And second trigger, second triggers The input of device is connected with the outfan of adder, the second input phase of the outfan of the second trigger and adder Connecting, after adding up end in adder, the accumulation result of output adder, obtains syndrome.
Further, the first multiplication unit includes the first multiplier and the second multiplier, and the second multiplication unit includes the 3rd Multiplier and the 4th multiplier, wherein, the input of the first multiplier and the outfan of the first trigger are connected, the The outfan of one multiplier and the input of the second multiplier are connected, the outfan of the second multiplier and the first trigger Input be connected, the first input end of the 3rd multiplier is connected between the first trigger and the first multiplier, Second input of three multipliers is many for the coefficient and the second code word receiving the first component of the first codeword polynome respectively The coefficient of the first component of item formula, the outfan of the 3rd multiplier is connected with the first input end of adder, and being used for will The coefficient of the first component of the first codeword polynome is multiplied by the first multiplier factor of the first trigger output, obtains first defeated Go out sub-result, and the coefficient of polynomial for the second code word the first component is multiplied by the second multiplier of the first trigger output The factor, obtains the second sub-result of output, and the first input end of the 4th multiplier is connected to the first multiplier and the second multiplication Between device, the second input of the 4th multiplier for receive respectively the second component of the first codeword polynome coefficient and The coefficient of the second polynomial second component of code word, the outfan of the 4th multiplier is connected with the second input of adder Connect, for the coefficient of the second component of the first codeword polynome being multiplied by the first multiplier factor of the first multiplier output, Obtain the 3rd sub-result of output, and the coefficient of the second polynomial second component of code word is multiplied by the first multiplier output The second multiplier factor, obtain the 4th sub-result of output, wherein, adder be additionally operable to calculate the first sub-result of output with 3rd exports sub-result sum, obtains the first output result, and calculates the second sub-result of output and the 4th output son knot Really sum, obtains the second output result.
Further, the element α that the multiplier factor in the first multiplier and the second multiplier is in Galois Fieldi
Further, syndrome counting circuit also includes: selector, and the first input end of selector is used for receiving gal sieve Element α in watt territory0, the second input of selector and the outfan of the first multiplication unit be connected, selector defeated Go out end to be connected with the first trigger.
To achieve these goals, according to a further aspect in the invention, it is provided that the ECC decoding of a kind of codeword polynome Circuit, the ECC decoding circuit of this codeword polynome includes that any one syndrome that foregoing of the present invention is provided solves Circuit.
To achieve these goals, according to a further aspect in the invention, it is provided that the syndrome of a kind of codeword polynome is asked Solving processing method, any one syndrome that this syndrome solves processing method and provided for foregoing of the present invention solves Circuit, wherein, syndrome solving circuit includes the first trigger, the second trigger, the first multiplication unit, second takes advantage of Method unit and adder, syndrome solves processing method and includes: by the first multiplication unit by from the first trigger Multiplier factor in multiplier factor and the first multiplication unit is multiplied, and sends acquired results to the first trigger;Pass through The coefficient of the first codeword polynome received is multiplied by the first multiplier factor received by the second multiplication unit, obtains One output result, and the second polynomial coefficient of code word received is multiplied by the second multiplier factor received, To the second output result;The first output result and the second output result is received by adder, and by the first output result With the second output results added;And by the second trigger cumulative knot of output adder after adder adds up end Really, syndrome is obtained.
Further, the first multiplication unit includes the first multiplier and the second multiplier, and the second multiplication unit includes the 3rd Multiplier and the 4th multiplier, wherein, by the first multiplication unit by the multiplier factor and first from the first trigger Multiplier factor in multiplication unit is multiplied, and acquired results transmission is included to the first trigger: the first multiplier is in the future Multiplier factor in the multiplier factor and the first multiplier of the first trigger is multiplied, and sends acquired results to second Multiplier;And second multiplier by the multiplier factor phase in the acquired results and the second multiplier of the first multiplier Take advantage of, and acquired results is sent to the first trigger, the first codeword polynome that will be received by the second multiplication unit Coefficient be multiplied by the first multiplier factor received, obtain the first output result, and by many for the second code word of receiving The coefficient of item formula is multiplied by the second multiplier factor received, and obtains the second output result and includes: the 3rd multiplier is by first The coefficient of the first component of codeword polynome is multiplied by the first multiplier factor of the first trigger output, obtains the first output As a result, and the coefficient of polynomial for the second code word the first component is multiplied by the second multiplier factor that the first trigger exports, Obtain the second sub-result of output;The coefficient of the second component of the first codeword polynome is multiplied by the first multiplication by the 4th multiplier First multiplier factor of device output, obtains the 3rd sub-result of output, and by the second polynomial second component of code word Coefficient is multiplied by the second multiplier factor of the first multiplier output, obtains the 4th sub-result of output;And adder calculates the One exports sub-result exports sub-result sum with the 3rd, obtains the first output result, and calculates the second sub-result of output Export sub-result sum with the 4th, obtain the second output result.
To achieve these goals, according to a further aspect in the invention, it is provided that the ECC decoding of a kind of codeword polynome Method, this ECC coding/decoding method is solved by the syndrome of any one codeword polynome that foregoing of the present invention is provided Processing method obtains the syndrome of codeword polynome;And according to the syndrome of codeword polynome, codeword polynome is carried out ECC error correction.
By the present invention, use and include following structure syndrome solving circuit: the first trigger;First multiplication unit, The input of the first multiplication unit and the outfan of the first trigger are connected, the outfan of the first multiplication unit and first The input of trigger is connected, for by the multiplier in the multiplier factor and the first multiplication unit of the first trigger Fac-tor, and acquired results is sent to the first trigger;Second multiplication unit, the first of the second multiplication unit is defeated Entering end to be connected between the first multiplication unit and the first trigger, the second input of the second multiplication unit is for connecing respectively Receive the first codeword polynome and the polynomial coefficient of the second code word, for the coefficient of the first codeword polynome is multiplied by reception The first multiplier factor arrived, obtain the first output result, and be multiplied by by the second polynomial coefficient of code word and receive Second multiplier factor, obtains the second output result;Adder, is connected with the outfan of the second multiplication unit, is used for Receive the first output result and the second output result, and by the first output result and the second output results added;And the Two triggers, are connected with the outfan of adder, the cumulative knot of output adder after adding up end in adder Really, syndrome is obtained.By receiving the first codeword polynome and respectively via the second input of the second multiplication unit The coefficient of two codeword polynomes, and the outfan of the second multiplication unit is connected with adder, it is achieved that code word is many Formula inputs syndrome solving circuit according to the mode of grouping parallel, and by solve with each group of codeword polynome phase The intermediate variable of corresponding syndrome adds up, and exports final accumulation result at the end of cumulative, and then obtains former The syndrome of beginning codeword polynome;By by the outfan feedback link of the first multiplication unit to the first trigger, it is achieved Only can be solved the multiplier factor obtaining each power by a set of first multiplication unit and the first trigger, by will The first input end of the second multiplication unit is connected between the first multiplication unit and the first trigger, it is achieved that the second multiplication Unit, when receiving codeword polynome and call, from its first input end, the multiplier factor received each time, all can Obtain the multiplier factor of the corresponding power of coefficient of the codeword polynome received with its second input, and then achieve When the multiplier factor of corresponding power being substituted in corresponding codeword polynome in syndrome solution procedure every time all without Increase the multiplication unit being made up of NOR gate circuit, that is, by by the outfan feedback link of the first multiplication unit extremely First trigger, and the first input end of the second multiplication unit is connected between the first multiplication unit and the first trigger, Achieve the syndrome only relying on the codeword polynome that a set of solving circuit can solve different component number, solve The problem that in prior art, the syndrome solving circuit area of codeword polynome is bigger, and then it is multinomial to have reached simplification code word The syndrome solving circuit of formula, the effect of reduction solving circuit area.
Accompanying drawing explanation
The accompanying drawing of the part constituting the application is used for providing a further understanding of the present invention, and the present invention's is schematic real Execute example and illustrate for explaining the present invention, being not intended that inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the schematic diagram of syndrome solving circuit according to embodiments of the present invention;
Fig. 2 is the schematic diagram of syndrome solving circuit according to the preferred embodiment of the invention;
Fig. 3 is the structured flowchart of syndrome solving circuit according to embodiments of the present invention;
Fig. 4 is the operation principle flow chart of syndrome solving circuit according to embodiments of the present invention;And
Fig. 5 is the flow chart of ECC coding/decoding method according to embodiments of the present invention.
Detailed description of the invention
It should be noted that in the case of not conflicting, the embodiment in the application and the feature in embodiment can phases Combination mutually.Describe the present invention below with reference to the accompanying drawings and in conjunction with the embodiments in detail.
Embodiments provide the syndrome solving circuit of a kind of codeword polynome, below to embodiment of the present invention institute The syndrome solving circuit of the codeword polynome provided is specifically introduced.
Fig. 1 is the schematic diagram of syndrome solving circuit according to embodiments of the present invention, as it is shown in figure 1, this embodiment The syndrome solving circuit of codeword polynome includes the first trigger, the first multiplication unit, the second multiplication unit, addition Device and the second trigger.
Specifically, the input of the first multiplication unit and the outfan of the first trigger are connected, the first multiplication unit The input of outfan and the first trigger is connected;The first input end of the second multiplication unit is connected to the first multiplication list Between unit and the first trigger, the second input of the second multiplication unit is for receiving the first codeword polynome and the respectively The coefficient of two codeword polynomes, wherein, the first codeword polynome and the second codeword polynome are in original code word multinomial Flanking sequence, the code word component in the first codeword polynome and the second codeword polynome is identical;The first of adder is defeated Enter end to be connected with the outfan of the second multiplication unit;The input of the second trigger is connected with the outfan of adder, The outfan of the second trigger is connected with the second input of adder.
The operation principle of the syndrome solving circuit of the embodiment of the present invention is: solving circuit powers on after starting working, first Trigger receive control signal initialize, due in the first trigger and the first multiplication unit all storage have multiplication because of Son, (is assumed to be the first code word when the second input of the second multiplication unit receives for the first time the coefficient of codeword polynome Polynomial coefficient) time, the coefficient of the first codeword polynome that the second multiplication unit can will receive from the second input (it is assumed to be the first multiplier factor, i.e. triggered by first with the multiplier factor received for the first time from its first input end The multiplier factor that the outfan of device sends out for the first time) be multiplied, complete the substitution of Galois Field element, obtain with The intermediate variable of the syndrome that the first codeword polynome is corresponding, the i.e. first output result, and by this first output result Sending to adder, this first output result is preserved to the second trigger by adder;It is exported at the first trigger During internal multiplier factor, the first multiplication unit also can receive this multiplier factor, and by the multiplier factor that receives with The multiplier factor of self is once multiplied, and the result of the gained that is multiplied is fed back from the outfan of the first multiplication unit simultaneously To the first trigger, the first trigger using the multiplier factor that receives as the new multiplier factor of storage inside;When Second input second time of square law unit receives the coefficient of codeword polynome and (is assumed to be the second code word polynomial Coefficient) time, the second multiplication unit can by the second polynomial coefficient of code word of receiving from the second input with from its The multiplier factor that one input second time receives (is assumed to be the second multiplier factor, i.e. by the output of the first trigger Multiplier factor after the multiplier factor that end second time sends out, namely the renewal of the first trigger) it is multiplied, complete gal The substitution of roua domain element, obtains the intermediate variable of the syndrome corresponding with the second codeword polynome, the i.e. second output As a result, and sending this second output result to adder, meanwhile, the second trigger also can be by last calculating knot Really (that is, the first output result) feeds back to adder, and the first output result and the second output result are done gal by adder After roua domain addition, will add up result and again store to the second trigger;Export in it in the first trigger second time During the multiplier factor in portion, the first multiplication unit the most also can receive this multiplier factor, and the multiplier factor that will receive The most once it is multiplied with the multiplier factor of self, simultaneously by the result of the gained that is multiplied from the outfan of the first multiplication unit Feed back to the first trigger, the first trigger using the multiplier factor that again receives as storage inside new multiplier because of Son;Circulate successively, until the second multiplication unit no longer receives codeword polynome, that is, until codeword polynome be Number input is complete, and after adder completes last Galois field addition, the final accumulation result in the second trigger is i.e. Syndrome for codeword polynome.
By receiving the first codeword polynome and the second codeword polynome respectively via the second input of the second multiplication unit Coefficient, and the outfan of the second multiplication unit is connected with adder, it is achieved that by codeword polynome according to packet Parallel form input syndrome solving circuit, and the syndrome corresponding with each group of codeword polynome that will solve Intermediate variable add up, and export final accumulation result at the end of cumulative, and then obtain original code word multinomial Syndrome;By by the outfan feedback link of the first multiplication unit to the first trigger, it is achieved that only by a set of First multiplication unit and the first trigger can solve the multiplier factor obtaining each power, by by the second multiplication unit First input end be connected between the first multiplication unit and the first trigger, it is achieved that the second multiplication unit is each time Receive codeword polynome and when its first input end calls the multiplier factor received, all can obtain with its second The multiplier factor of the corresponding power of coefficient of the codeword polynome that input receives, and then achieve syndrome is being asked All without increasing by XOR gate every time when the multiplier factor of corresponding power is substituted in corresponding codeword polynome by solution preocess Circuit constitute multiplication unit, that is, by by the outfan feedback link of the first multiplication unit to the first trigger, And the first input end of the second multiplication unit is connected between the first multiplication unit and the first trigger, it is achieved that only depend on The syndrome of the codeword polynome of different component number can be solved by a set of solving circuit, solve in prior art The problem that the syndrome solving circuit area of codeword polynome is bigger, and then reached the polynomial syndrome of simplification code word Solving circuit, the effect of reduction solving circuit area.
Fig. 2 is the schematic diagram of syndrome solving circuit according to the preferred embodiment of the invention, as in figure 2 it is shown, the present invention The solving circuit of the syndrome of preferred embodiment is with the difference of the solving circuit shown in Fig. 1, preferred in the present invention In the solving circuit of embodiment, the first multiplication unit and the second multiplication unit all include multiple multiplier, specifically, In one multiplication unit, the number of multiplier is identical with the number of multiplier in the second multiplication unit, physical circuit annexation For: each multiplier in the first multiplication unit is sequentially connected in series, and the outfan of input and the first trigger is connected, Outfan feedback link is to the input of the first trigger;First multiplier one end in second multiplication unit is connected to Between the first multiplier in one trigger and the first multiplication unit, the other end is connected to adder;Second multiplication unit In second multiplier one end be connected between the first multiplier in the first multiplication unit and the second multiplier, the other end It is connected to adder, the like.
It is respectively the first multiplier and the second multiplier, in the second multiplication unit with the multiplier in the first multiplication unit Multiplier illustrates the syndrome solving circuit of the preferred embodiment of the present invention as a example by being respectively the 3rd multiplier and the 4th multiplier Operation principle, specific as follows:
Solving circuit powers on after starting working, and the first trigger receives control signal and initializes, owing to first triggers In device, the first multiplier and the second multiplier, all storage has multiplication factor (the first multiplier and the second multiplier inner multiplication The element α that the factor is in Galois Fieldi, concrete i value can be according to the ECC decoding applying this syndrome solving circuit The error correcting capability of circuit is determined), (it is assumed to be when the second input of the 3rd multiplier receives codeword polynome for the first time First codeword polynome) the coefficient of the first component time, the 3rd multiplier can be by the first component of the first codeword polynome Coefficient is with the multiplier factor received for the first time from its first input end (i.e., by the outfan of the first trigger for the first time The multiplier factor sent out) it is multiplied, complete the substitution of Galois Field element, obtain and the first codeword polynome The intermediate variable of the syndrome that the first component is corresponding, and by the companion corresponding with the first component of the first codeword polynome Send to adder with the intermediate variable of formula;Meanwhile, to receive the first code word many for the second input of the 4th multiplier The coefficient of the second component of item formula, and by the second component coefficient of the first codeword polynome and from its first input end first The secondary multiplier factor (that is, the outfan of the first multiplier the multiplier factor sent out for the first time) received carries out phase Take advantage of, complete the substitution of Galois Field element, obtain the syndrome corresponding with the second component of the first codeword polynome Intermediate variable, and the intermediate variable of the syndrome corresponding with the second component of the first codeword polynome is sent to addition Device, the intermediate variable of the adder syndrome corresponding with the first component of the first codeword polynome to receiving and The intermediate variable of the syndrome that the second component of the first codeword polynome is corresponding carries out Galois field addition, obtains and the The intermediate variable of the syndrome that one codeword polynome is corresponding, the i.e. first output result, and this first output result is deposited Storage is to the second trigger;When the first trigger exports the multiplier factor of its inside, the first multiplier also can receive this Multiplier factor, and the multiplier factor received once is multiplied with the multiplier factor of self, will be multiplied gained simultaneously Result send to the second multiplier;The multiplier factor received and the multiplier factor of self are carried out one by the second multiplier Secondary being multiplied, from the outfan of the second multiplier, the result of the gained that is multiplied is fed back to the first trigger simultaneously, first triggers Device using the multiplier factor that receives as the new multiplier factor of storage inside;
When the second input second time of the 3rd multiplier receives codeword polynome (being assumed to be the second codeword polynome) The coefficient of the first component time, the 3rd multiplier can be first defeated with from it by polynomial for the second code word the first component coefficient Enter the multiplier factor (that is, the outfan second time of the first trigger the multiplier factor sent out) that end second time receives It is multiplied, completes the substitution of Galois Field element, obtain the companion that first component polynomial with the second code word is corresponding With the intermediate variable of formula, and the intermediate variable of syndrome corresponding for first component polynomial with the second code word is sent To adder;Meanwhile, what the second input of the 4th multiplier received the second polynomial second component of code word is Number, and by the second code word polynomial second component coefficient and the multiplier factor received from its first input end second time (that is, the outfan second time of the first multiplier the multiplier factor sent out) is multiplied, and completes Galois Field unit The substitution of element, obtains the intermediate variable of the syndrome corresponding with the second polynomial second component of code word, and will be with the The intermediate variable of the syndrome that the second component of two codeword polynomes is corresponding sends to adder, and adder is to receiving The intermediate variable of the corresponding syndrome of first component polynomial with the second code word and the second code word polynomial The intermediate variable of the syndrome that two components are corresponding carries out Galois field addition, obtains corresponding with the second codeword polynome The intermediate variable of syndrome;When the second polynomial syndrome of code word is calculated by adder, the second trigger also can be by Last result of calculation (that is, the syndrome of the first codeword polynome) feeds back to adder, and adder will be with first The intermediate variable of the syndrome that codeword polynome is corresponding and the middle change of the syndrome corresponding with the second codeword polynome After amount does Galois field addition, will add up result and again store to the second trigger;Defeated in the first trigger second time When going out the multiplier factor of its inside, the first multiplier also can receive this multiplier factor, and the multiplier factor that will receive Carry out second time to be multiplied with the multiplier factor of self, the result of the gained that is multiplied is sent to the second multiplier simultaneously;Second The multiplier factor received is carried out second time and is multiplied, simultaneously by the knot of the gained that is multiplied by multiplier with the multiplier factor of self Fruit feeds back to the first trigger from the outfan of the second multiplier, and the multiplier factor again received is made by the first trigger New multiplier factor for storage inside;Circulate successively, until the 3rd multiplier and the 4th multiplier no longer receive code word Multinomial, that is, until the coefficient input of codeword polynome is complete, when adder completes last Galois field addition After, the final accumulation result in the second trigger is the syndrome of codeword polynome.
By the multiplier in the first multiplication unit and the second multiplication unit is respectively set to multiple multiplier, it is achieved that Receive the coefficient of codeword polynome according to the parallel mode received, and then reach to improve the calculating of codeword polynome syndrome Speed.
Wherein, if the input degree of parallelism of codeword polynome coefficient is set to p, then in Fig. 2 the first multiplication unit and Multiplier in second multiplication unit is p, carries out code word in conjunction with accompanying drawing 2,3 and 4 explanation according to degree of parallelism p many The principle that the syndrome of item formula solves, Fig. 3 is the structured flowchart of syndrome solving circuit according to embodiments of the present invention, Fig. 4 is the operation principle flow chart of syndrome solving circuit according to embodiments of the present invention, such as Fig. 2, Fig. 3 and Fig. 4 Shown in, it is assumed that the codeword polynome of reception is R (x)=[R0×x0+R1×x1+R2×x2+…+Rn×xn], available square Formation formula is expressed as R (x)=[R0R1R2 ... Rn], and in Galois Field, element representation is αi, wherein, concrete i value can Determine with the error correcting capability according to the ECC decoding circuit applying this syndrome solving circuit.Code word input in the present invention Entering device according to the mode of grouping parallel, if degree of parallelism is p, the codeword polynome coefficient number of input is p i.e. every time, Syndrome Si represents, then syndrome and the relation received between code word are: Si=R (αi).By by αiSubstitute into Just can try to achieve syndrome in R (x), in Fig. 2, in the first multiplication unit, the multiplier factor in each multiplier is gal Roua domain element αi, it is achieved in multiplier, all with one coefficient of each node is corresponding, finish with the multiplication of coefficient after phase Add and i.e. obtain the value after this group p substitutes into, if input code numerical coefficient is Rm, Rm+1 ... Rp-1, by this p Coefficient and element multiplication on corresponding position, and α will be taken advantage ofiThe result of calculation of bottom be stored in d type flip flop 1, under entrance Once calculating, such as initially having calculated the value in rear d type flip flop for the first time is αpi, calculated is R0×α0+R1×αli+R2×α2i+…+Rp-1×α(p-1)i, below computing is taken turns in entrance second, then next group will be from Rp×αpiStart to calculate, the results added that will every time calculate.By that analogy.Obtain the final syndrome added up Value.Operation principle is concrete as shown in Figure 4, is first that chien search machine (that is, syndrome solving circuit) receives control After signal processed, trigger initializes, and inputs one group p codeword polynome coefficient afterwards;Secondly respectively by this p system Number (inputs multiplier 1, multiplier 2 by corresponding for this p coefficient ... multiplication i.e., respectively with element multiplication on corresponding position Device p, and by multiplier 1, the coefficient received is multiplied with multiplier factor respectively, multiplier 2 is to receiving Coefficient is multiplied with multiplier factor ... the coefficient received is multiplied by multiplier p with multiplier factor), complete unit The substitution of element;By multiplier 1, multiplier 2 ... the multiplied result in multiplier p is added, and after will add up Result and upper one group of addition results cumulative addition in adder 2, accumulation result is stored to the second triggering by adder 2 Device;After coefficient inputs, the result of obtained cumulative addition is exactly the value of the final syndrome obtained.
Further, the syndrome solving circuit of the embodiment of the present invention also includes selector, the first input end of selector For receiving the element α in Galois Field0, the pth in the second input of selector and the first multiplication unit takes advantage of αi The outfan of multiplier is connected, and outfan and first trigger of selector are connected.Owing to entering the first trigger Data have two kinds, a kind of is the initial value of for the first time input, and another kind is that syndrome solving circuit completes one with parallel Degree is the value after the intermediate variable of the corresponding syndrome of the multinomial of p, so needing to increase in the first trigger front end Selector, controls correct data with realization and enters the first trigger.
The embodiment of the present invention additionally provides the syndrome of a kind of codeword polynome and solves processing method, and this syndrome solves place The syndrome solving circuit that reason method can be provided by embodiment of the present invention foregoing performs, specifically, including with Lower step:
By the first multiplication unit by the multiplier factor phase in the multiplier factor and the first multiplication unit of the first trigger Take advantage of, and acquired results is sent to the first trigger;
By the second multiplication unit the coefficient of the first codeword polynome received is multiplied by the first multiplier of receiving because of Son, obtains the first output result, and the second polynomial coefficient of code word received is multiplied by second received takes advantage of The number factor, obtains the second output result;
The first output result and the second output result is received by adder, and by the first output result and the second output knot Fruit is added;And
By the second trigger accumulation result of output adder after adder adds up end, obtain syndrome.
The syndrome of the codeword polynome of the embodiment of the present invention solves processing method by via the second of the second multiplication unit Input receives the first codeword polynome and the polynomial coefficient of the second code word respectively, and by the output of the second multiplication unit End is connected with adder, it is achieved that according to the mode of grouping parallel, codeword polynome is inputted syndrome solving circuit, And the intermediate variable of the syndrome corresponding with each group of codeword polynome solved is added up, and at cumulative knot Export final accumulation result during bundle, and then obtain the polynomial syndrome of original code word;By by the first multiplication unit Outfan feedback link is to the first trigger, it is achieved that only can be asked by a set of first multiplication unit and the first trigger Solution obtains the multiplier factor of each power, by the first input end of the second multiplication unit is connected to the first multiplication unit And between the first trigger, it is achieved that the second multiplication unit is receiving codeword polynome and each time from its first input When end calls the multiplier factor received, all can obtain the coefficient of the codeword polynome received with its second input The multiplier factor of corresponding power, so achieve in syndrome solution procedure every time by the multiplier of corresponding power because of The multiplication unit being all made up of NOR gate circuit without increase when filial generation enters in corresponding codeword polynome, that is, pass through By the outfan feedback link of the first multiplication unit to the first trigger, and by the first input end of the second multiplication unit even It is connected between the first multiplication unit and the first trigger, it is achieved that only rely on a set of solving circuit and can solve different points The syndrome of the codeword polynome of amount number, solves the syndrome solving circuit area of codeword polynome in prior art Bigger problem, and then reached to simplify code word polynomial syndrome solving circuit, the effect of reduction solving circuit area Really.
It is possible to further calculate the syndrome of codeword polynome according to certain degree of parallelism, if degree of parallelism is p, then Multiplier in first multiplication unit is set to p multiplier, and the multiplier factor in each multiplier is all Galois Field In element αi;Multiplier in second multiplication unit is also configured as p multiplier, includes with the first multiplication unit One multiplier and the second multiplier, the second multiplication unit illustrates according to one as a example by including the 3rd multiplier and the 4th multiplier Fixed degree of parallelism calculates the principle of the syndrome of codeword polynome, specific as follows:
Multiplier factor in the multiplier factor and the first multiplier of the first trigger is multiplied by the first multiplier, and will Acquired results sends to the second multiplier;And
Multiplier factor in the acquired results and the second multiplier of the first multiplier is multiplied by the second multiplier, and will Acquired results sends to the first trigger,
The coefficient of the first component of the first codeword polynome is multiplied by the first multiplier of the first trigger output by the 3rd multiplier The factor, obtains the first sub-result of output, and the coefficient of polynomial for the second code word the first component is multiplied by the first triggering Second multiplier factor of device output, obtains the second sub-result of output;
The coefficient of the second component of the first codeword polynome is multiplied by the first multiplier of the first multiplier output by the 4th multiplier The factor, obtains the 3rd sub-result of output, and the coefficient of the second polynomial second component of code word is multiplied by the first multiplication Second multiplier factor of device output, obtains the 4th sub-result of output;And
Adder calculates the first sub-result of output and exports sub-result sum with the 3rd, obtains the first output result, Yi Jiji Calculate the second sub-result of output and export sub-result sum with the 4th, obtain the second output result.
First output result and the second output result are carried out Galois field addition by adder, and store cumulative to second Trigger, after the cumulative end of adder, the accumulation result in the second trigger is the syndrome of codeword polynome.
By the way of according to parallel reception, receive the coefficient of codeword polynome, reach raising codeword polynome syndrome The effect of calculating speed.
The embodiment of the present invention additionally provides the ECC coding/decoding method of a kind of codeword polynome, below to the embodiment of the present invention The ECC coding/decoding method of codeword polynome is specifically introduced.
Fig. 5 is the flow chart of ECC coding/decoding method according to embodiments of the present invention, as it is shown in figure 5, the method include as Under step S502 to step S504:
S502: solve the syndrome of codeword polynome.Specifically, provided by embodiment of the present invention foregoing The syndrome solving circuit of codeword polynome or syndrome solve processing method to carry out syndrome and solves, and obtains code word multinomial The syndrome of formula.
S504: codeword polynome is carried out ECC error correction according to the syndrome of codeword polynome.
By the syndrome solving circuit of codeword polynome provided according to embodiment of the present invention foregoing or syndrome Solve processing method to carry out syndrome and solve, reached to reduce the area of syndrome solving circuit, improved syndrome and solve The effect of speed, and then reached the effect of the ECC decoding speed improving codeword polynome.
Additionally, the embodiment of the present invention additionally provides the ECC decoding circuit of a kind of codeword polynome, this ECC decodes electricity Road includes the syndrome solving circuit of any one codeword polynome that embodiment of the present invention foregoing provided.
It should be noted that can be at such as one group of computer executable instructions in the step shown in the flow chart of accompanying drawing Computer system performs, and, although show logical order in flow charts, but in some cases, can With to be different from the step shown or described by order execution herein.
Obviously, those skilled in the art should be understood that each module of the above-mentioned present invention or each step can be with general Calculating device realize, they can concentrate on single calculating device, or is distributed in multiple calculating device institute On the network of composition, alternatively, they can realize with calculating the executable program code of device, it is thus possible to It is stored in storing in device and is performed by calculating device, or they are fabricated to respectively each integrated circuit die Block, or the multiple modules in them or step are fabricated to single integrated circuit module realize.So, the present invention It is not restricted to any specific hardware and software combine.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for the skill of this area For art personnel, the present invention can have various modifications and variations.All within the spirit and principles in the present invention, made Any modification, equivalent substitution and improvement etc., should be included within the scope of the present invention.

Claims (8)

1. the syndrome solving circuit of a codeword polynome, it is characterised in that including:
First trigger;
First multiplication unit, the input of described first multiplication unit is connected with the outfan of described first trigger Connecing, the outfan of described first multiplication unit is connected with the input of described first trigger, for will be from The multiplier factor of described first trigger is multiplied with the multiplier factor in described first multiplication unit, and is tied by gained Fruit sends to described first trigger;
Second multiplication unit, the first input end of described second multiplication unit is connected to described first multiplication unit Between the outfan of input and described first trigger, the second input of described second multiplication unit is for dividing Do not receive the first codeword polynome and the polynomial coefficient of the second code word, for by described first codeword polynome Coefficient is multiplied by the first multiplier factor received, and obtains the first output result, and by multinomial for described second code word The coefficient of formula is multiplied by the second multiplier factor received, and obtains the second output result;
Adder, the first input end of described adder is connected with the outfan of described second multiplication unit, uses In receiving described first output result and described second output result, and described first will export result and described the Two output results added;And
Second trigger, the input of described second trigger is connected with the outfan of described adder, described The outfan of the second trigger is connected with the second input of described adder, for adding up in described adder Export the accumulation result of described adder after end, obtain syndrome.
Syndrome solving circuit the most according to claim 1, it is characterised in that described first multiplication unit includes One multiplier and the second multiplier, described second multiplication unit includes the 3rd multiplier and the 4th multiplier, wherein,
The input of described first multiplier is connected with the outfan of described first trigger, described first multiplication The outfan of device is connected with the input of described second multiplier, and the outfan of described second multiplier is with described The input of the first trigger is connected,
The first input end of described 3rd multiplier be connected to described first trigger and described first multiplier it Between, the second input of described 3rd multiplier is for receiving the first component of described first codeword polynome respectively Coefficient and the coefficient of polynomial first component of described second code word, the outfan of described 3rd multiplier and institute The first input end stating adder is connected, for being taken advantage of by the coefficient of the first component of described first codeword polynome With the first multiplier factor of described first trigger output, obtain the first sub-result of output, and by described second The coefficient of the first component of codeword polynome is multiplied by the second multiplier factor of described first trigger output, obtains the Two export sub-result,
The first input end of described 4th multiplier be connected to described first multiplier and described second multiplier it Between, the second input of described 4th multiplier is for receiving the second component of described first codeword polynome respectively Coefficient and the coefficient of the described second polynomial second component of code word, the outfan of described 4th multiplier and institute The second input stating adder is connected, for being taken advantage of by the coefficient of the second component of described first codeword polynome With the first multiplier factor of described first multiplier output, obtain the 3rd sub-result of output, and by described second The coefficient of the second component of codeword polynome is multiplied by the second multiplier factor of described first multiplier output, obtains the Four export sub-result,
Wherein, described adder be additionally operable to calculate described first export sub-result with the described 3rd export sub-result it With, obtain described first output result, and calculate the described second sub-result of output and described 4th output son knot Really sum, obtains described second output result.
Syndrome solving circuit the most according to claim 2, it is characterised in that described first multiplier and described The element α that multiplier factor in paired multiplier is in Galois Fieldi
Syndrome solving circuit the most according to claim 1, it is characterised in that described syndrome counting circuit also wraps Include:
Selector, the first input end of described selector is for receiving the element α in Galois Field0, described selection Second input of device is connected with the outfan of described first multiplication unit, the outfan of described selector and institute State the first trigger to be connected.
5. the ECC decoding circuit of a codeword polynome, it is characterised in that include institute any one of Claims 1-4 The syndrome solving circuit stated.
6. the syndrome of a codeword polynome solves processing method, it is characterised in that appoint in Claims 1-4 One described syndrome solving circuit, wherein, described syndrome solving circuit include the first trigger, second Trigger, the first multiplication unit, the second multiplication unit and adder, described syndrome solves processing method and includes:
By described first multiplication unit by multiplier factor and the described first multiplication list from described first trigger Multiplier factor in unit is multiplied, and sends acquired results to described first trigger;
By described second multiplication unit, the coefficient of the first codeword polynome received is multiplied by first received Multiplier factor, obtains the first output result, and the second polynomial coefficient of code word received is multiplied by reception The second multiplier factor arrived, obtains the second output result;
Described first output result and described second output result is received by described adder, and by described first Output result and described second output results added;And
After described adder adds up end, the accumulation result of described adder is exported by described second trigger, Obtain syndrome.
Syndrome the most according to claim 6 solves processing method, it is characterised in that described first multiplication unit bag Including the first multiplier and the second multiplier, described second multiplication unit includes the 3rd multiplier and the 4th multiplier, Wherein,
By described first multiplication unit by multiplier factor and the described first multiplication list from described first trigger Multiplier factor in unit is multiplied, and acquired results transmission is included to described first trigger:
Described first multiplier is by from the multiplier factor of described first trigger and taking advantage of in described first multiplier Number fac-tor, and acquired results is sent to described second multiplier;And
Described second multiplier is by from the acquired results of described first multiplier and taking advantage of in described second multiplier Number fac-tor, and acquired results is sent to described first trigger,
By described second multiplication unit, the coefficient of the first codeword polynome received is multiplied by first received Multiplier factor, obtains the first output result, and the second polynomial coefficient of code word received is multiplied by reception The second multiplier factor arrived, obtains the second output result and includes:
The coefficient of the first component of described first codeword polynome is multiplied by described first and triggers by described 3rd multiplier First multiplier factor of device output, obtains the first sub-result of output, and by polynomial for described second code word the The coefficient of one component is multiplied by the second multiplier factor of described first trigger output, obtains the second sub-result of output;
The coefficient of the second component of described first codeword polynome is multiplied by described first multiplication by described 4th multiplier First multiplier factor of device output, obtains the 3rd sub-result of output, and by polynomial for described second code word the Two-component coefficient is multiplied by the second multiplier factor of described first multiplier output, obtains the 4th sub-result of output; And
Described adder calculates described first and exports sub-result and the described 3rd sub-result sum of output, obtains described First output result, and calculate the described second sub-result of output and the described 4th sub-result sum of output, obtain Described second output result.
8. the ECC coding/decoding method of a codeword polynome, it is characterised in that including:
Solve processing method by the syndrome of the codeword polynome described in claim 6 or 7 and obtain described code word Polynomial syndrome;And
Syndrome according to described codeword polynome carries out ECC error correction to described codeword polynome.
CN201210276155.9A 2012-08-03 2012-08-03 The syndrome of codeword polynome solve and ECC decoding circuit and method Active CN103580700B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210276155.9A CN103580700B (en) 2012-08-03 2012-08-03 The syndrome of codeword polynome solve and ECC decoding circuit and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210276155.9A CN103580700B (en) 2012-08-03 2012-08-03 The syndrome of codeword polynome solve and ECC decoding circuit and method

Publications (2)

Publication Number Publication Date
CN103580700A CN103580700A (en) 2014-02-12
CN103580700B true CN103580700B (en) 2016-08-17

Family

ID=50051752

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210276155.9A Active CN103580700B (en) 2012-08-03 2012-08-03 The syndrome of codeword polynome solve and ECC decoding circuit and method

Country Status (1)

Country Link
CN (1) CN103580700B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1208192A (en) * 1997-08-13 1999-02-17 三星电子株式会社 Circuit for calculating error position polynomial at high speed
CN101325706A (en) * 2007-06-13 2008-12-17 卓胜微电子(上海)有限公司 Reed-Solomon decoder with low hardware spending
CN102354535A (en) * 2011-08-04 2012-02-15 记忆科技(深圳)有限公司 Logical unit multiplexing system
US8332731B1 (en) * 2009-11-05 2012-12-11 Micron Technology, Inc. Error-correcting code and process for fast read-error correction

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6286123B1 (en) * 1997-07-13 2001-09-04 Samsung Electronics Co., Ltd. Circuit for calculating error position polynomial at high speed
CN1208192A (en) * 1997-08-13 1999-02-17 三星电子株式会社 Circuit for calculating error position polynomial at high speed
CN101325706A (en) * 2007-06-13 2008-12-17 卓胜微电子(上海)有限公司 Reed-Solomon decoder with low hardware spending
US8332731B1 (en) * 2009-11-05 2012-12-11 Micron Technology, Inc. Error-correcting code and process for fast read-error correction
CN102354535A (en) * 2011-08-04 2012-02-15 记忆科技(深圳)有限公司 Logical unit multiplexing system

Also Published As

Publication number Publication date
CN103580700A (en) 2014-02-12

Similar Documents

Publication Publication Date Title
JP2020521195A5 (en)
CN106506638A (en) Block storage method and device in block chain
US20120030548A1 (en) Method and device for implementing cyclic redundancy check codes
US10877733B2 (en) Segment divider, segment division operation method, and electronic device
US7177891B2 (en) Compact Galois field multiplier engine
WO2014144941A1 (en) Modular and scalable cyclic redundancy check computation circuit
US20110246548A1 (en) Sequential galois field multiplication architecture and method
CN103762991B (en) Decoding method and system of BCH codes
CN101277119B (en) Method for complexing hardware of Reed Solomon code decoder as well as low hardware complex degree decoding device
US20040078555A1 (en) Processor having a finite field arithmetic unit
US7403964B2 (en) Galois field multiplier array for use within a finite field arithmetic unit
CN112367158A (en) Method for accelerating SM3 algorithm, processor, chip and electronic equipment
CN105337619B (en) A kind of BCH code coding/decoding method and device
CN107451008A (en) A kind of CRC computational methods and device
CN103580700B (en) The syndrome of codeword polynome solve and ECC decoding circuit and method
CN108768407A (en) A kind of Hard decision decoding device framework of low hardware cost, high-throughput
US20120324319A1 (en) High throughput frame check sequence module architecture
CN103763064A (en) CRC code generating method and circuit applicable to ultra-high-speed communication system
CN108243113B (en) Random load balancing method and device
CN105790887A (en) Method and device for generating parallel CRC values for packets
US20200412649A1 (en) Crc update mechanism
US20180006664A1 (en) Methods and apparatus for performing reed-solomon encoding by lagrangian polynomial fitting
CN104796156B (en) LDPC decoder and LDPC coding/decoding method
CN102594370B (en) High-efficient low-delay parallel Chien search method and device
CN103034698B (en) Date storage method and device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP03 Change of name, title or address
CP03 Change of name, title or address

Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094

Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd.

Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing

Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc.