CN103515224B - Polysilicon quick annealing method after ion implantation - Google Patents
Polysilicon quick annealing method after ion implantation Download PDFInfo
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- CN103515224B CN103515224B CN201210219690.0A CN201210219690A CN103515224B CN 103515224 B CN103515224 B CN 103515224B CN 201210219690 A CN201210219690 A CN 201210219690A CN 103515224 B CN103515224 B CN 103515224B
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- polysilicon
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/005—Oxydation
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/02—Heat treatment
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Abstract
The present invention provides a kind of polysilicon rapid thermal annealing (Rapid Thermal Anneal, RTA) method after ion implantation, belongs to the preparing technical field of polycrystalline silicon semiconductor.The method for being doped the polysilicon layer in the range of activating with acquisition predetermined resistance after ion implantation doping by the polysilicon on wafer, wherein, during rapid thermal annealing, while being passed through nitrogen in the chamber to the rapid thermal anneal er residing for described wafer, it is passed through oxygen to improve the uniformity of the resistance of the polysilicon on described wafer.The resistance homogeneity of the prepared polysilicon layer formed of this RTA method is good, yield rate height and low cost of manufacture.
Description
Technical field
The invention belongs to the preparing technical field of polycrystalline silicon semiconductor, relate to polysilicon Rapid Thermal after ion implantation and move back
Fire (Rapid Thermal Anneal, RTA) method.
Background technology
In chip manufacturing field, polycrystalline silicon semiconductor is widely used, and such as, is used for forming polygate electrodes, or
It is used for being formed the resistance of specific resistance.Normally, the preparation process of the polycrystalline silicon semiconductor applied in chip generally comprise with
Lower step: the unadulterated polysilicon layer of (1) formation of deposits (now resistance is big, is not suitable for use in conductor)；(2) ion implanting is passed through
(Ion implantation, IMP) method realizes polysilicon doping；(3) rapid thermal annealing is to activate polysilicon doping.
Normally, in above rapid thermal annealing process, it is passed through the N of advantage of lower cost2As protective gas.Applicant
Find, when using this traditional RTA technique that polysilicon doping is activated, the distribution of resistance of the polysilicon being easily caused on wafer
Uneven.Fig. 1 show the distribution of resistance situation of polysilicon obtained by the RTA technique using prior art.At example shown in Fig. 1
In, the polysilicon being distributed on wafer is after RTA, and its resistance value distribution is the most uneven, except the electricity of fraction polysilicon
Resistance meets outside target zone value (target resistance range: 150-200 Ω/) requirement, and other are all beyond this target zone value.Cause
This, the problem of polysilicon resistance lack of homogeneity after RTA technique, hence it is evident that yield will be caused to be greatly reduced.
For avoiding the problem of resistance homogeneity difference after this RTA, the method for annealing such as furnace anneal can be used to substitute RTA
Realize doping to activate.But, use other method for annealing easily to affect the dopant profiles of outer portion of polysilicon, such as, use
When furnace anneal comes poly-silicon annealing, the doping in front-end architecture can be produced impact, thus affect the performance of MOS device etc.
Parameter.This be also polysilicon preparation process in basic selection use RTA to realize the reason that doping activates, therefore, other move back
Ignition method practical feasibility is poor.
Summary of the invention
It is an object of the invention to, improve polysilicon resistance homogeneity after RTA processes.
For realizing object above or other purposes, the present invention provides a kind of quick thermal annealing method, for by wafer
Polysilicon be doped after ion implantation doping and activate to obtain the polysilicon layer in the range of predetermined resistance, wherein, soon
During speed thermal annealing, while being passed through nitrogen in the chamber to the rapid thermal anneal er residing for described wafer, it is passed through
Oxygen is to improve the uniformity of the resistance of the polysilicon on described wafer.
Preferably, described nitrogen may range from 2:1 to 4000:1 with the flow-rate ratio of described oxygen.
Further, it is preferable that described nitrogen and the flow-rate ratio substantially 4000:1 of described oxygen.
Preferably, the temperature of described rapid thermal annealing is more than or equal to 900 DEG C.
The solution have the advantages that, by when being passed through nitrogen and annealing, be passed through a certain amount of oxygen, can improve
The resistance homogeneity of polysilicon RTA, so that in the range of polysilicon easily reaches predetermined resistance, significantly providing the product of polysilicon
Quality and yield, reduce production cost.
Accompanying drawing explanation
From combine accompanying drawing described further below, it will make the above and other purpose of the present invention and advantage more complete
Clear, wherein, same or analogous key element is adopted and is indicated by the same numeral.
Fig. 1 is the distribution of resistance situation of polysilicon obtained by the RTA technique using prior art.
Fig. 2 is the wafer the comprising polysilicon layer schematic diagram carrying out rapid thermal annealing in rapid thermal anneler.
Fig. 3 is that the RTA method according to one embodiment of the invention carries out showing of rapid thermal annealing in rapid thermal anneler
It is intended to.
Fig. 4 is that the distribution of resistance being respectively adopted the polysilicon on the wafer obtained by RTA method shown in table one and table two is shown
Being intended to, wherein (a) is the distribution of resistance schematic diagram according to the polysilicon on the wafer obtained by RTA method shown in table one, and (b) is
Distribution of resistance schematic diagram according to the polysilicon on the wafer obtained by RTA method shown in table two.
Detailed description of the invention
Be described below is that the multiple of the present invention may some in embodiments, it is desirable to provide basic to the present invention
Solve, it is no intended to confirm the crucial of the present invention or conclusive key element or limit scope of the claimed.Easy to understand, according to this
The technical scheme of invention, under the connotation not changing the present invention, one of ordinary skill in the art can propose can be mutual
Other implementations replaced.Therefore, detailed description below and accompanying drawing are only the examples to technical scheme
Property explanation, and be not to be construed as the whole of the present invention or be considered as technical solution of the present invention is defined or limited.
The problem that resistance based on above polysilicon is uneven, as described in the background art, first applicant have found
The reason of problem is owing to RTA process is caused, and further, applicant is by various experiments and exploration, it was found that in RTA process
In cause the uneven main cause of the resistance of polysilicon.
Normally, polysilicon RTA process after ion implantation is to complete in corresponding rapid thermal anneal er, example
As, complete in rapid thermal anneler.It is quick that Fig. 2 show the wafer comprising polysilicon layer carrying out in rapid thermal anneler
The schematic diagram of thermal annealing.Applicant's application carries out RTA process with the existing RTA technological parameter of following table one, and, in annealing process
In, as in figure 2 it is shown, the fire door that the positioning recess (notch) 21 of wafer is directed at rapid thermal anneal er 100 is placed, (fire door is
The import and export of wafer), wafer carries out rapid thermal annealing in its chamber.
Table one existing RTA technological parameter
Find after more wafers is repeated above RTA process, can test and obtain distribution of resistance knot similar to Figure 1
Really, the most only resistance near positioning recess 21 is normal, and the resistance of other parts (being relatively distant from the wafer segment of fire door) is higher, not
In the range of falling into target resistance rate.This regularity (position correlation of distribution of resistance) phenomenon cause it is found by the applicant that, it may be possible to
The wafer segment resistance caused near fire door owing to fire door sealing effectiveness is the best is relatively low.Applicant further study show that, at RTA
Annealing (anneal) during use N2As protective gas, and in annealing pyroprocess, N2May be with polysilicon membrane
Reaction causes resistance abnormal higher.
Accordingly, applicant creatively proposes a kind of RTA method for polysilicon after ion implantation, i.e. exists
A certain amount of oxygen (O the most also it is passed through during RTA2).
Fig. 3 show the RTA method according to one embodiment of the invention and carries out rapid thermal annealing in rapid thermal anneler
Schematic diagram.Shown in Fig. 3, in this embodiment, use carries out RTA process with the RTA technological parameter shown in following table two.
The RTA technological parameter of table two present invention one example
As shown in Fig. 3 and Biao bis-, during annealing (anneal), in the chamber of RTA device, it is passed through N simultaneously2And O2,
In this example, N2Flow be 4slm(Standar Litre per Minute, mark condition under Liter Per Minute), O2Flow be
1sccm(Standar Cubic Centimeter per Minute, under mark condition, milliliter is per minute), the flow-rate ratio of the two is substantially
It is 1000.It is to be appreciated that N2With O2Flow-rate ratio be not limited to example disclosed by the invention, such as, by the N of chamber2With
O2Flow-rate ratio can more than or equal to 2:1 and less than or equal to 4000:1(such as, 1:1). O2During annealing, polycrystalline
Silicon and O2A little oxidation reaction may suppression N2React with polysilicon, and then avoid on polysilicon resistance during RTA
Rise, thus avoid the uneven situation of resistance and occur.It is to be appreciated that during this RTA, polysilicon and a little O2It
Between oxidation reaction fewer, it, substantially without affecting the resistance of polysilicon, does not interferes with the performance of polysilicon yet.
During the RTA of this embodiment, the temperature of annealing is preferably provided in more than 900 DEG C, time more than 900 DEG C,
It is passed through fraction of O simultaneously2In terms of the resistance homogeneity improving polysilicon, effect is more notable.
The resistance of the polysilicon that Fig. 4 show on the wafer obtained by the RTA method shown in table one and table two that is respectively adopted divides
Cloth schematic diagram, wherein (a) is the distribution of resistance schematic diagram according to the polysilicon on the wafer obtained by RTA method shown in table one,
B () is the distribution of resistance schematic diagram according to the polysilicon on the wafer obtained by RTA method shown in table two.Wherein, Fig. 4 (a) is also
The distribution of resistance of fundamental reaction shown result, i.e. polysilicon is uneven, resistance (RS) near fire door at 140 Ω/, and
From fire door place farther out, resistance reaches 400 Ω/about.Polysilicon shown in Fig. 4 (b) is after being passed through a little oxygen, electric
Resistance is evenly distributed and substantially at 140 Ω/about, meets predetermined resistance range value requirement.
Therefore, in the RTA method disclosed in this embodiment, use the method increasing the oxygen being passed through certain flow to solve
The problem that the polysilicon on wafer resistance after RTA processes is uneven, improves product quality and yield, is greatly saved chip
Production cost.
It is to be appreciated that in the art, during the RTA to polysilicon, it is common that avoid being passed through oxygen
Gas is in chamber, to avoid polysilicon oxidized；And in the present invention, utilize opening of the distribution of resistance position correlation with fire door
Sending out, use a certain amount of oxygen to improve the uniformity of the resistance of the polysilicon on wafer, this is that those skilled in the art are at this
Before invention discloses, institute is unforeseeable.
Further, during the RTA that the present invention provides, go for various types of rapid thermal anneal er, also fit
RTA process after various ion implantation doping process conditions, the unadulterated polysilicon layer before ion implanting concrete
Preparation method process etc. is not limited by the present invention.
Example above primarily illustrates the polysilicon quick thermal annealing method of the present invention.Although only to the some of them present invention
Embodiment be described, but those of ordinary skill in the art are it is to be appreciated that the present invention can be without departing from its spirit
Implement with other forms many with in scope.Therefore, the example shown and embodiment are considered schematic rather than limit
Property processed, in the case of without departing from spirit and scope of the present invention as defined in appended claims, the present invention may be contained
Cover various amendments and replacement.
Claims (4)
1. a quick thermal annealing method, for being doped activation to obtain after ion implantation doping by the polysilicon on wafer
Obtain the polysilicon layer in the range of predetermined resistance, it is characterised in that during rapid thermal annealing, to residing for described wafer
While being passed through nitrogen in the chamber of rapid thermal anneal er, it is passed through oxygen to improve the resistance of the polysilicon on described wafer
Uniformity；
Wherein, described rapid thermal anneal er has the fire door of the import and export as wafer.
2. quick thermal annealing method as claimed in claim 1, it is characterised in that described nitrogen and the flow-rate ratio model of described oxygen
Enclose for 2:1 to 4000:1.
3. quick thermal annealing method as claimed in claim 2, it is characterised in that described nitrogen is big with the flow-rate ratio of described oxygen
Cause as 4000:1.
4. quick thermal annealing method as claimed in claim 1 or 2, it is characterised in that the temperature of described rapid thermal annealing is more than
Or equal to 900 DEG C.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210219690.0A CN103515224B (en) | 2012-06-29 | 2012-06-29 | Polysilicon quick annealing method after ion implantation |
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| CN201210219690.0A CN103515224B (en) | 2012-06-29 | 2012-06-29 | Polysilicon quick annealing method after ion implantation |
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| CN103515224B true CN103515224B (en) | 2016-12-21 |
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| CN105826192A (en) * | 2015-01-07 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | Method for improving resistance uniformity of annealing process of polycrystalline silicon |
| CN113394094B (en) * | 2020-03-13 | 2023-04-07 | 中芯国际集成电路制造（天津）有限公司 | Method for forming semiconductor device |
| CN111968909B (en) * | 2020-10-22 | 2021-02-09 | 晶芯成(北京)科技有限公司 | Method for manufacturing semiconductor structure |
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| CN101192539B (en) * | 2006-11-28 | 2010-09-29 | 中芯国际集成电路制造(上海)有限公司 | Device manufacture method and device electrical performance regulation method |
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