CN103400796B - Etching technology for dual depth shallow trench isolation groove - Google Patents
Etching technology for dual depth shallow trench isolation groove Download PDFInfo
- Publication number
- CN103400796B CN103400796B CN201310354785.8A CN201310354785A CN103400796B CN 103400796 B CN103400796 B CN 103400796B CN 201310354785 A CN201310354785 A CN 201310354785A CN 103400796 B CN103400796 B CN 103400796B
- Authority
- CN
- China
- Prior art keywords
- shallow trench
- etching
- isolation groove
- trench
- dual depth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention discloses an etching technology for a dual depth shallow trench isolation groove. The etching technology comprises the following steps: providing a substrate, and performing photoetching gumming and development to the substrate; etching the substrate to form primary shallow trenches and cleaning the primary shallow trenches; performing photoresist filling and development to one of the primary shallow trenches; etching the bottom rounded corner of the other primary shallow trench; further etching the etched primary shallow trench to form a secondary comparatively deep trench; removing the photoresist and cleaning the secondary comparatively deep trench. According to the invention, after the primary shallow trenches are formed and one of the primary shallow trenches is subjected to photoresist filling and development, only the bottom rounded corner of the other primary shallow trench is subjected to etching, so that the side wall shape and appearance of the primary shallow trenches are retained, and the problem that the trench side wall forms different tilt angles after the trench etching for two times is eliminated.
Description
Technical field
The present invention relates to IC manufacturing field, particularly a kind of etching technics of dual depth shallow trench isolation groove.
Background technology
After microelectronic technique enters the deep-submicron stage, for realizing high density, high performance large scale integrated circuit, the isolation technology between semiconductor device becomes more and more important.Prior art generally adopts shallow trench isolation technology (STI) to realize the isolation of active device.
At present, for reducing manufacturing cost, when carrying out STI technique, normally on the more shallow depth groove formed (Depth1from STI1) basis, being developed in peripheral logic area, continuing to do and spending etching groove (Depth2from STI2) more deeply.Its step comprises: 1) on substrate, carry out photoetching gluing and development; 2) first comparatively shallow trench etching and cleaning is carried out to substrate; 3) photoresist is filled and development; 4) second is carried out more deep plough groove etched; 5) photoresist is removed and cleaning.But, on established more shallow depth groove basis, then continue to do etching groove to form the comparatively deep trench in peripheral logic district, be easy to form different inclination angles at sidewall.Main bugbear is, by first compared with the impact bottom shallow trench, intensive pattern area (dense pattern) can form the pattern of V word, this is comparatively unfavorable to follow-up trench oxide filling (HDP process), and process window is very little, be easy to, at broad area pattern (ISO pattern), etching stopping phenomenon occurs.
Summary of the invention
The invention provides a kind of etching technics of dual depth shallow trench isolation groove, to eliminate the different angle problem that trenched side-wall after twice etching groove is formed.
For solving the problems of the technologies described above, the invention provides a kind of etching technics of dual depth shallow trench isolation groove, comprising:
Substrate is provided, photoetching gluing and development are carried out to described substrate;
First shallow trench is formed to described substrate etching and cleans;
Photoresist filling and development are carried out to one of them first shallow trench;
The bottom roundings of another first shallow trench is etched;
The above-mentioned first shallow trench of further etching, forms second comparatively deep trench;
Remove described photoresist and clean.
As preferably, first shallow trench is being formed to described substrate etching and in cleaning step, is adopting HBr, O2 or HBr, O2 and SF6 as etching gas.
As preferably, the O2 range of flow in described etching gas is 7 ~ 11sccm.
As preferably, the bottom roundings of mist to first shallow trench containing Cl2, HBr, O2, N2 and He is adopted to etch.
As preferably, the bottom roundings of dry etch process to first shallow trench is adopted to etch.
As preferably, adopt the mist containing HBr and O2 to etch first shallow trench further, form second comparatively deep trench.
As preferably, the sidewall inclination angle of described first shallow trench is 85.5 ~ 87 degree, and bottom width is 450 ~ 500 dusts.
As preferably, before etching the bottom roundings of another first shallow trench, first etching removes the oxide of this first shallow trench sidewall.
Compared with prior art, the present invention has the following advantages: the present invention is after formation first shallow trench, after photoresist filling and development are carried out to one of them first shallow trench, only the bottom roundings of another first shallow trench is etched, the sidewall profile of continuity first shallow trench, eliminates the different angle problem that trenched side-wall after twice etching groove is formed.
Accompanying drawing explanation
Device architecture schematic diagram after each processing step that Fig. 1 ~ 5 are respectively the present invention one specific embodiment completes;
Fig. 6 is the flow chart of the etching technics of dual depth shallow trench isolation groove in the present invention one specific embodiment.
Embodiment
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.It should be noted that, accompanying drawing of the present invention all adopts the form of simplification and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
Please refer to Fig. 1 ~ 6, the etching technics of dual depth shallow trench isolation groove provided by the invention, comprising:
Step 1: provide substrate 100, carries out photoresist 200 at described substrate 100 and fills and develop.Specifically please refer to Fig. 1, described substrate 100 comprises silicon substrate 110, oxygen pad layer 120 and SiN layer 130 from bottom to top successively.
Step 2: as shown in Figure 2, etches described substrate 100 and forms first shallow trench 300 and clean.Preferably, adopt HBr, O2 or HBr, O2 and SF6 as etching gas, after having etched, carry out acid tank cleaning.Particularly, by controlling the flow of O2 in described etching gas, the smooth-sided of first shallow trench 300 can be made, making the bottom of first shallow trench 300 more smooth simultaneously, to reduce the impact of bottom roundings on subsequent etching.
In the present embodiment, when O2 range of flow in described etching gas is 7 ~ 11sccm, etching effect is best, the sidewall inclination angle of first shallow trench 300 can be made to expand as 85.5 ~ 87 degree by original 85 degree, bottom width expands as 450 ~ 500 dusts by 320 original dusts, for second comparatively deep trench 400 etch and form U-shaped looks and provide more Alternative to regulate space.
Step 3: as shown in Figure 3, carries out photoresist 200 to one of them first shallow trench 300 and fills and develop.
Step 4: etching removes the oxide of another first shallow trench 300 sidewall, further, the gas of employing containing CF4 etches the oxide on described first shallow trench 300 sidewall.
Step 5: etch the bottom roundings of this first shallow trench 300, the groove shape after having etched as shown in Figure 4.Particularly, the mist containing Cl2, HBr, O2, N2 and He is adopted to carry out dry etching to the bottom roundings of first shallow trench 300, in order to eliminate fillet outstanding bottom first shallow trench 300.When HBr in mist can reduce this step etching, on the impact of first shallow trench 300 upper portion side wall, thus the sidewall profile of first shallow trench 300 can be continued.
Step 6: the above-mentioned first shallow trench 300 of etching further, forms second comparatively deep trench 400.Adopt the mist etched substrate 100 containing HBr and O2 to arrive target depth, form channel bottom round and smoothization simultaneously.Now, the trenched side-wall of intensive pattern area and half intensive pattern area is all comparatively round and smooth.
It should be noted that, described second is determined by actual production conditions compared with the target depth of deep trench 400, and the present invention does not limit at this.
Step 7: specifically as shown in Figure 5, remove described photoresist 200 and clean.
In sum, the etching technics of dual depth shallow trench isolation groove provided by the invention, comprising: provide substrate 100, carries out photoresist 200 fill and develop described substrate 100; Described substrate 100 is etched and forms first shallow trench 300 and clean; Carry out photoresist 200 to one of them first shallow trench 300 fill and develop; The bottom roundings of another first shallow trench 300 is etched; The above-mentioned first shallow trench 300 of further etching, forms second comparatively deep trench 400; Remove described photoresist 200 and clean.The present invention is by 1) the round and smooth degree in inclination angle and bottom of first shallow trench 300 is optimized; 2) have selected suitable etching gas to etch first shallow trench 300 fillet, and then carry out subsequent etching and bottom round and smoothization; Two aspects are improved, thus obtain smoother trenched side-wall, eliminate the different angle phenomenon of trenched side-wall, the filling of follow-up trench oxide.
Obviously, those skilled in the art can carry out various change and modification to invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (6)
1. an etching technics for dual depth shallow trench isolation groove, is characterized in that, comprising:
Substrate is provided, photoetching gluing and development are carried out to described substrate;
Adopt HBr, O
2or HBr, O
2and SF
6as etching gas, first shallow trench is formed to described substrate etching and cleans;
Photoresist filling and development are carried out to one of them first shallow trench;
Adopt containing Cl
2, HBr, O
2, N
2etch with the bottom roundings of mist to another first shallow trench of He;
The above-mentioned first shallow trench of further etching, forms second comparatively deep trench;
Remove described photoresist and clean.
2. the etching technics of dual depth shallow trench isolation groove as claimed in claim 1, is characterized in that, the O in described etching gas
2range of flow is 7 ~ 11sccm.
3. the etching technics of dual depth shallow trench isolation groove as claimed in claim 1, is characterized in that, adopts the bottom roundings of dry etch process to first shallow trench to etch.
4. the etching technics of dual depth shallow trench isolation groove as claimed in claim 1, is characterized in that, adopts containing HBr and O
2mist etch first shallow trench further, form second comparatively deep trench.
5. the etching technics of dual depth shallow trench isolation groove as claimed in claim 1, it is characterized in that, the sidewall inclination angle of described first shallow trench is 85.5 ~ 87 degree, and bottom width is 450 ~ 500 dusts.
6. the etching technics of dual depth shallow trench isolation groove as claimed in claim 1, is characterized in that, before etching the bottom roundings of another first shallow trench, first etching removes the oxide of this first shallow trench sidewall.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310354785.8A CN103400796B (en) | 2013-08-14 | 2013-08-14 | Etching technology for dual depth shallow trench isolation groove |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310354785.8A CN103400796B (en) | 2013-08-14 | 2013-08-14 | Etching technology for dual depth shallow trench isolation groove |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103400796A CN103400796A (en) | 2013-11-20 |
| CN103400796B true CN103400796B (en) | 2015-07-08 |
Family
ID=49564394
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310354785.8A Active CN103400796B (en) | 2013-08-14 | 2013-08-14 | Etching technology for dual depth shallow trench isolation groove |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103400796B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102016105255B4 (en) | 2016-03-21 | 2020-06-18 | X-Fab Semiconductor Foundries Ag | Method for producing isolation trenches of different depths in a semiconductor substrate |
| CN107887270A (en) * | 2017-11-14 | 2018-04-06 | 扬州扬杰电子科技股份有限公司 | The lithographic method of groove on a kind of chip |
| CN108649014A (en) * | 2018-05-10 | 2018-10-12 | 武汉新芯集成电路制造有限公司 | A kind of shallow groove isolation structure and preparation method thereof |
| CN110148580B (en) * | 2019-05-15 | 2021-07-02 | 上海集成电路研发中心有限公司 | Double-depth shallow trench isolation groove and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101599454A (en) * | 2008-06-05 | 2009-12-09 | 联华电子股份有限公司 | Semiconductor element isolating structure and forming method thereof |
| CN102044470A (en) * | 2009-10-16 | 2011-05-04 | 台湾积体电路制造股份有限公司 | Integrated circuit with multi recessed shallow trench isolation |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020192969A1 (en) * | 2001-04-26 | 2002-12-19 | Becky Losee | Method for etching silicon trenches |
| KR100390918B1 (en) * | 2001-08-30 | 2003-07-12 | 주식회사 하이닉스반도체 | a method for manufacturing of semiconductor memory device |
| US6849518B2 (en) * | 2002-05-07 | 2005-02-01 | Intel Corporation | Dual trench isolation using single critical lithographic patterning |
-
2013
- 2013-08-14 CN CN201310354785.8A patent/CN103400796B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101599454A (en) * | 2008-06-05 | 2009-12-09 | 联华电子股份有限公司 | Semiconductor element isolating structure and forming method thereof |
| CN102044470A (en) * | 2009-10-16 | 2011-05-04 | 台湾积体电路制造股份有限公司 | Integrated circuit with multi recessed shallow trench isolation |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103400796A (en) | 2013-11-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104009036B (en) | The method for manufacturing multigate device | |
| KR102010188B1 (en) | Method for integrated circuit patterning | |
| CN103400796B (en) | Etching technology for dual depth shallow trench isolation groove | |
| KR102274762B1 (en) | Method for fabricating semiconductor device | |
| CN106298467A (en) | The manufacture method of semiconductor element pattern | |
| CN103227111B (en) | The manufacture method of semiconductor device | |
| CN103794490A (en) | Method for forming self-aligned double pattern | |
| CN103515282A (en) | Fin field-effect transistor and forming method thereof | |
| KR20070056389A (en) | Method for fabricating the same of semiconductor device with recess gate of flask shape | |
| KR102491694B1 (en) | method of fabricating semiconductor device | |
| CN105118775A (en) | A shield grid transistor formation method | |
| CN110838449A (en) | Method for manufacturing fin body | |
| CN105006447A (en) | Method for manufacturing semiconductor | |
| US7595252B2 (en) | Method of manufacturing a semiconductor memory device | |
| CN104134628A (en) | Manufacturing method of shallow trench isolation structure | |
| CN104835776A (en) | TSV blind hole manufacturing method | |
| CN104979173A (en) | Semiconductor structure and forming method thereof | |
| CN109273443B (en) | Manufacturing method of SONOS device | |
| US10192777B2 (en) | Method of fabricating STI trench | |
| CN103400795B (en) | Shallow trench isolation technology | |
| CN103996603A (en) | Self-alignment double-layer figure semiconductor structure manufacturing method | |
| CN104851834A (en) | Semiconductor device preparation method | |
| CN104538360B (en) | A kind of memory cell grid preparation method of flash memory | |
| KR100898659B1 (en) | Method of manufacturing flash memory device | |
| CN209045527U (en) | Fleet plough groove isolation structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |