CN103367291A - 封装件层叠结构及其形成方法 - Google Patents

封装件层叠结构及其形成方法 Download PDF

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Publication number
CN103367291A
CN103367291A CN2012105875119A CN201210587511A CN103367291A CN 103367291 A CN103367291 A CN 103367291A CN 2012105875119 A CN2012105875119 A CN 2012105875119A CN 201210587511 A CN201210587511 A CN 201210587511A CN 103367291 A CN103367291 A CN 103367291A
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packaging part
connector
opening
moulding compound
semiconductor device
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CN103367291B (zh
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郑荣伟
王宗鼎
李建勋
庄钧智
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

所描述的形成用于封装件层叠的接合结构的实施方式包括去除下封装件的部分连接件和的模塑料。所描述的接合结构能够使得上封装件的连接件与下封装件的连接件的置放和对准更容易。因此，接合工艺的工艺窗口更宽。另外，接合结构具有更光滑的连接轮廓和平坦的接合面。因此，接合结构不太可能断裂。改进了封装件层叠结构的产量和形状因数。本发明还公开了封装件层叠结构及其形成方法。

Description

封装件层叠结构及其形成方法
相关申请交叉引用
本申请要求2012年3月28日提交的申请号为61/616,958的美国临时专利申请的优先权，该申请通过引用全部并入本文中。
技术领域
本发明涉及半导体技术领域，更具体地，涉及封装件层叠结构及其形成方法。
背景技术
半导体器件被用于各种电子应用中，例如，个人电脑、手机、数码相机及以其他电子设备。半导体器件通常通过以下方式制造：在半导体衬底上方顺序沉积绝缘或者介电层、导电层以及半导体材料层，并且使用光刻图案化各种材料层以在其上形成电路部件和元件。
半导体产业通过最小部件尺寸的继续减小来继续改进各种电子部件(例如，晶体管、二极管、电阻器、电容器，等等)的集成密度，最小部件尺寸的继续减小使得允许更多部件集成在给定区域内。在一些应用中，这些更小的电子部件也要求相比于过去的封装件使用更少面积和/或更低高度的小封装件。
因此，已经开始开发新的封装技术(例如，封装件层叠(PoP))，封装件层叠中，具有器件管芯的顶部封装件接合至另一器件管芯的底部封装件。通过采用新的封装技术，可提高封装的集成水平。半导体的这些较新类型的封装技术面临制造挑战。
发明内容
为了解决现有技术中所存在的问题，根据本发明的一个方面，提供了一种封装半导体器件，包括：
具有第一半导体管芯的第一封装件；
具有第二半导体管芯的第二封装件；
位于所述第一封装件和所述第二封装件之间的多个接合结构，其中，所述多个接合结构连接位于所述第一封装件和所述第二封装件之间的导电元件，其中所述多个接合结构中的每一个都包括直线形侧壁。
在可选实施例中，所述直线侧壁与所述第二封装件的模塑料相邻。
在可选实施例中，所述多个接合结构形成多行和多列，在相同行或者相同列中的相邻接合结构之间不存在模塑料。
在可选实施例中，相邻行或相邻列的接合结构通过模塑料隔离。
在可选实施例中，所述多个接合结构填充在所述第二封装件的模塑料中形成的开口，其中每个所述开口都具有直线形侧壁。
在可选实施例中，每个所述开口都具有范围在大约100μm和大约350μm之间的宽度。
在可选实施例中，所述直线形侧壁具有范围在大约50μm和大约250μm之间的长度。
在可选实施例中，所述多个接合结构具有范围在大约200μm和大约400μm之间的间距。
在可选实施例中，所述多个接合结构中的每一个都具有颈部，所述颈部具有范围为大约90度至大约180度的界面夹角。
在可选实施例中，所述多个接合结构中的每一个都具有范围在100μm和大约350μm之间的高度。
在可选实施例中，所述多个接合结构中的每一个都具有与围绕所述第二封装件的模塑料的表面处于相同水平的颈部。
在可选实施例中，所述多个接合结构中的每一个都具有与围绕所述第二封装件的模塑料的表面处于不同水平的颈部。
在可选实施例中，所述第二封装件具有模塑料，所述模塑料具有相对于所述模塑料的顶面成一定角度的倾斜面，所述角度的范围在大约15度和大约45度之间。
在可选实施例中，所述多个接合结构中的每一个的侧壁都连接至凹形侧壁。
在可选实施例中，所述多个接合结构中的每一个的所述直线形侧壁通过与所述直线形侧壁基本垂直的面连接至凹形侧壁。
在可选实施例中，在所述多个接合结构之间存在表面，所述表面低于所述第二半导体管芯的表面。
根据本发明的另一方面，还提供了一种封装半导体器件，包括：
具有第一半导体管芯的第一封装件；
具有第二半导体管芯的第二封装件；
位于所述第一封装件和所述第二封装件之间的多个接合结构，其中，所述多个接合结构连接位于所述第一封装件和所述第二封装件之间的导电元件，所述多个接合结构中的每一个都包括直线形侧壁，所述多个接合结构形成多行和多列，在相同行或者相同列中的相邻接合结构之间不存在模塑料。
根据本发明的又一方面，还提供了一种形成半导体器件封装件的方法，包括：
在第一半导体管芯的第一封装件的第一连接件上方形成开口，其中，所述开口通过去除所述第一连接件的部分导电材料和围绕所述第一连接件的部分模塑料来形成；
在所述第一封装件上方置放具有第二半导体管芯的第二封装件，其中，所述第二封装件的第二连接件至少位于所述开口中；
进行回流焊以将所述第二连接件和所剩余的第一连接件接合以形成接合结构。
在可选实施例中，形成所述开口包括：使用材料去除工具来去除所述第一封装件上的所述第一连接件和其他连接件以及围绕所述第一连接件和其他连接件的所述模塑料。
在可选实施例中，所述开口的宽度等于或者大于所述第一连接件的最大宽度。
附图说明
为了更完整的理解本发明及其优点，现将结合附图所进行的以下描述作为参考，其中：
图1A、1B、1E和1F是根据一些实施方式的形成封装件层叠(POP)结构的连续工艺的截面图。
图1C(I)-(IV)是根据一些实施方式的材料去除器的端部的各种形状。
图1D(I)-(III)是根据一些实施方式的连接件上方的开口的各种形状。
图1E是根据一些实施方式的置放在另一个封装件上方的封装件的截面图。
图1F是根据一些实施方式的接合至另一个封装件的封装件的截面图。
图1G是根据一些实施方式的在连接件上方形成开口之后的封装件的俯视图。
图2A是根据一些实施方式的接合结构的放大的截面图。
图2B是根据一些实施方式的图2A的部分接合结构的放大的截面图。
图2C是根据一些其他实施方式的接合结构的放大的截面图。
图1A和3A-3C是根据一些实施方式的形成封装件层叠(POP)结构的连续工艺的截面图。
图3D是根据一些实施方式的在连接件上方形成开口之后的封装件的俯视图。
图1A和4A-4C是根据一些实施方式的形成封装件层叠(POP)结构的连续工艺的截面图。
图4D是根据一些实施方式的形成在连接件上方的开口的截面图。
图4E是根据一些实施方式的在形成在连接件上方开口之后的封装件的俯视图。
图5A-5D是根据一些实施方式的形成封装件层叠(POP)结构的连续工艺的截面图。
除非另有所指，不同附图中对应的数字和符号通常指相对应的部分。附图为了清楚地示例说明实施方式的相关方面而绘制，因而不必按比例绘制。
具体实施方式
下面详细讨论本发明实施方式的制造和使用。然而，应该理解本发明提供了可以在各种具体环境中实现的许多可应用的概念。所阐述的具体实施方式仅仅示出了制造和使用本发明的具体方式，而不用于限制本发明的范围。
图1A、1B、1E和1F为根据一些实施方式的形成封装件层叠(PoP)结构的连续工艺的截面图。图1A是根据一些实施方式的封装件120的截面图。封装件120包括半导体管芯105。然而，封装件120可能包括两个或者多个半导体管芯。半导体管芯105包括半导体集成电路制造中采用的衬底，并且集成电路可形成在其内和/或其上。半导体衬底定义成指具有半导体材料的任何结构，半导体材料包括但不限于体硅、半导体晶圆、绝缘体上硅(SOI)衬底或者硅锗衬底。还可使用包括III族、IV族以及V族元素的其他半导体材料。
可形成在半导体管芯105中的各种微电子元件的实例包括晶体管(例如，金属氧化物场效应晶体管(MOSFET)、互补金属氧化物半导体(CMOS)晶体管，双极结型晶体管(BJT)、高压晶体管、高频晶体管、p-沟道和/或n-沟道场效应晶体管(PFET/NFET)等)；电阻器；二极管；电容器；电感器；熔丝以及其他合适的元件。进行各种工艺，包括沉积、蚀刻、注入、光刻、退火和其他合适的工艺，以形成各种微电子元件。微电子元件被互连以形成集成电路器件，例如，逻辑器件、存储器件(例如，SRAM)、RF器件、输入/输出(I/O)器件、系统级芯片(SoC)器件，它们的组合，以及其他合适类型的器件。
半导体管芯105通过一些连接件106接合至衬底100。在一些实施方式中，连接件106为凸块，例如，焊料凸块、铜柱凸块，等等。连接件106与半导体管芯105的表面上的导电结构(未示出)和衬底100的表面上的导电结构(未示出)连接。衬底100由半导体晶圆或者部分晶圆制造。在一些实施方式中，衬底100包括硅、砷化镓、绝缘体上硅(“SOI”)或者其他类似的材料。在一些实施方式中，衬底100包括互连结构。在一些实施方式中，衬底100还包括无源器件(例如，电阻器、电容器、电感器等)，或者有源器件(例如，晶体管)。在一些实施方式中，衬底100包括额外的集成电路。衬底100还进一步包括衬底通孔(TVS)并且可以为中介板。另外，衬底100可由其他材料制造。例如，在一些实施方式中，衬底100为多层电路板。在一些实施方式中，衬底100还包括双马来酰亚胺三嗪(BT)树脂、FR-4(具有阻燃环氧树脂粘合剂的编织玻璃纤维构成的复合材料)，FR-5、陶瓷、玻璃、塑料、胶带、胶片或者可支撑所需的用于接纳导电端子的导电垫或者焊盘的其他支撑材料。
封装件120还包括围绕半导体管芯105的一些连接件102。根据一些实施方式，如图1A中所示，连接件102嵌入模塑料101中，模塑料101覆盖半导体管芯105、连接件102和衬底100之间的空间。连接件102由导电材料制造，例如，焊锡、焊锡合金，等等。连接件102形成在衬底100表面上的导电结构(未示出)上以电连接衬底100中的元件。连接件102还可用于与置放在封装件120上方的封装管芯(未示出，将在下面描述)上的导电元件电接触。连接件120的最大宽度为W并且连接件102的高度为H。在一些实施方式中，W在大约100μm和大约350μm之间。在一些实施方式中，H在大约100μm和大约300μm之间。在一些实施方式中，连接件102的间距P在大约200μm和大约400μm之间。
图1B示出了根据一些实施方式的封装件120和材料去除工具107的截面图。材料去除工具107用于去除连接件102的一部分和模塑料101的围绕连接件102的所去除导电材料的部分。材料去除工具100可包括材料去除器108和支持件109以支持材料去除器108并且控制它的移动。材料去除器108由硬度能使材料去除器108去除至少部分连接件102和模塑料101的材料制造。在一些实施方式中，材料去除器108包括金刚石(至少在端部108a)。根据一些实施方式，如图1C所示，材料去除器108的端部108a可以为各种形状，例如，矩形108a(I)、半球形108a(II)、金字塔形108a(III)或者叶尖形(blade-tip shape)108a(IV)。图1C中示出的端部108a的形状仅是实例。只要它们可去除至少部分连接件102和模塑料101，其他形状也是可能的。
在一些实施方式中，支持件109连接至用于控制连接件102和模塑料101的材料去除的控制系统(未示出)。类似于封装件102的封装件可在处理系统中处理以去除每个封装件上的至少部分连接件102和模塑料101。处理系统包括控制系统，控制系统被编程以在每个封装件102上进行重复处理以能够有一致的去除结果。
材料去除工具107去除每个连接件102和围绕其的模塑料101的部分以生成开口103，以容纳来自置放在封装件120上方的封装件(未示出)的连接件。图1B示出了根据一些实施方式的每个开口103具有从模塑料101的表面测量的宽度W1和深度H1。在一些实施方式中，深度H1等于或者大于连接件102高度H的一半。在一些实施方式中，深度H1在大约50μm和大约250μm之间。根据一些实施方式，在每个开口103下方的每个连接件102中剩余至少部分导电材料。根据一些实施方式，所剩余的连接件102的表面102a是基本平坦并且直线形的。在一些实施方式中，表面102a是弯曲形的。在一些实施方式中，宽度W1等于或者大于连接件102的最大宽度W。在一些实施方式中，宽度W1在大约100μm和大约350μm之间。
在连接件102中的连接件材料去除期间，开口103附近的模塑料101也被去除。一些模塑料101a剩余在一个方向上的相邻连接件102之间。在一些实施方式中，开口103(I)的侧壁121是直的并且基本垂直于模塑料101的表面122，如根据一些实施方式的图1D(I)中所示。图1D(I)的开口103(I)的侧壁121(I)与模塑料101和剩余的连接件102之间的界面123基本连续。在一些实施方式中，开口103(II)的侧壁121(II)延伸超出模塑料101和剩余的连接件102之间的界面123，如根据一些实施方式的图1D(II)中所示。在一些实施方式中，开口103(III)的侧壁121(III)是弯曲形的，类似于连接件102的初始轮廓，如根据一些实施方式的图1D(III)所示。
如根据一些实施方式的图1E中所示，在开口103形成之后，封装件110置放在封装件120上面。封装件110包括两个半导体管芯112和113，并且管芯113设置在管芯112上方。然而，封装件110可能包括一个半导体管芯或者多于两个半导体管芯。在一些实施方式中，在管芯112和113之间具有胶层(未示出)。半导体管芯112和113可包括各种微电子元件，如上对半导体管芯105所描述的。这些各种微电子元件的实例在上面已经描述。半导体管芯112接合至衬底115。衬底115可包括上面对于衬底100描述的各种材料和/或部件。根据一些实施方式，半导体管芯112通过接合线114电连接至衬底115中的导电元件(未示出)。类似地，半导体管芯113通过接合线116电连接至导电元件。封装件110还包括覆盖半导体管芯112和113以及还覆盖接合线114和116的模塑料111。
根据一些实施方式，封装件110还包括围绕半导体管芯105的一些连接件117。连接件117由导电材料制造，例如，焊锡、焊锡合金，等等。连接件117形成在衬底115的表面上的导电结构上(未示出)以电连接衬底115中的元件。如根据一些实施方式的图1E中所示，连接件117置放在开口103中。
连接件102和117可由具有低电阻率的任何导电材料制造。例如，它们可由焊锡、焊锡合金、金、金合金等制造。包括在焊锡合金中的示例性元件可包括Sn、Pb、Ag、Cu、Ni、铋(Bi)或者它们的组合。
如根据一些实施方式的图1F中所示，在封装件110置放在封装件120上方，并且封装件110的连接件117置放在封装件120’的开口103’中(如图3A中所描绘的)之后，对封装件层叠结构150进行回流焊。在回流焊工艺之后，开口103中的连接件102的剩余导电材料与连接件117的导电材料混合以形成接合结构118。例如，连接件102的导电材料和连接件117的导电材料都包括焊锡。连接件102中的焊锡和焊锡连接件117混合并合并以形成接合结构118。封装件110的底面和衬底100的上表面之间的距离(或者高度)HT在大约100μm和大约350μm之间。HT也是接合结构118的高度。封装结构150的距离HT会比通过将连接件117与没有部分去除以形成开口103的连接件102接合制作的类似封装件层叠结构小。因而，通过使用该接合结构和方法形状因数(shape factor)更好。另外，由于连接件117置放在开口103中，所以置放和对准更精确。结果，与通过将连接件117与没有部分去除以形成开口103的连接件102接合制作的类似接合结构相比，大大降低了接合结构118之间的短路机率。从而，接合工艺的工艺窗口更大。随着接合结构118之间短路机率下降，可减小连接件102(和连接件117)的间距P。
图1G是根据一些实施方式的在开口103形成之后的封装件120的俯视图。在图1G中，开口103呈槽形状形成在连接件102行或者连接件102列上方。然而，在一些实施方式中，开口103可以多槽形状形成在连接件102行或者连接件102列上方。表面120a的直径“D1”小于开口103的宽度W1。图1G示出了保留在一个方向上的相邻连接件102之间(例如，连接件102A和102B之间)的模塑料101a。然而，在另一方向上的相邻连接件之间(例如，连接件102A和102C之间)的模塑料101a被去除。在连接件102与连接件117的置放和对准期间，连接件102之间的模塑料101a可能会有助于连接件117的置放。另外，模塑料101a可有助于隔离相邻的接合结构118(在一个方向)。
由于开口103形成在连接件102行或者连接件102列上方，处理时间相对小。可使用一个或者多个材料去除工具107以快速形成开口103。相对比地，用于类似于结构150的封装件层叠结构的可选形成方法包括在模塑料101中钻孔，其不嵌入连接件102，以使得连接件117与衬底100上的导电元件接触，这会更耗时并且在形成单独开口以容纳每个连接件117的过程中需要更精确的钻孔控制。
图2A是根据一些实施方式的接合结构118的放大的截面图。如上所述，通过将连接件117的导电材料与来自剩余连接件102的导电材料接合来形成接合结构118，剩余连接件102的导电材料初始存在于界面102a下面。图2A示出了连接件117形成在衬底115中的接合焊盘结构119上，连接件102形成在衬底100的接合结构125上。图2A示出了接合结构118具有在模塑料101之上的曲面126，曲面126在交点124处连接至模塑料101中的直面121。图2B示出了具有交点(或者颈)124和表面121和126的部分接合结构118。交点124处的界面夹角为α。在一些实施方式中，α在大约90度和小于大约180度之间。
图2C是根据一些实施方式的接合结构118*的截面图，接合结构118*通过连接件117直接与连接件102接合，而不首先形成开口103形成。接合结构118*通过一些制造工艺中使用的不同方法形成。由于不去除部分连接件102和部分模塑料101以形成开口103，如在图2A的情况下，接合结构118*具有在交点124*相交的曲面123*和曲面121*。交点124*处的界面间夹角为α*。在一种或者多种实施方式中，α高于α*。由于接合结构118*的交点124*的界面间夹角比接合结构118的交点124小，交点124*处的应力高于交点124处的应力。应力越高会导致断裂的可能性增加。接合结构118具有比接合结构118*光滑的轮廓。从而，与图2C的接合结构相比，通过上述方法形成的接合结构118降低了接合结构断裂的可能性。另外，由面102a提供的接合平面可横穿封装件120保持一致。因此，接合面可以制作为平坦的，这提高了接合工艺的产量以及具有一致的封装件高度和平坦性的形状因数。
图3A是根据一些实施方式的封装件120的部分连接件102和部分模塑料101被去除(如图1A中所示)以形成大开口103’之后，封装件120’的截面图。连接件102附近以及连接件102之间的模塑料101被去除。在一些实施方式中，开口103’的宽度W2等于或者大于间距P加上连接件102的最大宽度W。在一些实施方式中，宽度W2在大约300μm和大约1050μm之间。在一些实施方式中，如图3A中所示，模塑料101一直去除到封装件120’的边缘。在一些实施方式中，一些模塑料101剩余在封装件120’的边缘处。
如从模塑料101的表面测量的开口103’的高度H2等于或者大于连接件102的高度H的一半。在一些实施方式中，深度H2在大约50μm和大约250μm之间。根据一些实施方式，在每个开口103’下面的每个连接件102’中剩余有至少部分导电材料。根据一些实施方式，剩余的连接件102的表面102a’为基本平坦并且是直线形的。在一些实施方式中，表面102a’为弯曲形的。
在连接件102中的连接件材料去除期间，开口103附近的模塑料101也被去除。类似于如图1D(I)、1D(II)和1D(III)中所示的开口103的轮廓，开口103’的侧壁121’可以是直线形的并且延伸超过界面123，或者为弯曲形的。
如根据一些实施方式的图3B中所示，在开口103’形成之后，封装件110置放在封装件120’上面以形成封装件层叠结构150’。上面已经描述了封装件110。根据一些实施方式，如上所述，封装件110还包括围绕半导体管芯105的一些连接件117。连接件117置放在开口103’中以与开口103’中剩余的连接件102接触。
如根据一些实施方式的图3C所示，在封装件110置放在封装件120’上方，封装件110的连接件117置放在封装件120’的开口103’中之后，对封装件层叠结构150’进行回流焊。在回流焊工艺之后，开口103’中的连接件102的剩余导电材料与连接件117的导电材料混合以形成接合结构118’。如图3C中所示，封装件110的底面和衬底100的上表面之间的距离(或者高度)HT’在大约100μm和大约350μm之间。
图3D是根据一些实施方式的开口130’形成之后的封装件120’的俯视图。类似于上述D1，表面120a’的直径D1’小于开口103的宽度W1。图3D示出了模塑料101一直去除到封装件120’的边缘。
封装结构150’的优点类似于上述的封装件结构150。由于连接件102之间的模塑料101也被去除，制造开口103’的工艺控制比形成开口103更容易更好。然而，由于连接件102’之间的模塑料完全去除，开口103’中的连接件102’上连接件117的置放和对准需要比开口103中的连接件102更精确。进一步地，在相邻连接件102’之间没有模塑料101a的情况下，连接件117的置放和对准需要更精确以确保接合结构118’之间没有短路。
图4A是根据一些实施方式的封装件120(如图1A所示)的部分连接件102和部分模塑料101去除以形成大开口103”之后的封装件120”的截面图。连接件102附近的部分模塑料101被去除。在一些实施方式中，开口103”的宽度W3等于或者大于连接件102的最大宽度W。在一些实施方式中，宽度W3在大约100μm和大约300μm之间。
如从模塑料101的表面测量的开口103”的高度H3等于或者大于连接件102的高度H的一半。在一些实施方式中，深度H3在大约50μm和大约250μm之间。根据一些实施方式，在每个开口103”下面的每个连接件102”中剩余至少部分导电材料。上述的材料去除工具107用于去除连接件102及它们周围的模塑料101的材料。如图4A中所示，连接件102”的每行或每列包括至少两个面102a”和102b”。面102a”和102b”在交点102c”处相交。模塑料101的顶面122和面102a”(或者102b”)之间的角度β范围在大约15°至大约45°之间。如根据一些实施方式的图4B所示，类似于封装结构150和150’，在形成开口103”之后还可将封装件110置放在封装件120”的顶面上以形成封装结构150”。开口103”的面102a”和102b”有助于开口103”中连接件117的置放和对准并且与102”接触。之后，如图4C中所示，封装结构150”经历回流焊以形成接合结构118”并且完成封装结构150”的形成。封装件110的底面和衬底100的上表面之间的距离(或者高度)HT在大约100μm和大约350μm之间。
图4B示出了开口103”具有在界面120c”处相交的至少两个面102a”和102b”。开口103”可能还具有不同的表面。图4D示出了根据一些实施方式的面102a”和102b”与面102d”相交以形成具有半V形状的开口103”。根据一些实施方式，图4D的模塑料101的顶面122和面102a”(或者102b”)之间的角度β范围在大约45°至大约90°之间。
如图3C中所示的一些实施方式，在封装件110置放在封装件120’上方，封装件110的连接件117置放在封装件120’的开口103’中之后，对封装件层叠结构150’进行回流焊。在回流焊工艺之后，开口103中的连接件102剩余的导电材料与连接件117的导电材料混合以形成接合结构118’。封装件110的底面和衬底100的上表面之间的距离(或者高度)HT在大约100μm和大约350μm之间。
图4E是根据一些实施方式的开口130”形成之后的封装件120”的俯视图。在开口130”的每行或每列中，存在一排交点102c”。如根据一些实施方式的图4E中所示，角落开口103A”、103B”、103C”和103D”的每个具有形成金字塔形状的四个表面。具有金字塔形状表面的角落开口，例如，103A”、103B”、103C”和103D”，善于将连接件117精确定位。封装结构150”的优点类似于上述的封装结构150和150’。封装结构150”在接合工艺期间具有容易和精确定位连接件117的附加优点。
图5A-5D是根据一些实施方式的形成封装件层叠(PoP)结构的连续工艺的截面图。图5A是根据一些实施方式的封装件120^的截面图。封装件120^类似于封装件120并且包括半导体管芯105。然而，模塑料101^覆盖半导体管芯105和连接件102^。制造封装件120^的工艺比图1A的封装件120简单，因为需要更复杂的工艺流程来暴露图1A的连接件102。结果，封装件120^的制造成本较低。上面已经描述了连接件102的宽度W、高度H和间距。模塑料101^的高度H^比H高(即，连接件102的高度)。在一些实施方式中，高度H^在大约110μm和大约400μm之间。
图5B是根据一些实施方式的在封装件120^的部分连接件102^和部分模塑料101^去除以形成大开口103^之后的封装件120^的截面图。围绕连接件102的模塑料101^较厚并且可能花费更长时间来去除从而暴露连接件102。在一些实施方式中，开口103^的宽度W4等于或者大于连接件102的最大宽度W。在一些实施方式中，宽度W4在大约100μm和大约300μm之间。
如从模塑料101的表面测量的开口103^的高度H4等于或者大于连接件102的高度H的一半。在一些实施方式中，H4等于或者大于大约H^(模塑料101^的高度)减去H(连接件102的高度)的一半，并且小于H的85％。在一些实施方式中，深度H4在大约60μm和大约340μm之间。根据一些实施方式，在每个开口103^下面的每个连接件102^中剩余至少部分导电材料。根据一些实施方式，剩余的连接件102^的面102a^为基本平坦并且是直线形的。在一些实施方式中，面102a’为弯曲形的。
如根据一些实施方式的图5D中所示，在封装件110置放在封装件120^上方，封装件110的连接件117置放在封装件120^的开口103^中之后，对封装件层叠结构150^回流焊。在回流焊工艺之后，开口103’中的连接件102的剩余导电材料与连接件117的导电材料混合以形成接合结构118’。封装件110的底面和衬底100的上表面之间的距离(或高度)HT^在大约100μm和大约350μm之间。封装结构150^的优点类似于上述的封装件结构150、150’以及150”。由于H4高于H1、H2或者H3，接合结构118^比上述的接合结构118，118’和118”强固。另外，封装件110和120^之间的间距S小于上述的封装件结构150、150’以及150”之间的类似间距。在一些实施方式中，间距S’在大约10μm和大约100μm之间。
描述的形成用于封装件层叠的接合结构的实施方式包括去除下封装件的部分连接件和模塑料。所描述的接合结构能使得上封装件的连接件与下封装件的连接件的置放和对准更容易。结果，接合工艺的工艺窗口更宽。另外，接合结构具有更光滑的连接轮廓和平坦的接合面。因此，接合结构不太可能断裂。改进了封装件层叠结构的产量和形状因数。
在一些实施方式中，提供了一种封装半导体器件。所述封装半导体器件包括具有第一半导体管芯的第一封装件，以及具有第二半导体管芯的第二封装件。所述封装半导体器件还包括位于所述第一封装件和所述第二封装件之间的多个接合结构。所述多个接合结构连接位于所述第一封装件和所述第二封装件之间的导电元件，并且所述多个接合结构中的每一个都包括直线形侧壁。
在一些其他实施方式中，提供了一种封装半导体器件。所述封装半导体器件包括具有第一半导体管芯的第一封装件，以及具有第二半导体管芯的第二封装件。所述封装半导体器件还包括位于所述第一封装件和所述第二封装件之间的多个接合结构。所述多个接合结构连接位于所述第一封装件和所述第二封装件之间的导电元件，并且所述多个接合结构中的每一个都包括直线形侧壁。所述多个接合结构形成多行和多列，并且在相同行或者相同列中的相邻接合结构之间不存在模塑料。
在又一些其他实施方式中，提供了一种形成半导体器件封装件的方法。所述方法包括在第一半导体管芯的第一封装件的第一连接件上面形成开口，并且所述开口通过去除所述第一连接件的部分导电材料和围绕所述第一连接件的部分模塑料形成。所述方法还包括在所述第一封装件上方置放具有第二半导体管芯的第二封装件，并且所述第二封装件的第二连接件至少在所述开口中。所述方法进一步包括进行回流焊以将所述第二连接件和所剩余的第一连接件接合以形成接合结构。
尽管已经详细描述了本发明的实施方式以及它们的优势，但应该理解，可以在不背离所附权利要求限定的本发明精神和范围的情况下，做各种不同的改变，替换和更改。例如，本领域普通技术人员容易理解，可以改变本文描述的许多部件、功能、工艺以及材料而依然在本发明范围内。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施方式。作为本领域普通技术人员应理解，通过本发明，现有的或今后开发的用于执行与根据本发明所采用的所述相应实施方式基本相同的功能或获得基本相同结果的工艺、机器、制造，材料组分、装置、方法或步骤根据本发明可以被使用。因此，所附权利要求应该将这样的工艺、机器、制造、材料组分、装置、方法或步骤包括在范围内。

Claims (10)

1.一种封装半导体器件，包括：
具有第一半导体管芯的第一封装件；
具有第二半导体管芯的第二封装件；
位于所述第一封装件和所述第二封装件之间的多个接合结构，其中，所述多个接合结构连接位于所述第一封装件和所述第二封装件之间的导电元件，其中所述多个接合结构中的每一个都包括直线形侧壁。
2.根据权利要求1所述的封装半导体器件，其中，所述直线侧壁与所述第二封装件的模塑料相邻。
3.根据权利要求1所述的封装半导体器件，其中，所述多个接合结构形成多行和多列，在相同行或者相同列中的相邻接合结构之间不存在模塑料。
4.根据权利要求3所述的封装半导体器件，其中，相邻行或相邻列的接合结构通过模塑料隔离。
5.根据权利要求1所述的封装半导体器件，其中，所述多个接合结构填充在所述第二封装件的模塑料中形成的开口，其中每个所述开口都具有直线形侧壁。
6.根据权利要求5所述的封装半导体器件，其中，每个所述开口都具有范围在大约100μm和大约350μm之间的宽度。
7.一种封装半导体器件，包括：
具有第一半导体管芯的第一封装件；
具有第二半导体管芯的第二封装件；
位于所述第一封装件和所述第二封装件之间的多个接合结构，其中，所述多个接合结构连接位于所述第一封装件和所述第二封装件之间的导电元件，所述多个接合结构中的每一个都包括直线形侧壁，所述多个接合结构形成多行和多列，在相同行或者相同列中的相邻接合结构之间不存在模塑料。
8.一种形成半导体器件封装件的方法，包括：
在第一半导体管芯的第一封装件的第一连接件上方形成开口，其中，所述开口通过去除所述第一连接件的部分导电材料和围绕所述第一连接件的部分模塑料来形成；
在所述第一封装件上方置放具有第二半导体管芯的第二封装件，其中，所述第二封装件的第二连接件至少位于所述开口中；
进行回流焊以将所述第二连接件和所剩余的第一连接件接合以形成接合结构。
9.根据权利要求8所述的方法，其中，形成所述开口包括：使用材料去除工具来去除所述第一封装件上的所述第一连接件和其他连接件以及围绕所述第一连接件和其他连接件的所述模塑料。
10.根据权利要求8所述的方法，其中，所述开口的宽度等于或者大于所述第一连接件的最大宽度。
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US9318465B2 (en) 2016-04-19
US20130256914A1 (en) 2013-10-03
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US8704354B2 (en) 2014-04-22
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