CN103348480B - 用于氮化镓晶体管的离子植入及自行对准栅极结构 - Google Patents

用于氮化镓晶体管的离子植入及自行对准栅极结构 Download PDF

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CN103348480B
CN103348480B CN201280005518.3A CN201280005518A CN103348480B CN 103348480 B CN103348480 B CN 103348480B CN 201280005518 A CN201280005518 A CN 201280005518A CN 103348480 B CN103348480 B CN 103348480B
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亚历山大·利道
罗伯特·比奇
阿兰娜·纳卡塔
曹建军
赵广元
罗伯特·斯特里特马特
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Abstract

一种自行对准的晶体管栅极结构，包括在每一侧由非植入的栅极材料所环绕的栅极材料的离子植入部分。所述栅极结构，例如，可通过在氮化镓铝阻挡层上形成氮化镓材料层，并植入所述氮化镓层的一部分而构成，以产生由所述氮化镓层横向环绕的所述栅极结构。

Description

用于氮化镓晶体管的离子植入及自行对准栅极结构
技术领域
本发明涉及半导体装置的领域。特别地，本发明涉及晶体管的形成，包括增强型氮化镓晶体管的形成。
背景技术
半导体装置使用半导体材料的导电性。这些半导体材料可包括，例如，硅(Si)或含硅材料，锗，或包括氮化镓(GaN)的材料。
特别地，氮化镓(GaN)半导体装置由于其承载大电流及支持高电压的能力而日益广泛地被使用于功率半导体装置。这些装置的发展一般而言已将目标放在高功率/高频率应用。针对这些类型的应用所制成的装置是基于显现高电子迁移率的一般性装置结构，并且被称为异质结场效应晶体管(HFET)，高电子迁移率晶体管(HEMT)，或调质掺杂场效应晶体管(MODFET)等不同名称。这些类型的装置通常可耐受高电压，例如100伏特，同时在高频率下作业，例如0.1-100GHz。
氮化镓高电子迁移率晶体管装置的一个例子包括具有至少两个氮化物层的氮化物半导体。在所述半导体或缓冲层上形成的不同材料致使这些层具有不同的能带间隙。位于相邻氮化物层中的不同材料还引起极化，有助于所述两个层的结附近的传导性二维电子气体(2DEG)区域，特别是在具有较窄能带间隙的层中。
在GaN半导体装置中，引起极化的所述氮化物层通常包括与氮化镓层相邻的氮化镓铝阻挡层，以包括所述二维电子气体，容许电荷流动通过所述装置。此阻挡层可掺杂或是未掺杂。由于在零栅极偏压时所述二维电子气体区域存在于栅极下方，所以大部分氮化物装置为常通型，或是耗尽型装置。如果在零施加栅极偏压时所述二维电子气体区域在栅极下方被耗尽，也就是去除，则所述装置可为增强型装置。增强型装置为常断型，因为其提供附加的安全性，它们是理想的。增强型装置需要在所述栅极处施加正偏压以便传导电流。GaN半导体装置的实例可见于共同受让的美国专利申请公开第2010/0258912及2010/0258843号中。
图1显示具有自行对准栅极结构的增强型GaN晶体管装置100的一个例子的横截面视图。共同受让的美国专利申请公开第2010/0258843号公开了一种用于形成这样一个装置的制程。在图1中，装置100包括基板101，基板101可为蓝宝石、碳化硅(SiC)或硅，过渡层102，未掺杂的GaN材料103，未掺杂的氮化镓铝阻挡材料104，漏极欧姆电接触金属110，源极欧姆电接触金属111，形成在掺杂的外延栅极113中的掺杂的p型氮化镓铝或p型GaN层，以及栅极金属112，栅极金属112形成在掺杂的外延栅极113上。电介质材料层105，诸如氮化硅，覆盖阻挡材料104，以致所述电介质材料的一部分114覆盖栅极113。
在针对装置100的所述栅极结构的形成期间，所述顶部p型氮化镓铝或GaN层可以用掺杂剂诸如镁(Mg)植入、扩散或成长，接着在所述掺杂的GaN的顶部沉积金属层，例如，由氮化钛(TiN)构成的。可使用光微影蚀刻法界定所需的栅极的边界，以及接着根据所需的边界蚀刻所述金属层。所述蚀刻的金属栅极材料接着可用作蚀刻掩膜以产生包括栅极金属112及掺杂的外延栅极113的自行对准栅极结构，掺杂的外延栅极113包括由栅极金属112所界定的侧壁120。
图1中所示的结构的不良的特性在于，当去除用于所述栅极的部分的外部的掺杂镁的外延GaN材料时，需要极为敏感的蚀刻以避免干扰下面的阻挡层。传统晶体管的另一个不良的特性在于电流会从掺杂的外延栅极113的侧壁120向下流动。进一步地，尽管减小掺杂的外延栅极113的厚度能够产生更为所需的装置跨导，但也会增加沿着栅极侧壁120的泄漏电流。如此会降低效率及增加功率损失，特别是在与硅晶体管比较时。再者，氮化硅材料105与侧壁120之间的界面易于破裂。如此对能够施加至所述栅极而不致破坏所述装置的最大电压造成限制。
因此，对于GaN及其他晶体管装置而言获得改良式栅极结构以及构成这些栅极结构的方法是所需的。
发明内容
以下叙述的具体实施例通过提供具有减少的栅极泄漏电流的栅极结构解决上述问题以及其他问题。所描述的栅极结构包括在每一侧由非植入的栅极材料所环绕的栅极材料的离子植入部分。所述栅极结构，例如，可通过在氮化镓铝阻挡层上形成GaN材料层以及植入所述GaN层的一部分而形成，以产生由所述GaN层横向环绕的所述栅极结构。
附图说明
图1显示已知的增强型GaN晶体管装置的横截面视图。
图2显示根据本发明第一具体实施例所形成的晶体管装置的横截面视图。
图3显示根据在此说明的具体实施例的晶体管装置在其形成的第一接合处的横截面视图。
图4显示根据在此说明的具体实施例的晶体管装置在其形成的第二接合处的横截面视图。
图5显示根据在此说明的具体实施例的晶体管装置在其形成的第三接合处的横截面视图。
图6显示根据在此说明的另一具体实施例的晶体管装置的横截面视图。
图7显示根据在此说明的具体实施例的晶体管装置在第四接合处的横截面视图。
图8显示根据在此说明的另一具体实施例的晶体管装置的横截面视图。
具体实施方式
在以下详细的说明中，参考特定的具体实施例。这些具体实施例经充分详细地加以说明，使本领域技术人员能够实践这些具体实施例。应了解的是可使用其他具体实施例并可做不同的结构、逻辑及电气方面的改变。
尽管在此说明的具体实施例包括GaN半导体装置，但应了解的是本发明并不限制于GaN半导体装置。例如，这些说明的具体实施例可适用于使用不同的传导材料的半导体装置及其他装置，诸如，例如Si或SiC半导体装置，锗材料半导体装置，仅列举一些作为代表。这些说明的概念也同样地适用于绝缘层上覆硅(SOI)装置。此外，这些说明的概念也同样地适用于增强型及耗尽型装置。
此外，为了清晰性，在此包含的概念参考单一晶体管装置加以说明。然而，应了解的是在此说明的概念同样地适用于包括多个装置的结构，诸如在单一晶圆上包括多个装置的结构(也就是，集成电路)。
图2显示根据本发明的第一具体实施例所形成的晶体管装置200的横截面视图。装置200包括基板201，过渡层202，缓冲层203及阻挡层204。基板201可由，例如，硅(Si)、碳化硅(SiC)、蓝宝石或其他材料构成。过渡层202可为一或多个过渡层并可由氮化铝(AlN)和/或氮化镓铝(AlGaN)构成，并且其厚度可约为0.1至约1.0微米。缓冲层203可由未掺杂的GaN材料构成，并且典型地厚度约为0.5至约3微米。阻挡层204可由AlGaN构成，其中Al与Ga的比例约为0.1至约1，厚度约为0.01至约0.03微米。
装置200还包括栅极层230，形成在阻挡层204上方(也就是，位于其顶部)。栅极层230可由GaN或是任何其他适合的栅极材料构成。栅极213形成在栅极层230内的所需位置处，并界定在侧边220处。应了解的是，由于栅极213是由栅极层230的一部分所形成，栅极213实际上不包括“侧壁”，与传统设计中的栅极不同。栅极213可由栅极层230(例如，GaN)的一部分所构成，在此处所述材料已适当地以离子植入，诸如镁(Mg)、铁(Fe)、钒(V)、铬(Cr)，或碳(C)。栅极213较佳地为p型材料。
栅极金属212位于栅极213上方(也就是，位于其顶部)。栅极金属212可由，例如，氮化钛(TiN)、钽(Ta)、氮化钽(TaN)、钯(Pd)、钨(W)、硅化钨(WSi2)、镍(Ni)、和/或金(Au)构成。
装置200还包括电介质材料205，诸如氮化硅，形成在栅极材料230上方，以致所述电介质材料的至少一部分214覆盖栅极213及栅极金属212。装置200还包括漏极210与源极211区域上面的欧姆电接触金属。所述欧姆电接触金属可由Ti和/或Al构成，并还可包括诸如Ni及Au的覆盖金属。
由于栅极213实际上不包括横向侧壁，所以在栅极213的侧壁处的电流泄漏减少，超越传统设计。此外，与栅极会从周围SiN分离的传统设计比较，栅极213从相邻材料230破裂或分离的可能性较低。再者，如以下进一步地说明，装置200不需传统设计中使用的高度敏感栅极蚀刻即可形成，并且不对制造装置增加附加的掩膜步骤或是对完成的产品增加实质上大量的步骤。
图3-7显示晶体管装置诸如装置200(图2)或是其他说明的具体实施例，在所述装置的形成期间在多个接合处的横截面视图。
如图3所示，提供基板201、过渡层202、缓冲层203、及阻挡层204。尽管为了解释的目的显示这些层，但应了解的是在此说明的概念还能够应用在由其他化合物半导体形成的装置，诸如GaAs、InGaN、AlGaN及其他。此外，对于本领域技术人员这些说明的概念能够应用在单晶体或是其他的外延晶体管。
栅极层230形成在阻挡层204上方(即，位于其顶部)。栅极层230可由GaN或是任何其他适合的栅极材料构成。栅极层230形成的厚度可等同于栅极213所需的厚度(图2)，例如，在约至约的范围中。
如图4所示，电介质材料205，诸如氮化硅，接着沉积在栅极材料230上方。在电介质材料205中形成开口240至栅极213所需的表面积(图2)，露出栅极材料230的一部分。
如图5所示，所述装置接着暴露于离子植入并且，可选择地，活化。植入可包括通过p型杂质的离子光束植入，所述离子包括Mg、Fe、V、Cr或C离子，或是其他类型的离子，以产生所需的栅极掺杂。活化可包括让所述装置经受退火(诸如快速热退火或“RTA”)，以活化植入的杂质。可选择地，可形成附加的电介质保护层-诸如氮化硅层-并接着将其去除以活化。可选择地，可在所述制程中的另一时刻完成此活化步骤。
由于离子植入，植入栅极213a形成在栅极材料230的暴露部分中。如图5所示，离子植入可在大体上与形成的层201-205的表面垂直的角度下执行。如此导致栅极具有大体上垂直的侧面220a。
在图6中所示的另一具体实施例中，离子植入可在大体上与形成的层201-205的表面不垂直的角度下执行。如此导致栅极213b具有侧面213b，侧面213b延伸超越位于电介质层205中的孔洞240(图4)。所述植入的栅极的外形因而能够延伸超越栅极金属212(图2)，进一步减少从所述栅极金属的角落进入栅极材料230的未植入区域的泄露。
如图7所示，在栅极213的植入之后(可包括图5中所示栅极213a或图6中所示栅极213b的结构)，栅极金属212接着可形成在栅极213上方。可将栅极金属层沉积在装置200(图2)的表面的一部分，整个表面，或整个晶圆。
位于电介质层205（其为用于界定栅极213的相同层）中的开口240(图4)用于界定栅极金属212。因此，栅极金属212将自行对准至活性栅极区域，省去附加的制造步骤和/或成本并也降低所述电介质层与所述源极和/或漏极电接触210、211(图2)之间不期望的部分重叠。此部分重叠为不期望的，因为它会导致不需要的电容，所述不需要的电容会使装置作业变慢并增加装置的整体功率损失。
在形成栅极金属212之后，晶体管装置200(图2)可通过本领域公知的制程及技术而完成。例如，电介质材料的附加量214，诸如SiN，可形成在至少该装置中栅极金属212所处的部分上面，为所述装置提供隔离。欧姆电接触金属也可经沉积以形成漏极欧姆电接触210及源极欧姆电接触211。源极欧姆电接触210可位于栅极213上方，如图2所示，并作为场板以减少最接近漏极欧姆电接触210的栅极213的角落处的电场。
根据图3-7形成的装置具有所需的减少栅极泄漏电流及较高的栅极击穿电压的特性，并且不需在传统制程中所使用的敏感性栅极蚀刻以去除环绕所需的栅极表面积的栅极材料。所述栅极金属的自行对准沉积并未对制造过程增加掩膜步骤或是对晶体管增加实质的尺寸。
图8显示晶体管装置的可选具体实施例的形成的横截面视图。如图8所示，基板201、过渡层202、缓冲层203、阻挡层204、栅极层230、电介质材料205及栅极213如上述在图3-6中说明地形成。在形成栅极213之后，诸如SiN的绝缘材料层可形成在所述装置的表面上(诸如通过共形沉积)，然后接着加以去除(诸如通过蚀刻)。此无掩膜自行对准沉积及去除制程在绝缘材料205中留有沿着开口240(图4)的垂直侧壁余留的绝缘材料241薄层。由此制程所形成的剩余物241通常视为间隔件。栅极金属212于是可由栅极213的边缘嵌入而形成。此结构进一步地减少电流泄漏。
以上说明及附图仅视为达到在此叙述的特性及优点的特定具体实施例的说明。能够对特定制程条件作修改与替换。因此，本发明的具体实施例并不视为由之前的说明及附图加以限定。

Claims (10)

1.一种形成具有自行对准栅极的晶体管的方法，所述方法包括：
在基板上形成过渡层；
在所述过渡层上形成氮化镓缓冲层；
在所述氮化镓缓冲层上形成阻挡层；
在所述阻挡层上形成栅极层，其中所述栅极层未掺杂；
在所述栅极层上形成电介质层；
形成穿过所述电介质层至所述栅极层的开口，以暴露所述栅极层的一部分；
穿过所述电介质层中的所述开口执行包含p型杂质的离子植入制程，以形成所述栅极层的离子植入区域，其中所述离子植入区域界定了栅极区域以及用于减少电流泄漏的所述栅极区域外部的非离子植入区域；
利用穿过所述电介质层的所述开口在所述栅极区域上进行栅极金属材料的无掩模自行对准沉积，以界定与所述栅极区域自行对准的栅极金属；以及
形成欧姆漏极及源极电接触区域。
2.根据权利要求1所述的方法，在所述离子植入制程之后，进一步包括活化制程。
3.根据权利要求2所述的方法，其中所述活化制程包括快速热退火制程。
4.根据权利要求1所述的方法，其中所述离子植入制程选自于镁(Mg)、铁(Fe)、钒(V)、铬(Cr)及碳(C)植入。
5.根据权利要求1所述的方法，其中所述栅极金属包括氮化钛(TiN)、钽(Ta)、氮化钽(TaN)、钯(Pd)、钨(W)、硅化钨(WSi2)、镍(Ni)、及金(Au)其中之一。
6.根据权利要求1所述的方法，其中所述阻挡材料包括氮化镓铝(AlGaN)。
7.根据权利要求1所述的方法，其中所述栅极区域的侧面具有相对于所述栅极层约为90度的角度。
8.根据权利要求1所述的方法，其中所述栅极区域的所述侧面不与所述栅极材料垂直。
9.根据权利要求1所述的方法，其中绝缘材料形成在所述栅极金属的侧面上，以形成间隔件进一步减小泄漏电流。
10.根据权利要求1所述的方法，其中所述栅极金属为氮化钛(TiN)。
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Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6161910B2 (ja) * 2013-01-30 2017-07-12 ルネサスエレクトロニクス株式会社 半導体装置
KR102055839B1 (ko) 2013-03-08 2019-12-13 삼성전자주식회사 질화계 반도체 소자
KR102036349B1 (ko) 2013-03-08 2019-10-24 삼성전자 주식회사 고 전자이동도 트랜지스터
TWI566328B (zh) * 2013-07-29 2017-01-11 高效電源轉換公司 具有用於產生附加構件之多晶矽層的氮化鎵電晶體
TWI648858B (zh) * 2016-06-14 2019-01-21 黃知澍 Ga-face III族/氮化物磊晶結構及其主動元件與其製作方法
US20180061975A1 (en) * 2016-08-24 2018-03-01 Rohm Co., Ltd. Nitride semiconductor device and nitride semiconductor package
US10224285B2 (en) 2017-02-21 2019-03-05 Raytheon Company Nitride structure having gold-free contact and methods for forming such structures
US10096550B2 (en) 2017-02-21 2018-10-09 Raytheon Company Nitride structure having gold-free contact and methods for forming such structures
US11508821B2 (en) 2017-05-12 2022-11-22 Analog Devices, Inc. Gallium nitride device for high frequency and high power applications
TWI646228B (zh) 2017-08-10 2019-01-01 新唐科技股份有限公司 半導體基板及其製造方法
WO2020010253A1 (en) 2018-07-06 2020-01-09 Analog Devices, Inc. Compound device with back-side field plate
US20220262940A1 (en) * 2021-02-16 2022-08-18 Semiconductor Components Industries, Llc Hemt devices with reduced size and high alignment tolerance
CN113299737A (zh) * 2021-05-20 2021-08-24 中国电子科技集团公司第二十四研究所 一种功率半导体器件制造方法及功率半导体器件
CN114725186A (zh) * 2022-03-15 2022-07-08 华南理工大学 一种增强型GaN基HEMT器件及其制备方法和应用

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5161235A (en) * 1990-02-20 1992-11-03 University Of Virginia Alumni Patents Foundation Field-effect compound semiconductive transistor with GaAs gate to increase barrier height and reduce turn-on threshold
CN101273458A (zh) * 2004-01-23 2008-09-24 国际整流器公司 增强模式ⅲ族氮化物场效应晶体管
WO2010118087A1 (en) * 2009-04-08 2010-10-14 Efficient Power Conversion Corporation Enhancement mode gan hemt device and method for fabricating the same

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57178374A (en) * 1981-04-27 1982-11-02 Sumitomo Electric Ind Ltd Junction type field-efect transistor and its manufacture
US5132752A (en) * 1985-05-22 1992-07-21 Hitachi, Ltd. Field effect transistor
JPS6273776A (ja) * 1985-09-27 1987-04-04 Nec Corp 接合型電界効果トランジスタの製造方法
JPH01202861A (ja) * 1988-02-08 1989-08-15 Nippon Telegr & Teleph Corp <Ntt> トランジスタの製法
JP2000349095A (ja) * 1999-06-04 2000-12-15 Sony Corp 半導体素子およびその製造方法ならびに電力増幅器および無線通信装置
US20010015437A1 (en) 2000-01-25 2001-08-23 Hirotatsu Ishii GaN field-effect transistor, inverter device, and production processes therefor
WO2004019415A1 (en) * 2002-08-26 2004-03-04 University Of Florida GaN-TYPE ENHANCEMENT MOSFET USING HETERO STRUCTURE
JP2005310902A (ja) * 2004-04-19 2005-11-04 Sumitomo Electric Ind Ltd 半導体装置と半導体装置の製造方法
US7250666B2 (en) * 2005-11-15 2007-07-31 International Business Machines Corporation Schottky barrier diode and method of forming a Schottky barrier diode
JP5186096B2 (ja) * 2006-10-12 2013-04-17 パナソニック株式会社 窒化物半導体トランジスタ及びその製造方法
EP2084750A4 (en) * 2006-11-20 2010-12-22 Panasonic Corp SEMICONDUCTOR DEVICE AND ITS TRAINING METHOD
JP2009206123A (ja) * 2008-02-26 2009-09-10 Sanken Electric Co Ltd Ｈｆｅｔおよびその製造方法
US7985986B2 (en) * 2008-07-31 2011-07-26 Cree, Inc. Normally-off semiconductor devices
DE112010001582T5 (de) 2009-04-08 2012-08-02 Efficient Power Conversion Corporation Galliumnitrid-Transistor vom Anreicherungstyp mit verbessertern GATE-Eigenschaften
US8168486B2 (en) * 2009-06-24 2012-05-01 Intersil Americas Inc. Methods for manufacturing enhancement-mode HEMTs with self-aligned field plate
TWI421947B (zh) * 2010-11-12 2014-01-01 Univ Nat Chiao Tung 氮化鎵電晶體的製作方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5161235A (en) * 1990-02-20 1992-11-03 University Of Virginia Alumni Patents Foundation Field-effect compound semiconductive transistor with GaAs gate to increase barrier height and reduce turn-on threshold
CN101273458A (zh) * 2004-01-23 2008-09-24 国际整流器公司 增强模式ⅲ族氮化物场效应晶体管
WO2010118087A1 (en) * 2009-04-08 2010-10-14 Efficient Power Conversion Corporation Enhancement mode gan hemt device and method for fabricating the same

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