CN103278971A - Thin film transistor array substrate and manufacturing method thereof - Google Patents
Thin film transistor array substrate and manufacturing method thereof Download PDFInfo
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- CN103278971A CN103278971A CN2012103825609A CN201210382560A CN103278971A CN 103278971 A CN103278971 A CN 103278971A CN 2012103825609 A CN2012103825609 A CN 2012103825609A CN 201210382560 A CN201210382560 A CN 201210382560A CN 103278971 A CN103278971 A CN 103278971A
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Abstract
The invention discloses a thin film transistor array substrate and a manufacturing method thereof to resolve the problems that in the prior art, load of a liquid crystal display panel is increased due to stray capacitance existing between a common electrode and a data line. According to the thin film transistor array substrate and the manufacturing method, an overlap area of the strip-shaped common electrode located above the data line and at least one data line is provided with a carving crack, the stray capacitance between the common electrode and the data line can be reduced, meanwhile light leak is prevented from being produced, and the load of the liquid crystal display panel is further reduced.
Description
Technical field
The present invention relates to LCD and make the field, relate in particular to a kind of thin-film transistor array base-plate and manufacture method thereof.
Background technology
The LCD development has become the main flow flat-panel monitor rapidly.From appearance so far, LCD has developed several kinds such as TN, IPS, PVA, MV and FFS, and its drive pattern and display effect are not quite similar, and have his own strong points.Wherein, FFS(Fringe Field Switch, fringe field switching) Thin Film Transistor-LCD is with its its specific structure characteristics and drive principle, shown good display capabilities and effect.
FFS LCD Structure of thin film transistor more complicated, processing step is more, realizes difficulty.In the manufacturing process, need to make two-layer transparency electrode, one deck is as pixel electrode, another layer is as public electrode, be illustrated in figure 1 as existing FFS dot structure synoptic diagram, strip public electrode 8 among Fig. 1, part is distributed in pixel electrode 5 tops of viewing area, also have part strip public electrode 8 cover data lines 7, the part strip public electrode 8 of cover data line 7 is because the two has overlapping region, therefore, between public electrode 8 and data line 7, can there be stray capacitance, thereby causes the load of display panel to increase.
In the prior art, for the stray capacitance between the strip public electrode 8 that reduces data line 7 and the side of being located thereon, reduce the load of display panels, often adopt the thickness that increases the insulation course 6 between common electrode layer and the source-drain electrode layer, but adopt the method for this increase thickness of insulating layer, can prolong the process time, increase cost.
Therefore, the structure of existing thin-film transistor array base-plate haves much room for improvement, and to reduce the stray capacitance between public electrode 8 and the data line 7, reduces the load of display panels.
Summary of the invention
The purpose of this invention is to provide a kind of thin-film transistor array base-plate and manufacture method thereof, to solve in the prior art stray capacitance that exists between public electrode and the data line, the problem that causes the display panels load to increase.
The objective of the invention is to be achieved through the following technical solutions:
One aspect of the present invention provides a kind of thin-film transistor array base-plate, the strip public electrode that comprises data line and be positioned at described data line top, and the overlapping region of described strip public electrode and at least one described data line has the seam of quarter.
Wherein, the strip public electrode is opaque metal electrode;
Preferably, the overlapping region of strip public electrode and all of data lines has strip seam at quarter;
Further preferred, stitch along center line projection and the described data line central axis along its length in vertical direction of described data line length direction and coincide elongated quarter;
Preferably, carve the width that the width that stitches is less than or equal to described data line.
The present invention also provides a kind of display panels that comprises above-mentioned thin-film transistor array base-plate, and the LCD that comprises this display panels.
Further aspect of the present invention also provides a kind of manufacture method of thin-film transistor array base-plate, comprising: form grid, active layer, pixel electrode, data line, source-drain electrode and insulation course at substrate, also comprise:
Above described insulation course, deposit opaque metal layer;
Apply photoresist in described opaque metal layer;
Described photoresist is exposed, forms the strip common pattern of electrodes after the development, etching, and at least one strip public electrode that is positioned at described data line top has the seam of quarter.
Preferably, this method also is included in when forming described grid, formation is positioned at the strip grid derby with layer, described strip grid derby be positioned at having of follow-up formation carve seam the strip public electrode under, and the width of described strip grid derby is greater than the width of seam at described quarter.
Further preferred, after the step that forms the strip public electrode, also comprise:
At the opaque and nonconducting packed layer of described strip public electrode deposition;
By photoetching process, the described packed layer of patterning makes described packed layer fill described quarter and stitches.
Thin-film transistor array base-plate provided by the invention and manufacture method thereof, overlapping region at strip public electrode and data line is carved seam, and existing transparency electrode is replaced by opaque metal electrode, reducing stray capacitance between public electrode and the data line, when reducing the display panels load, can also prevent that the lateral electric fields between pixel electrode and the public electrode from causing light leak.
Description of drawings
Fig. 1 is existing FFS thin-film transistor array base-plate cross section structure synoptic diagram;
The thin-film transistor array base-plate cross section structure synoptic diagram that Fig. 2 provides for the embodiment of the invention one;
Fig. 3 changes the thin-film transistor array base-plate cross section structure synoptic diagram that example provides for the embodiment of the invention one;
The thin-film transistor array base-plate cross section structure synoptic diagram that Fig. 4 provides for the embodiment of the invention one another variation example;
The thin-film transistor array base-plate cross section structure synoptic diagram that Fig. 5 provides for the embodiment of the invention one another variation example;
The thin-film transistor array base-plate method for making process flow diagram that Fig. 6 provides for the embodiment of the invention four;
Fig. 7 is for having the method for making process flow diagram of the strip public electrode of carving seam among Fig. 6.
Embodiment
Thin-film transistor array base-plate provided by the invention has the seam of quarter being positioned at strip public electrode above the data line and the overlapping region of data line, can reduce the stray capacitance between public electrode and the data line, reduces the load of display panels.
The embodiment of the invention one provides a kind of thin-film transistor array base-plate, be illustrated in figure 2 as the cross section structure synoptic diagram of the thin-film transistor array base-plate that the embodiment of the invention one provides, comprise: substrate 1, grid 2, active layer 3, source-drain electrode 4, pixel electrode 5, insulation course 6, data line 7 and the strip public electrode 8 that is positioned at data line 7 tops, wherein strip public electrode 8 has the seam of quarter 9 with data line 7 overlapping regions.
Concrete, grid 2 is formed on the substrate 1, and active layer 3 and source-drain electrode 4 are formed on grid 2 tops, and insulate mutually with an insulation course and grid 2, active layer 3, source-drain electrode 4 and grid 2 common formation thin film transistor (TFT)s.Be positioned at data line 7 tops with one deck with source-drain electrode 4, and the top of the pixel electrode in the viewing area covers insulation course 6, strip public electrode 8 parts are distributed in the viewing area except data line 7, part is distributed in data line 7 tops, for the stray capacitance that reduces to exist between data line 7 and the strip public electrode 8, the overlapping region at strip public electrode 8 and data line 7 in the embodiment of the invention has the seam of quarter 9.
Preferably, in order to simplify technology, can reduce the stray capacitance of existence between data line 7 and the strip public electrode 8 again, in the embodiment of the invention on the basis that does not change original technology, can when form strip public electrode 8, adopt identical technology that strip public electrode 8 and the overlapping region of data line 7 are done and carve the seam processing; And owing in the array base palte of formation display panel many data lines 7 are arranged, the embodiment of the invention can be done seam processing at quarter by the strip public electrode 8 above segment data line 7, also can all do the strip public electrode 8 of all of data lines 7 tops on the whole display panel and carve the seam processing.
Further, owing to have lateral electric fields between strip public electrode 8 and the data line 7, when the overlapping region of strip public electrode 8 and data line 7 has the seam of quarter 9, and when pixel electrode 5 is discontinuous on whole display panel, the pixel light leak problem that may exist lateral electric fields to cause, therefore, preferably, the strip public electrode 8 that is positioned at insulation course 6 tops can be set to opaque metal electrode in the embodiment of the invention, as shown in Figure 3, preferred then, the overlapping region of all of data lines 7 is carved seam on metal electrode and display panel, when not causing light leak, reduce stray capacitance, and then reduce the load of display panel.
Preferably, for technology simple and attractive in appearance, can be stitched 9 the quarter on the overlapping region in the embodiment of the invention and be made as strip, and further preferably make this strip carve seam 9 to coincide along the central axis of its length direction along the center line of its length direction projection and data line 7 in vertical direction, at once stitching 9 shape is the strip of the symmetrical regular shape of relative data line 7 central axis, does not regard it as certainly to be limited.
Further, in order to make strip public electrode 8 enough shadings of carving after stitching, in the embodiment of the invention, the width of carving seam 9 is less than or equal to the width of data line 7, at once the strip public electrode behind the seam 8 still can be slightly overlapping with data line 7, with the width in the overlapping one-sided zone of strip public electrode 8 except carving seam 9 of data line 7 be 1um ~ 5um, preferred 3um; And in order to make the public electrode 8 can conducting in whole front panel, the length of carving seam 9 in the embodiment of the invention also can be less than the length of data line 7.In addition, in order not reduce aperture opening ratio, remaining strip public electrode 8 should be thin as much as possible except the strip public electrode that is positioned at data line 7 tops in the viewing area, consider that technology realizes, in the embodiment of the invention except the strip public electrode 8 that is positioned at data line 7 tops, other width that are positioned at the strip public electrode 8 of viewing area are 0.5um ~ 2.5um, preferred 1um.
Preferably, do not cause light leak in order to make strip public electrode 8 and the quarter on data line 7 overlapping regions stitch 9 in the embodiment of the invention, can in the space of carving seam 9 formation, fill non-conductive and opaque filling material 10, as shown in Figure 4.
More preferred, in order not increase processing step, the embodiment of the invention also can be by on same one deck of grid 2, have the strip public electrode 8 of carving seam 9 under, a grid derby 11 is set in order to shading.The width of grid derby 11 is greater than carving seam 9 width.
Preferably, derby 11 also is strip, as shown in Figure 5.
The thin-film transistor array base-plate that the embodiment of the invention provides when increasing manufacture craft, is carved seam with strip public electrode 8 and the overlapping region of data line 7, reduces the stray capacitance between the two, need not to increase the thickness of insulation course, has reduced technology difficulty.And existing transparent common electrode is set to opaque metal public electrode in the embodiment of the invention, perhaps further when making grid 2, under data line 7, form grid derby 11, perhaps can also in the space of carving seam 9 formation, fill opaque and nonconducting filling material 10, avoided strip public electrode 8 after data line 7 overlapping regions are carved seam, the edge light leak that lateral electric fields causes; Nor can increase technology difficulty.
The embodiment of the invention two also provides a kind of display panels, comprises the thin-film transistor array base-plate among the embodiment one, the color membrane substrates that is oppositely arranged with this thin-film transistor array base-plate, and be mixed in liquid crystal between array base palte and the color membrane substrates.Because display panels other structures except thin-film transistor array base-plate are same as the prior art, specifically repeat no more here.
Based on identical theory, the embodiment of the invention three provides a kind of LCD, and this LCD comprises the display panels that embodiment two relates to.
The embodiment of the invention four provides a kind of manufacture method of thin-film transistor array base-plate, and technological process is please consulted Fig. 3 as shown in Figure 6 simultaneously.
Step S601: at substrate 1 deposition grid metal level, form grid 2 by composition technology.
Step S602: after grid 2 forms the insulation course of cover gate 2, form active layer 3 at insulation course.
Step S603: on the basis of completing steps S602, the deposit transparent conductive film forms pixel electrode 5 by composition technology.
Step S604: having prepared substrate deposition one deck source-drain electrode metal of active layer 3, by photoetching process, substrate form data line 7, with the active layer 3 direct or indirect source-drain electrodes 4 that contact.
Step S605: depositing insulating layer 6 on substrate.
Step S606: above the insulation course 6 of step S605 deposition, form strip public electrode 8 by photoetching process, and at least one strip public electrode 8 that is positioned at data line 7 tops, have the seam of quarter 9.
Concrete, form the process of strip public electrode 8 among the step S606 as shown in Figure 7, comprising:
Step S6061: above insulation course 6, deposit opaque metal layer.
Step S6062: apply photoresist in opaque metal layer;
Step S6063: photoresist is exposed, forms strip public electrode 8 figures after the development, etching, and at least one strip public electrode 8 that is positioned at data line 7 tops has the seam of quarter 9.
Concrete, form the method that the technology of carving seam 9 can adopt the strip public electrode in original formation viewing area.
At first photoresist is exposed, form part after development, the etching and have the strip public electrode 8 of carving seam 9.Preferably, carve the figure that seam 9 is strip flutings, and strip is carved the top that seam is positioned at least one data line 7; Wherein, preferably, the strip that is positioned at data line 7 tops is carved seam center line along its length projection and data line 7 in vertical direction and is coincided along the central axis of its length direction, and it is further preferred, strip is carved the width that the width that stitches is less than or equal to data line 7, and length is not more than the length of data line.
Wherein, be positioned at the strip public electrode 8 of data line 7 tops, the width in the one-sided zone except carving seam 9 is 1um ~ 5um, preferred 3um; Except the strip public electrode 8 that is positioned at data line 7 tops, the width that is positioned at other strip public electrodes 8 of viewing area is 0.5um ~ 2.5um, preferred 1um.
The method for manufacturing thin film transistor array substrate that the embodiment of the invention provides, compare with existing manufacture method, only be with original different when making public electrode, the transparent metal layer of original deposition is replaced by the opaque metal level of deposition, when forming the strip public electrode, will be positioned at the overlapping zone of strip public electrode above the data line and data line, carve seam some or all ofly, can be when avoiding lateral electric fields to cause light leak, reduce the stray capacitance between public electrode and the data line, and then reduce the load of display panels.
Preferably, in the embodiment of the invention, carving the light leak that causes when seam 9 exists for further avoiding lateral electric fields, when forming grid 2, formation is positioned at the strip grid derby 11 with layer, strip grid derby 11 be positioned at having of follow-up formation carve seam strip public electrode 8 under, and the width of strip grid derby 11 is greater than the width of carving seam 9.By forming strip grid derby 11, when not increasing technology, stitch the light leak at 9 places the quarter of avoiding lateral electric fields to cause.
Preferably, in the embodiment of the invention, can also in carving seam 9, deposit opaque and nonconducting packed layer, by photoetching process, the packed layer of patterned deposition, final formation is filled to carve and is stitched 9 figure, thereby further solves the light leak problem.
The method for manufacturing thin film transistor array substrate that the embodiment of the invention provides can reduce the stray capacitance that forms between public electrode and the data line, and can further avoid because the edge light leak that quarter, seam caused that increases.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (18)
1. thin-film transistor array base-plate, the strip public electrode that comprises data line and be positioned at described data line top is characterized in that, the overlapping region of described strip public electrode and at least one described data line has to carve and stitches.
2. array base palte as claimed in claim 1 is characterized in that, described strip public electrode is opaque metal electrode.
3. array base palte as claimed in claim 2 is characterized in that, the overlapping region of described strip public electrode and all of data lines has the seam of quarter.
4. array base palte as claimed in claim 3 is characterized in that, stitch elongated described quarter.
5. array base palte as claimed in claim 4 is characterized in that, stitch along center line projection and the described data line central axis along its length in vertical direction of described data line length direction and coincide elongated described quarter.
6. array base palte as claimed in claim 2 is characterized in that, the width that stitches described quarter is less than or equal to the width of described data line.
7. array base palte as claimed in claim 6 is characterized in that, with the overlapping strip public electrode of described data line, except the width in the one-sided zone the described quarter seam is 1um ~ 5um.
8. array base palte as claimed in claim 7 is characterized in that, with the overlapping strip public electrode of described data line, except the width in the one-sided zone the described quarter seam is 3um.
9. array base palte as claimed in claim 2 is characterized in that, except the strip public electrode that is positioned at described data line top, other width that are positioned at the strip public electrode of viewing area are 0.5um ~ 2.5um.
10. array base palte as claimed in claim 1 is characterized in that, is filled with non-conductive and opaque filling material in the space that described quarter, seam formed.
11. array base palte as claimed in claim 1 comprises the grid that is positioned on the substrate, it is characterized in that, described array base palte also comprises:
Be positioned at same one deck with grid, be positioned under the described strip public electrode, and width is greater than the strip grid derby that stitches width described quarter.
12. a display panels is characterized in that, comprises each described thin-film transistor array base-plate of claim 1-11.
13. a LCD is characterized in that, comprises the described display panels of claim 12.
14. the manufacture method of a thin-film transistor array base-plate comprises: form grid, active layer, pixel electrode, data line, source-drain electrode and insulation course at substrate, it is characterized in that, this method also comprises:
Above described insulation course, deposit opaque metal layer;
Apply photoresist in described opaque metal layer;
Described photoresist is exposed, forms the strip common pattern of electrodes after the development, etching, and at least one strip public electrode that is positioned at described data line top has the seam of quarter.
15. manufacture method as claimed in claim 14 is characterized in that, is positioned at described data line top and has the strip public electrode of carving seam, the width of carving the one-sided zone beyond stitching is 1um ~ 5um.
16. manufacture method as claimed in claim 14 is characterized in that, except the strip public electrode that is positioned at described data line top, other width that are positioned at the strip public electrode of viewing area are 0.5um ~ 2.5um.
17. manufacture method as claimed in claim 14, described array base palte comprises the grid that is positioned on the substrate, it is characterized in that, this method also comprises:
When forming described grid, form the strip grid derby that is positioned at layer, described strip grid derby be positioned at strip public electrode that having of follow-up formation carve seam under, and the width of described strip grid derby is greater than the width of seam at described quarter.
18. manufacture method as claimed in claim 14 is characterized in that, after the step that forms the strip public electrode, also comprises:
At the opaque and nonconducting packed layer of described strip public electrode deposition;
By photoetching process, the described packed layer of patterning makes described packed layer fill described quarter and stitches.
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| CN105487306A (en) * | 2015-12-25 | 2016-04-13 | 南京中电熊猫液晶显示科技有限公司 | Curved-face liquid crystal panel |
| CN105824161A (en) * | 2016-05-25 | 2016-08-03 | 福州京东方光电科技有限公司 | Liquid crystal display panel and liquid crystal display device |
| CN107065329A (en) * | 2017-06-05 | 2017-08-18 | 京东方科技集团股份有限公司 | Display base plate and preparation method, display device |
| CN107272279A (en) * | 2017-07-07 | 2017-10-20 | 深圳市华星光电技术有限公司 | Dot structure and liquid crystal display panel |
| WO2020087662A1 (en) * | 2018-10-29 | 2020-05-07 | 惠科股份有限公司 | Display device |
| CN114185458A (en) * | 2021-12-10 | 2022-03-15 | Tcl华星光电技术有限公司 | Display device and display panel thereof |
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